diff options
| author | Scott Wood <scottwood@freescale.com> | 2014-04-07 23:49:35 (GMT) |
|---|---|---|
| committer | Scott Wood <scottwood@freescale.com> | 2014-04-07 23:49:35 (GMT) |
| commit | 62b8c978ee6b8d135d9e7953221de58000dba986 (patch) | |
| tree | 683b04b2e627f6710c22c151b23c8cc9a165315e /arch/arm/boot/dts | |
| parent | 78fd82238d0e5716578c326404184a27ba67fd6e (diff) | |
| download | linux-fsl-qoriq-62b8c978ee6b8d135d9e7953221de58000dba986.tar.xz | |
Rewind v3.13-rc3+ (78fd82238d0e5716) to v3.12
Diffstat (limited to 'arch/arm/boot/dts')
251 files changed, 3985 insertions, 16873 deletions
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index d57c1a6..802720e 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -40,17 +40,17 @@ dtb-$(CONFIG_ARCH_AT91) += sama5d31ek.dtb dtb-$(CONFIG_ARCH_AT91) += sama5d33ek.dtb dtb-$(CONFIG_ARCH_AT91) += sama5d34ek.dtb dtb-$(CONFIG_ARCH_AT91) += sama5d35ek.dtb + dtb-$(CONFIG_ARCH_ATLAS6) += atlas6-evb.dtb + dtb-$(CONFIG_ARCH_BCM2835) += bcm2835-rpi-b.dtb -dtb-$(CONFIG_ARCH_BCM_MOBILE) += bcm11351-brt.dtb \ +dtb-$(CONFIG_ARCH_BCM) += bcm11351-brt.dtb \ bcm28155-ap.dtb -dtb-$(CONFIG_ARCH_BCM2835) += bcm2835-rpi-b.dtb dtb-$(CONFIG_ARCH_DAVINCI) += da850-enbw-cmc.dtb \ da850-evm.dtb dtb-$(CONFIG_ARCH_DOVE) += dove-cm-a510.dtb \ dove-cubox.dtb \ dove-d2plug.dtb \ - dove-d3plug.dtb \ dove-dove-db.dtb dtb-$(CONFIG_ARCH_EXYNOS) += exynos4210-origen.dtb \ exynos4210-smdkv310.dtb \ @@ -96,25 +96,22 @@ dtb-$(CONFIG_ARCH_KIRKWOOD) += kirkwood-cloudbox.dtb \ kirkwood-ns2mini.dtb \ kirkwood-nsa310.dtb \ kirkwood-nsa310a.dtb \ - kirkwood-openblocks_a6.dtb \ - kirkwood-openblocks_a7.dtb \ kirkwood-sheevaplug.dtb \ kirkwood-sheevaplug-esata.dtb \ kirkwood-topkick.dtb \ kirkwood-ts219-6281.dtb \ - kirkwood-ts219-6282.dtb + kirkwood-ts219-6282.dtb \ + kirkwood-openblocks_a6.dtb dtb-$(CONFIG_ARCH_MARCO) += marco-evb.dtb -dtb-$(CONFIG_ARCH_MSM) += qcom-msm8660-surf.dtb \ - qcom-msm8960-cdp.dtb +dtb-$(CONFIG_ARCH_MSM) += msm8660-surf.dtb \ + msm8960-cdp.dtb dtb-$(CONFIG_ARCH_MVEBU) += armada-370-db.dtb \ armada-370-mirabox.dtb \ armada-370-netgear-rn102.dtb \ - armada-370-netgear-rn104.dtb \ armada-370-rd.dtb \ armada-xp-axpwifiap.dtb \ armada-xp-db.dtb \ armada-xp-gp.dtb \ - armada-xp-matrix.dtb \ armada-xp-openblocks-ax3-4.dtb dtb-$(CONFIG_ARCH_MXC) += \ imx25-karo-tx25.dtb \ @@ -145,10 +142,8 @@ dtb-$(CONFIG_ARCH_MXC) += \ imx6q-sabrelite.dtb \ imx6q-sabresd.dtb \ imx6q-sbc6x.dtb \ - imx6q-udoo.dtb \ imx6q-wandboard.dtb \ imx6sl-evk.dtb \ - vf610-cosmic.dtb \ vf610-twr.dtb dtb-$(CONFIG_ARCH_MXS) += imx23-evk.dtb \ imx23-olinuxino.dtb \ @@ -164,7 +159,6 @@ dtb-$(CONFIG_ARCH_MXS) += imx23-evk.dtb \ imx28-cfa10057.dtb \ imx28-cfa10058.dtb \ imx28-evk.dtb \ - imx28-m28cu3.dtb \ imx28-m28evk.dtb \ imx28-sps1.dtb \ imx28-tx28.dtb @@ -178,15 +172,9 @@ dtb-$(CONFIG_ARCH_OMAP2PLUS) += omap2420-h4.dtb \ omap3-devkit8000.dtb \ omap3-beagle-xm.dtb \ omap3-evm.dtb \ - omap3-evm-37xx.dtb \ - omap3-n900.dtb \ - omap3-n9.dtb \ - omap3-n950.dtb \ omap3-tobi.dtb \ - omap3-gta04.dtb \ omap3-igep0020.dtb \ omap3-igep0030.dtb \ - omap3-zoom3.dtb \ omap4-panda.dtb \ omap4-panda-a4.dtb \ omap4-panda-es.dtb \ @@ -198,33 +186,25 @@ dtb-$(CONFIG_ARCH_OMAP2PLUS) += omap2420-h4.dtb \ am335x-evmsk.dtb \ am335x-bone.dtb \ am335x-boneblack.dtb \ - am335x-nano.dtb \ - am335x-base0033.dtb \ am3517-evm.dtb \ am3517_mt_ventoux.dtb \ - am43x-epos-evm.dtb \ - dra7-evm.dtb + am43x-epos-evm.dtb dtb-$(CONFIG_ARCH_ORION5X) += orion5x-lacie-ethernet-disk-mini-v2.dtb dtb-$(CONFIG_ARCH_PRIMA2) += prima2-evb.dtb dtb-$(CONFIG_ARCH_U8500) += ste-snowball.dtb \ - ste-hrefprev60-stuib.dtb \ - ste-hrefprev60-tvk.dtb \ - ste-hrefv60plus-stuib.dtb \ - ste-hrefv60plus-tvk.dtb \ + ste-hrefprev60.dtb \ + ste-hrefv60plus.dtb \ ste-ccu8540.dtb \ ste-ccu9540.dtb dtb-$(CONFIG_ARCH_S3C24XX) += s3c2416-smdk2416.dtb -dtb-$(CONFIG_ARCH_S3C64XX) += s3c6410-mini6410.dtb \ - s3c6410-smdk6410.dtb dtb-$(CONFIG_ARCH_SHMOBILE) += emev2-kzm9d.dtb \ - r7s72100-genmai.dtb \ + emev2-kzm9d-reference.dtb \ r8a7740-armadillo800eva.dtb \ r8a7778-bockw.dtb \ r8a7778-bockw-reference.dtb \ r8a7740-armadillo800eva-reference.dtb \ r8a7779-marzen.dtb \ r8a7779-marzen-reference.dtb \ - r8a7791-koelsch.dtb \ r8a7790-lager.dtb \ r8a7790-lager-reference.dtb \ sh73a0-kzm9g.dtb \ @@ -232,10 +212,8 @@ dtb-$(CONFIG_ARCH_SHMOBILE) += emev2-kzm9d.dtb \ r8a73a4-ape6evm.dtb \ r8a73a4-ape6evm-reference.dtb \ sh7372-mackerel.dtb -dtb-$(CONFIG_ARCH_SHMOBILE_MULTI) += emev2-kzm9d.dtb -dtb-$(CONFIG_ARCH_SOCFPGA) += socfpga_arria5_socdk.dtb \ - socfpga_cyclone5_socdk.dtb \ - socfpga_cyclone5_sockit.dtb \ +dtb-$(CONFIG_ARCH_SHMOBILE_MULTI) += emev2-kzm9d-reference.dtb +dtb-$(CONFIG_ARCH_SOCFPGA) += socfpga_cyclone5.dtb \ socfpga_vt.dtb dtb-$(CONFIG_ARCH_SPEAR13XX) += spear1310-evb.dtb \ spear1340-evb.dtb @@ -257,7 +235,6 @@ dtb-$(CONFIG_ARCH_SUNXI) += \ sun5i-a13-olinuxino.dtb \ sun6i-a31-colombus.dtb \ sun7i-a20-cubieboard2.dtb \ - sun7i-a20-cubietruck.dtb \ sun7i-a20-olinuxino-micro.dtb dtb-$(CONFIG_ARCH_TEGRA) += tegra20-harmony.dtb \ tegra20-iris-512.dtb \ @@ -272,8 +249,7 @@ dtb-$(CONFIG_ARCH_TEGRA) += tegra20-harmony.dtb \ tegra30-beaver.dtb \ tegra30-cardhu-a02.dtb \ tegra30-cardhu-a04.dtb \ - tegra114-dalmore.dtb \ - tegra124-venice2.dtb + tegra114-dalmore.dtb dtb-$(CONFIG_ARCH_VERSATILE) += versatile-ab.dtb \ versatile-pb.dtb dtb-$(CONFIG_ARCH_U300) += ste-u300.dtb diff --git a/arch/arm/boot/dts/am335x-base0033.dts b/arch/arm/boot/dts/am335x-base0033.dts deleted file mode 100644 index 72a9b3f..0000000 --- a/arch/arm/boot/dts/am335x-base0033.dts +++ /dev/null @@ -1,95 +0,0 @@ -/* - * am335x-base0033.dts - Device Tree file for IGEP AQUILA EXPANSION - * - * Copyright (C) 2013 ISEE 2007 SL - http://www.isee.biz - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include "am335x-igep0033.dtsi" - -/ { - model = "IGEP COM AM335x on AQUILA Expansion"; - compatible = "isee,am335x-base0033", "isee,am335x-igep0033", "ti,am33xx"; - - hdmi { - compatible = "ti,tilcdc,slave"; - i2c = <&i2c0>; - pinctrl-names = "default", "off"; - pinctrl-0 = <&nxp_hdmi_pins>; - pinctrl-1 = <&nxp_hdmi_off_pins>; - status = "okay"; - }; - - leds_base { - pinctrl-names = "default"; - pinctrl-0 = <&leds_base_pins>; - - compatible = "gpio-leds"; - - led@0 { - label = "base:red:user"; - gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>; /* gpio1_21 */ - default-state = "off"; - }; - - led@1 { - label = "base:green:user"; - gpios = <&gpio2 0 GPIO_ACTIVE_HIGH>; /* gpio2_0 */ - default-state = "off"; - }; - }; -}; - -&am33xx_pinmux { - nxp_hdmi_pins: pinmux_nxp_hdmi_pins { - pinctrl-single,pins = < - 0x1b0 (PIN_OUTPUT | MUX_MODE3) /* xdma_event_intr0.clkout1 */ - 0xa0 (PIN_OUTPUT | MUX_MODE0) /* lcd_data0 */ - 0xa4 (PIN_OUTPUT | MUX_MODE0) /* lcd_data1 */ - 0xa8 (PIN_OUTPUT | MUX_MODE0) /* lcd_data2 */ - 0xac (PIN_OUTPUT | MUX_MODE0) /* lcd_data3 */ - 0xb0 (PIN_OUTPUT | MUX_MODE0) /* lcd_data4 */ - 0xb4 (PIN_OUTPUT | MUX_MODE0) /* lcd_data5 */ - 0xb8 (PIN_OUTPUT | MUX_MODE0) /* lcd_data6 */ - 0xbc (PIN_OUTPUT | MUX_MODE0) /* lcd_data7 */ - 0xc0 (PIN_OUTPUT | MUX_MODE0) /* lcd_data8 */ - 0xc4 (PIN_OUTPUT | MUX_MODE0) /* lcd_data9 */ - 0xc8 (PIN_OUTPUT | MUX_MODE0) /* lcd_data10 */ - 0xcc (PIN_OUTPUT | MUX_MODE0) /* lcd_data11 */ - 0xd0 (PIN_OUTPUT | MUX_MODE0) /* lcd_data12 */ - 0xd4 (PIN_OUTPUT | MUX_MODE0) /* lcd_data13 */ - 0xd8 (PIN_OUTPUT | MUX_MODE0) /* lcd_data14 */ - 0xdc (PIN_OUTPUT | MUX_MODE0) /* lcd_data15 */ - 0xe0 (PIN_OUTPUT | MUX_MODE0) /* lcd_vsync */ - 0xe4 (PIN_OUTPUT | MUX_MODE0) /* lcd_hsync */ - 0xe8 (PIN_OUTPUT | MUX_MODE0) /* lcd_pclk */ - 0xec (PIN_OUTPUT | MUX_MODE0) /* lcd_ac_bias_en */ - >; - }; - nxp_hdmi_off_pins: pinmux_nxp_hdmi_off_pins { - pinctrl-single,pins = < - 0x1b0 (PIN_OUTPUT | MUX_MODE3) /* xdma_event_intr0.clkout1 */ - >; - }; - - leds_base_pins: pinmux_leds_base_pins { - pinctrl-single,pins = < - 0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a5.gpio1_21 */ - 0x88 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_csn3.gpio2_0 */ - >; - }; -}; - -&lcdc { - status = "okay"; -}; - -&i2c0 { - eeprom: eeprom@50 { - compatible = "at,24c256"; - reg = <0x50>; - }; -}; diff --git a/arch/arm/boot/dts/am335x-bone-common.dtsi b/arch/arm/boot/dts/am335x-bone-common.dtsi index e3f27ec..2f66ded 100644 --- a/arch/arm/boot/dts/am335x-bone-common.dtsi +++ b/arch/arm/boot/dts/am335x-bone-common.dtsi @@ -21,205 +21,177 @@ reg = <0x80000000 0x10000000>; /* 256 MB */ }; - leds { + am33xx_pinmux: pinmux@44e10800 { pinctrl-names = "default"; - pinctrl-0 = <&user_leds_s0>; - - compatible = "gpio-leds"; + pinctrl-0 = <&clkout2_pin>; + + user_leds_s0: user_leds_s0 { + pinctrl-single,pins = < + 0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a5.gpio1_21 */ + 0x58 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_a6.gpio1_22 */ + 0x5c (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a7.gpio1_23 */ + 0x60 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_a8.gpio1_24 */ + >; + }; - led@2 { - label = "beaglebone:green:heartbeat"; - gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>; - linux,default-trigger = "heartbeat"; - default-state = "off"; + i2c0_pins: pinmux_i2c0_pins { + pinctrl-single,pins = < + 0x188 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */ + 0x18c (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */ + >; }; - led@3 { - label = "beaglebone:green:mmc0"; - gpios = <&gpio1 22 GPIO_ACTIVE_HIGH>; - linux,default-trigger = "mmc0"; - default-state = "off"; + uart0_pins: pinmux_uart0_pins { + pinctrl-single,pins = < + 0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */ + 0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */ + >; }; - led@4 { - label = "beaglebone:green:usr2"; - gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>; - linux,default-trigger = "cpu0"; - default-state = "off"; + clkout2_pin: pinmux_clkout2_pin { + pinctrl-single,pins = < + 0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */ + >; }; - led@5 { - label = "beaglebone:green:usr3"; - gpios = <&gpio1 24 GPIO_ACTIVE_HIGH>; - linux,default-trigger = "mmc1"; - default-state = "off"; + cpsw_default: cpsw_default { + pinctrl-single,pins = < + /* Slave 1 */ + 0x110 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxerr.mii1_rxerr */ + 0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txen.mii1_txen */ + 0x118 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxdv.mii1_rxdv */ + 0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd3.mii1_txd3 */ + 0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd2.mii1_txd2 */ + 0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd1.mii1_txd1 */ + 0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd0.mii1_txd0 */ + 0x12c (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_txclk.mii1_txclk */ + 0x130 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxclk.mii1_rxclk */ + 0x134 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd3.mii1_rxd3 */ + 0x138 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd2.mii1_rxd2 */ + 0x13c (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd1.mii1_rxd1 */ + 0x140 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd0.mii1_rxd0 */ + >; }; - }; - vmmcsd_fixed: fixedregulator@0 { - compatible = "regulator-fixed"; - regulator-name = "vmmcsd_fixed"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - }; -}; + cpsw_sleep: cpsw_sleep { + pinctrl-single,pins = < + /* Slave 1 reset value */ + 0x110 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7) + >; + }; -&am33xx_pinmux { - pinctrl-names = "default"; - pinctrl-0 = <&clkout2_pin>; - - user_leds_s0: user_leds_s0 { - pinctrl-single,pins = < - 0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a5.gpio1_21 */ - 0x58 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_a6.gpio1_22 */ - 0x5c (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a7.gpio1_23 */ - 0x60 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_a8.gpio1_24 */ - >; - }; + davinci_mdio_default: davinci_mdio_default { + pinctrl-single,pins = < + /* MDIO */ + 0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */ + 0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */ + >; + }; - i2c0_pins: pinmux_i2c0_pins { - pinctrl-single,pins = < - 0x188 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */ - 0x18c (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */ - >; + davinci_mdio_sleep: davinci_mdio_sleep { + pinctrl-single,pins = < + /* MDIO reset value */ + 0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7) + >; + }; }; - uart0_pins: pinmux_uart0_pins { - pinctrl-single,pins = < - 0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */ - 0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */ - >; - }; + ocp { + uart0: serial@44e09000 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pins>; - clkout2_pin: pinmux_clkout2_pin { - pinctrl-single,pins = < - 0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */ - >; - }; + status = "okay"; + }; - cpsw_default: cpsw_default { - pinctrl-single,pins = < - /* Slave 1 */ - 0x110 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxerr.mii1_rxerr */ - 0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txen.mii1_txen */ - 0x118 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxdv.mii1_rxdv */ - 0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd3.mii1_txd3 */ - 0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd2.mii1_txd2 */ - 0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd1.mii1_txd1 */ - 0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd0.mii1_txd0 */ - 0x12c (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_txclk.mii1_txclk */ - 0x130 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxclk.mii1_rxclk */ - 0x134 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd3.mii1_rxd3 */ - 0x138 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd2.mii1_rxd2 */ - 0x13c (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd1.mii1_rxd1 */ - 0x140 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd0.mii1_rxd0 */ - >; - }; + musb: usb@47400000 { + status = "okay"; - cpsw_sleep: cpsw_sleep { - pinctrl-single,pins = < - /* Slave 1 reset value */ - 0x110 (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7) - >; - }; + control@44e10000 { + status = "okay"; + }; - davinci_mdio_default: davinci_mdio_default { - pinctrl-single,pins = < - /* MDIO */ - 0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */ - 0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */ - >; - }; + usb-phy@47401300 { + status = "okay"; + }; - davinci_mdio_sleep: davinci_mdio_sleep { - pinctrl-single,pins = < - /* MDIO reset value */ - 0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7) - >; - }; + usb-phy@47401b00 { + status = "okay"; + }; - mmc1_pins: pinmux_mmc1_pins { - pinctrl-single,pins = < - 0x160 (PIN_INPUT | MUX_MODE7) /* GPIO0_6 */ - >; - }; + usb@47401000 { + status = "okay"; + }; - emmc_pins: pinmux_emmc_pins { - pinctrl-single,pins = < - 0x80 (PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn1.mmc1_clk */ - 0x84 (PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn2.mmc1_cmd */ - 0x00 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */ - 0x04 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */ - 0x08 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */ - 0x0c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */ - 0x10 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad4.mmc1_dat4 */ - 0x14 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad5.mmc1_dat5 */ - 0x18 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad6.mmc1_dat6 */ - 0x1c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad7.mmc1_dat7 */ - >; - }; -}; + usb@47401800 { + status = "okay"; + dr_mode = "host"; + }; -&uart0 { - pinctrl-names = "default"; - pinctrl-0 = <&uart0_pins>; + dma-controller@07402000 { + status = "okay"; + }; + }; - status = "okay"; -}; + i2c0: i2c@44e0b000 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c0_pins>; -&usb { - status = "okay"; + status = "okay"; + clock-frequency = <400000>; - control@44e10000 { - status = "okay"; - }; - - usb-phy@47401300 { - status = "okay"; - }; + tps: tps@24 { + reg = <0x24>; + }; - usb-phy@47401b00 { - status = "okay"; + }; }; - usb@47401000 { - status = "okay"; - }; + leds { + pinctrl-names = "default"; + pinctrl-0 = <&user_leds_s0>; - usb@47401800 { - status = "okay"; - dr_mode = "host"; - }; + compatible = "gpio-leds"; - dma-controller@07402000 { - status = "okay"; - }; -}; + led@2 { + label = "beaglebone:green:heartbeat"; + gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "heartbeat"; + default-state = "off"; + }; -&i2c0 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c0_pins>; + led@3 { + label = "beaglebone:green:mmc0"; + gpios = <&gpio1 22 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "mmc0"; + default-state = "off"; + }; - status = "okay"; - clock-frequency = <400000>; + led@4 { + label = "beaglebone:green:usr2"; + gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>; + default-state = "off"; + }; - tps: tps@24 { - reg = <0x24>; + led@5 { + label = "beaglebone:green:usr3"; + gpios = <&gpio1 24 GPIO_ACTIVE_HIGH>; + default-state = "off"; + }; }; - }; /include/ "tps65217.dtsi" @@ -288,12 +260,3 @@ pinctrl-0 = <&davinci_mdio_default>; pinctrl-1 = <&davinci_mdio_sleep>; }; - -&mmc1 { - status = "okay"; - bus-width = <0x4>; - pinctrl-names = "default"; - pinctrl-0 = <&mmc1_pins>; - cd-gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>; - cd-inverted; -}; diff --git a/arch/arm/boot/dts/am335x-bone.dts b/arch/arm/boot/dts/am335x-bone.dts index 94ee427..7993c48 100644 --- a/arch/arm/boot/dts/am335x-bone.dts +++ b/arch/arm/boot/dts/am335x-bone.dts @@ -9,21 +9,3 @@ #include "am33xx.dtsi" #include "am335x-bone-common.dtsi" - -&ldo3_reg { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; -}; - -&mmc1 { - vmmc-supply = <&ldo3_reg>; -}; - -&sham { - status = "okay"; -}; - -&aes { - status = "okay"; -}; diff --git a/arch/arm/boot/dts/am335x-boneblack.dts b/arch/arm/boot/dts/am335x-boneblack.dts index 6b71ad9..197cadf 100644 --- a/arch/arm/boot/dts/am335x-boneblack.dts +++ b/arch/arm/boot/dts/am335x-boneblack.dts @@ -15,64 +15,3 @@ regulator-max-microvolt = <1800000>; regulator-always-on; }; - -&mmc1 { - vmmc-supply = <&vmmcsd_fixed>; -}; - -&mmc2 { - vmmc-supply = <&vmmcsd_fixed>; - pinctrl-names = "default"; - pinctrl-0 = <&emmc_pins>; - bus-width = <8>; - status = "okay"; - ti,vcc-aux-disable-is-sleep; -}; - -&am33xx_pinmux { - nxp_hdmi_bonelt_pins: nxp_hdmi_bonelt_pins { - pinctrl-single,pins = < - 0x1b0 0x03 /* xdma_event_intr0, OMAP_MUX_MODE3 | AM33XX_PIN_OUTPUT */ - 0xa0 0x08 /* lcd_data0.lcd_data0, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ - 0xa4 0x08 /* lcd_data1.lcd_data1, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ - 0xa8 0x08 /* lcd_data2.lcd_data2, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ - 0xac 0x08 /* lcd_data3.lcd_data3, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ - 0xb0 0x08 /* lcd_data4.lcd_data4, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ - 0xb4 0x08 /* lcd_data5.lcd_data5, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ - 0xb8 0x08 /* lcd_data6.lcd_data6, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ - 0xbc 0x08 /* lcd_data7.lcd_data7, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ - 0xc0 0x08 /* lcd_data8.lcd_data8, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ - 0xc4 0x08 /* lcd_data9.lcd_data9, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ - 0xc8 0x08 /* lcd_data10.lcd_data10, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ - 0xcc 0x08 /* lcd_data11.lcd_data11, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ - 0xd0 0x08 /* lcd_data12.lcd_data12, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ - 0xd4 0x08 /* lcd_data13.lcd_data13, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ - 0xd8 0x08 /* lcd_data14.lcd_data14, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ - 0xdc 0x08 /* lcd_data15.lcd_data15, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ - 0xe0 0x00 /* lcd_vsync.lcd_vsync, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT */ - 0xe4 0x00 /* lcd_hsync.lcd_hsync, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT */ - 0xe8 0x00 /* lcd_pclk.lcd_pclk, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT */ - 0xec 0x00 /* lcd_ac_bias_en.lcd_ac_bias_en, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT */ - >; - }; - nxp_hdmi_bonelt_off_pins: nxp_hdmi_bonelt_off_pins { - pinctrl-single,pins = < - 0x1b0 0x03 /* xdma_event_intr0, OMAP_MUX_MODE3 | AM33XX_PIN_OUTPUT */ - >; - }; -}; - -&lcdc { - status = "okay"; -}; - -/ { - hdmi { - compatible = "ti,tilcdc,slave"; - i2c = <&i2c0>; - pinctrl-names = "default", "off"; - pinctrl-0 = <&nxp_hdmi_bonelt_pins>; - pinctrl-1 = <&nxp_hdmi_bonelt_off_pins>; - status = "okay"; - }; -}; diff --git a/arch/arm/boot/dts/am335x-evm.dts b/arch/arm/boot/dts/am335x-evm.dts index 7e6c64e..e8ec875 100644 --- a/arch/arm/boot/dts/am335x-evm.dts +++ b/arch/arm/boot/dts/am335x-evm.dts @@ -24,6 +24,324 @@ reg = <0x80000000 0x10000000>; /* 256 MB */ }; + am33xx_pinmux: pinmux@44e10800 { + pinctrl-names = "default"; + pinctrl-0 = <&matrix_keypad_s0 &volume_keys_s0 &clkout2_pin>; + + matrix_keypad_s0: matrix_keypad_s0 { + pinctrl-single,pins = < + 0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a5.gpio1_21 */ + 0x58 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a6.gpio1_22 */ + 0x64 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a9.gpio1_25 */ + 0x68 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a10.gpio1_26 */ + 0x6c (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a11.gpio1_27 */ + >; + }; + + volume_keys_s0: volume_keys_s0 { + pinctrl-single,pins = < + 0x150 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* spi0_sclk.gpio0_2 */ + 0x154 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* spi0_d0.gpio0_3 */ + >; + }; + + i2c0_pins: pinmux_i2c0_pins { + pinctrl-single,pins = < + 0x188 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */ + 0x18c (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */ + >; + }; + + i2c1_pins: pinmux_i2c1_pins { + pinctrl-single,pins = < + 0x158 (PIN_INPUT_PULLUP | MUX_MODE2) /* spi0_d1.i2c1_sda */ + 0x15c (PIN_INPUT_PULLUP | MUX_MODE2) /* spi0_cs0.i2c1_scl */ + >; + }; + + uart0_pins: pinmux_uart0_pins { + pinctrl-single,pins = < + 0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */ + 0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */ + >; + }; + + clkout2_pin: pinmux_clkout2_pin { + pinctrl-single,pins = < + 0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */ + >; + }; + + nandflash_pins_s0: nandflash_pins_s0 { + pinctrl-single,pins = < + 0x0 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad0.gpmc_ad0 */ + 0x4 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad1.gpmc_ad1 */ + 0x8 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad2.gpmc_ad2 */ + 0xc (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad3.gpmc_ad3 */ + 0x10 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad4.gpmc_ad4 */ + 0x14 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad5.gpmc_ad5 */ + 0x18 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad6.gpmc_ad6 */ + 0x1c (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad7.gpmc_ad7 */ + 0x70 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_wait0.gpmc_wait0 */ + 0x74 (PIN_INPUT_PULLUP | MUX_MODE7) /* gpmc_wpn.gpio0_30 */ + 0x7c (PIN_OUTPUT | MUX_MODE0) /* gpmc_csn0.gpmc_csn0 */ + 0x90 (PIN_OUTPUT | MUX_MODE0) /* gpmc_advn_ale.gpmc_advn_ale */ + 0x94 (PIN_OUTPUT | MUX_MODE0) /* gpmc_oen_ren.gpmc_oen_ren */ + 0x98 (PIN_OUTPUT | MUX_MODE0) /* gpmc_wen.gpmc_wen */ + 0x9c (PIN_OUTPUT | MUX_MODE0) /* gpmc_be0n_cle.gpmc_be0n_cle */ + >; + }; + + ecap0_pins: backlight_pins { + pinctrl-single,pins = < + 0x164 0x0 /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out MODE0 */ + >; + }; + + cpsw_default: cpsw_default { + pinctrl-single,pins = < + /* Slave 1 */ + 0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txen.rgmii1_tctl */ + 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */ + 0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd3.rgmii1_td3 */ + 0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd2.rgmii1_td2 */ + 0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_td1 */ + 0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_td0 */ + 0x12c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txclk.rgmii1_tclk */ + 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxclk.rgmii1_rclk */ + 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd3.rgmii1_rd3 */ + 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd2.rgmii1_rd2 */ + 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd1.rgmii1_rd1 */ + 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd0.rgmii1_rd0 */ + >; + }; + + cpsw_sleep: cpsw_sleep { + pinctrl-single,pins = < + /* Slave 1 reset value */ + 0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7) + >; + }; + + davinci_mdio_default: davinci_mdio_default { + pinctrl-single,pins = < + /* MDIO */ + 0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */ + 0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */ + >; + }; + + davinci_mdio_sleep: davinci_mdio_sleep { + pinctrl-single,pins = < + /* MDIO reset value */ + 0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7) + >; + }; + }; + + ocp { + uart0: serial@44e09000 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pins>; + + status = "okay"; + }; + + i2c0: i2c@44e0b000 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c0_pins>; + + status = "okay"; + clock-frequency = <400000>; + + tps: tps@2d { + reg = <0x2d>; + }; + }; + + musb: usb@47400000 { + status = "okay"; + + control@44e10000 { + status = "okay"; + }; + + usb-phy@47401300 { + status = "okay"; + }; + + usb-phy@47401b00 { + status = "okay"; + }; + + usb@47401000 { + status = "okay"; + }; + + usb@47401800 { + status = "okay"; + dr_mode = "host"; + }; + + dma-controller@07402000 { + status = "okay"; + }; + }; + + i2c1: i2c@4802a000 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pins>; + + status = "okay"; + clock-frequency = <100000>; + + lis331dlh: lis331dlh@18 { + compatible = "st,lis331dlh", "st,lis3lv02d"; + reg = <0x18>; + Vdd-supply = <&lis3_reg>; + Vdd_IO-supply = <&lis3_reg>; + + st,click-single-x; + st,click-single-y; + st,click-single-z; + st,click-thresh-x = <10>; + st,click-thresh-y = <10>; + st,click-thresh-z = <10>; + st,irq1-click; + st,irq2-click; + st,wakeup-x-lo; + st,wakeup-x-hi; + st,wakeup-y-lo; + st,wakeup-y-hi; + st,wakeup-z-lo; + st,wakeup-z-hi; + st,min-limit-x = <120>; + st,min-limit-y = <120>; + st,min-limit-z = <140>; + st,max-limit-x = <550>; + st,max-limit-y = <550>; + st,max-limit-z = <750>; + }; + + tsl2550: tsl2550@39 { + compatible = "taos,tsl2550"; + reg = <0x39>; + }; + + tmp275: tmp275@48 { + compatible = "ti,tmp275"; + reg = <0x48>; + }; + }; + + elm: elm@48080000 { + status = "okay"; + }; + + epwmss0: epwmss@48300000 { + status = "okay"; + + ecap0: ecap@48300100 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&ecap0_pins>; + }; + }; + + gpmc: gpmc@50000000 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&nandflash_pins_s0>; + ranges = <0 0 0x08000000 0x10000000>; /* CS0: NAND */ + nand@0,0 { + reg = <0 0 0>; /* CS0, offset 0 */ + nand-bus-width = <8>; + ti,nand-ecc-opt = "bch8"; + gpmc,device-nand = "true"; + gpmc,device-width = <1>; + gpmc,sync-clk-ps = <0>; + gpmc,cs-on-ns = <0>; + gpmc,cs-rd-off-ns = <44>; + gpmc,cs-wr-off-ns = <44>; + gpmc,adv-on-ns = <6>; + gpmc,adv-rd-off-ns = <34>; + gpmc,adv-wr-off-ns = <44>; + gpmc,we-on-ns = <0>; + gpmc,we-off-ns = <40>; + gpmc,oe-on-ns = <0>; + gpmc,oe-off-ns = <54>; + gpmc,access-ns = <64>; + gpmc,rd-cycle-ns = <82>; + gpmc,wr-cycle-ns = <82>; + gpmc,wait-on-read = "true"; + gpmc,wait-on-write = "true"; + gpmc,bus-turnaround-ns = <0>; + gpmc,cycle2cycle-delay-ns = <0>; + gpmc,clk-activation-ns = <0>; + gpmc,wait-monitoring-ns = <0>; + gpmc,wr-access-ns = <40>; + gpmc,wr-data-mux-bus-ns = <0>; + + #address-cells = <1>; + #size-cells = <1>; + elm_id = <&elm>; + + /* MTD partition table */ + partition@0 { + label = "SPL1"; + reg = <0x00000000 0x000020000>; + }; + + partition@1 { + label = "SPL2"; + reg = <0x00020000 0x00020000>; + }; + + partition@2 { + label = "SPL3"; + reg = <0x00040000 0x00020000>; + }; + + partition@3 { + label = "SPL4"; + reg = <0x00060000 0x00020000>; + }; + + partition@4 { + label = "U-boot"; + reg = <0x00080000 0x001e0000>; + }; + + partition@5 { + label = "environment"; + reg = <0x00260000 0x00020000>; + }; + + partition@6 { + label = "Kernel"; + reg = <0x00280000 0x00500000>; + }; + + partition@7 { + label = "File-System"; + reg = <0x00780000 0x0F880000>; + }; + }; + }; + }; + vbat: fixedregulator@0 { compatible = "regulator-fixed"; regulator-name = "vbat"; @@ -85,447 +403,10 @@ brightness-levels = <0 51 53 56 62 75 101 152 255>; default-brightness-level = <8>; }; - - panel { - compatible = "ti,tilcdc,panel"; - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&lcd_pins_s0>; - panel-info { - ac-bias = <255>; - ac-bias-intrpt = <0>; - dma-burst-sz = <16>; - bpp = <32>; - fdd = <0x80>; - sync-edge = <0>; - sync-ctrl = <1>; - raster-order = <0>; - fifo-th = <0>; - }; - - display-timings { - 800x480p62 { - clock-frequency = <30000000>; - hactive = <800>; - vactive = <480>; - hfront-porch = <39>; - hback-porch = <39>; - hsync-len = <47>; - vback-porch = <29>; - vfront-porch = <13>; - vsync-len = <2>; - hsync-active = <1>; - vsync-active = <1>; - }; - }; - }; - - sound { - compatible = "ti,da830-evm-audio"; - ti,model = "AM335x-EVM"; - ti,audio-codec = <&tlv320aic3106>; - ti,mcasp-controller = <&mcasp1>; - ti,codec-clock-rate = <12000000>; - ti,audio-routing = - "Headphone Jack", "HPLOUT", - "Headphone Jack", "HPROUT", - "LINE1L", "Line In", - "LINE1R", "Line In"; - }; -}; - -&am33xx_pinmux { - pinctrl-names = "default"; - pinctrl-0 = <&matrix_keypad_s0 &volume_keys_s0 &clkout2_pin>; - - matrix_keypad_s0: matrix_keypad_s0 { - pinctrl-single,pins = < - 0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a5.gpio1_21 */ - 0x58 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a6.gpio1_22 */ - 0x64 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a9.gpio1_25 */ - 0x68 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a10.gpio1_26 */ - 0x6c (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a11.gpio1_27 */ - >; - }; - - volume_keys_s0: volume_keys_s0 { - pinctrl-single,pins = < - 0x150 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* spi0_sclk.gpio0_2 */ - 0x154 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* spi0_d0.gpio0_3 */ - >; - }; - - i2c0_pins: pinmux_i2c0_pins { - pinctrl-single,pins = < - 0x188 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */ - 0x18c (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */ - >; - }; - - i2c1_pins: pinmux_i2c1_pins { - pinctrl-single,pins = < - 0x158 (PIN_INPUT_PULLUP | MUX_MODE2) /* spi0_d1.i2c1_sda */ - 0x15c (PIN_INPUT_PULLUP | MUX_MODE2) /* spi0_cs0.i2c1_scl */ - >; - }; - - uart0_pins: pinmux_uart0_pins { - pinctrl-single,pins = < - 0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */ - 0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */ - >; - }; - - clkout2_pin: pinmux_clkout2_pin { - pinctrl-single,pins = < - 0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */ - >; - }; - - nandflash_pins_s0: nandflash_pins_s0 { - pinctrl-single,pins = < - 0x0 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad0.gpmc_ad0 */ - 0x4 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad1.gpmc_ad1 */ - 0x8 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad2.gpmc_ad2 */ - 0xc (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad3.gpmc_ad3 */ - 0x10 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad4.gpmc_ad4 */ - 0x14 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad5.gpmc_ad5 */ - 0x18 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad6.gpmc_ad6 */ - 0x1c (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad7.gpmc_ad7 */ - 0x70 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_wait0.gpmc_wait0 */ - 0x74 (PIN_INPUT_PULLUP | MUX_MODE7) /* gpmc_wpn.gpio0_30 */ - 0x7c (PIN_OUTPUT | MUX_MODE0) /* gpmc_csn0.gpmc_csn0 */ - 0x90 (PIN_OUTPUT | MUX_MODE0) /* gpmc_advn_ale.gpmc_advn_ale */ - 0x94 (PIN_OUTPUT | MUX_MODE0) /* gpmc_oen_ren.gpmc_oen_ren */ - 0x98 (PIN_OUTPUT | MUX_MODE0) /* gpmc_wen.gpmc_wen */ - 0x9c (PIN_OUTPUT | MUX_MODE0) /* gpmc_be0n_cle.gpmc_be0n_cle */ - >; - }; - - ecap0_pins: backlight_pins { - pinctrl-single,pins = < - 0x164 0x0 /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out MODE0 */ - >; - }; - - cpsw_default: cpsw_default { - pinctrl-single,pins = < - /* Slave 1 */ - 0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txen.rgmii1_tctl */ - 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */ - 0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd3.rgmii1_td3 */ - 0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd2.rgmii1_td2 */ - 0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_td1 */ - 0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_td0 */ - 0x12c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txclk.rgmii1_tclk */ - 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxclk.rgmii1_rclk */ - 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd3.rgmii1_rd3 */ - 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd2.rgmii1_rd2 */ - 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd1.rgmii1_rd1 */ - 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd0.rgmii1_rd0 */ - >; - }; - - cpsw_sleep: cpsw_sleep { - pinctrl-single,pins = < - /* Slave 1 reset value */ - 0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7) - >; - }; - - davinci_mdio_default: davinci_mdio_default { - pinctrl-single,pins = < - /* MDIO */ - 0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */ - 0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */ - >; - }; - - davinci_mdio_sleep: davinci_mdio_sleep { - pinctrl-single,pins = < - /* MDIO reset value */ - 0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7) - >; - }; - - lcd_pins_s0: lcd_pins_s0 { - pinctrl-single,pins = < - 0x20 0x01 /* gpmc_ad8.lcd_data16, OUTPUT | MODE1 */ - 0x24 0x01 /* gpmc_ad9.lcd_data17, OUTPUT | MODE1 */ - 0x28 0x01 /* gpmc_ad10.lcd_data18, OUTPUT | MODE1 */ - 0x2c 0x01 /* gpmc_ad11.lcd_data19, OUTPUT | MODE1 */ - 0x30 0x01 /* gpmc_ad12.lcd_data20, OUTPUT | MODE1 */ - 0x34 0x01 /* gpmc_ad13.lcd_data21, OUTPUT | MODE1 */ - 0x38 0x01 /* gpmc_ad14.lcd_data22, OUTPUT | MODE1 */ - 0x3c 0x01 /* gpmc_ad15.lcd_data23, OUTPUT | MODE1 */ - 0xa0 0x00 /* lcd_data0.lcd_data0, OUTPUT | MODE0 */ - 0xa4 0x00 /* lcd_data1.lcd_data1, OUTPUT | MODE0 */ - 0xa8 0x00 /* lcd_data2.lcd_data2, OUTPUT | MODE0 */ - 0xac 0x00 /* lcd_data3.lcd_data3, OUTPUT | MODE0 */ - 0xb0 0x00 /* lcd_data4.lcd_data4, OUTPUT | MODE0 */ - 0xb4 0x00 /* lcd_data5.lcd_data5, OUTPUT | MODE0 */ - 0xb8 0x00 /* lcd_data6.lcd_data6, OUTPUT | MODE0 */ - 0xbc 0x00 /* lcd_data7.lcd_data7, OUTPUT | MODE0 */ - 0xc0 0x00 /* lcd_data8.lcd_data8, OUTPUT | MODE0 */ - 0xc4 0x00 /* lcd_data9.lcd_data9, OUTPUT | MODE0 */ - 0xc8 0x00 /* lcd_data10.lcd_data10, OUTPUT | MODE0 */ - 0xcc 0x00 /* lcd_data11.lcd_data11, OUTPUT | MODE0 */ - 0xd0 0x00 /* lcd_data12.lcd_data12, OUTPUT | MODE0 */ - 0xd4 0x00 /* lcd_data13.lcd_data13, OUTPUT | MODE0 */ - 0xd8 0x00 /* lcd_data14.lcd_data14, OUTPUT | MODE0 */ - 0xdc 0x00 /* lcd_data15.lcd_data15, OUTPUT | MODE0 */ - 0xe0 0x00 /* lcd_vsync.lcd_vsync, OUTPUT | MODE0 */ - 0xe4 0x00 /* lcd_hsync.lcd_hsync, OUTPUT | MODE0 */ - 0xe8 0x00 /* lcd_pclk.lcd_pclk, OUTPUT | MODE0 */ - 0xec 0x00 /* lcd_ac_bias_en.lcd_ac_bias_en, OUTPUT | MODE0 */ - >; - }; - - am335x_evm_audio_pins: am335x_evm_audio_pins { - pinctrl-single,pins = < - 0x10c (PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_rx_dv.mcasp1_aclkx */ - 0x110 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_txd3.mcasp1_fsx */ - 0x108 (PIN_OUTPUT_PULLDOWN | MUX_MODE4) /* mii1_col.mcasp1_axr2 */ - 0x144 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* rmii1_ref_clk.mcasp1_axr3 */ - >; - }; -}; - -&uart0 { - pinctrl-names = "default"; - pinctrl-0 = <&uart0_pins>; - - status = "okay"; -}; - -&i2c0 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c0_pins>; - - status = "okay"; - clock-frequency = <400000>; - - tps: tps@2d { - reg = <0x2d>; - }; -}; - -&usb { - status = "okay"; - - control@44e10000 { - status = "okay"; - }; - - usb-phy@47401300 { - status = "okay"; - }; - - usb-phy@47401b00 { - status = "okay"; - }; - - usb@47401000 { - status = "okay"; - }; - - usb@47401800 { - status = "okay"; - dr_mode = "host"; - }; - - dma-controller@07402000 { - status = "okay"; - }; -}; - -&i2c1 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c1_pins>; - - status = "okay"; - clock-frequency = <100000>; - - lis331dlh: lis331dlh@18 { - compatible = "st,lis331dlh", "st,lis3lv02d"; - reg = <0x18>; - Vdd-supply = <&lis3_reg>; - Vdd_IO-supply = <&lis3_reg>; - - st,click-single-x; - st,click-single-y; - st,click-single-z; - st,click-thresh-x = <10>; - st,click-thresh-y = <10>; - st,click-thresh-z = <10>; - st,irq1-click; - st,irq2-click; - st,wakeup-x-lo; - st,wakeup-x-hi; - st,wakeup-y-lo; - st,wakeup-y-hi; - st,wakeup-z-lo; - st,wakeup-z-hi; - st,min-limit-x = <120>; - st,min-limit-y = <120>; - st,min-limit-z = <140>; - st,max-limit-x = <550>; - st,max-limit-y = <550>; - st,max-limit-z = <750>; - }; - - tsl2550: tsl2550@39 { - compatible = "taos,tsl2550"; - reg = <0x39>; - }; - - tmp275: tmp275@48 { - compatible = "ti,tmp275"; - reg = <0x48>; - }; - - tlv320aic3106: tlv320aic3106@1b { - compatible = "ti,tlv320aic3106"; - reg = <0x1b>; - status = "okay"; - - /* Regulators */ - AVDD-supply = <&vaux2_reg>; - IOVDD-supply = <&vaux2_reg>; - DRVDD-supply = <&vaux2_reg>; - DVDD-supply = <&vbat>; - }; -}; - -&lcdc { - status = "okay"; -}; - -&elm { - status = "okay"; -}; - -&epwmss0 { - status = "okay"; - - ecap0: ecap@48300100 { - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&ecap0_pins>; - }; -}; - -&gpmc { - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&nandflash_pins_s0>; - ranges = <0 0 0x08000000 0x10000000>; /* CS0: NAND */ - nand@0,0 { - reg = <0 0 0>; /* CS0, offset 0 */ - nand-bus-width = <8>; - ti,nand-ecc-opt = "bch8"; - gpmc,device-nand = "true"; - gpmc,device-width = <1>; - gpmc,sync-clk-ps = <0>; - gpmc,cs-on-ns = <0>; - gpmc,cs-rd-off-ns = <44>; - gpmc,cs-wr-off-ns = <44>; - gpmc,adv-on-ns = <6>; - gpmc,adv-rd-off-ns = <34>; - gpmc,adv-wr-off-ns = <44>; - gpmc,we-on-ns = <0>; - gpmc,we-off-ns = <40>; - gpmc,oe-on-ns = <0>; - gpmc,oe-off-ns = <54>; - gpmc,access-ns = <64>; - gpmc,rd-cycle-ns = <82>; - gpmc,wr-cycle-ns = <82>; - gpmc,wait-on-read = "true"; - gpmc,wait-on-write = "true"; - gpmc,bus-turnaround-ns = <0>; - gpmc,cycle2cycle-delay-ns = <0>; - gpmc,clk-activation-ns = <0>; - gpmc,wait-monitoring-ns = <0>; - gpmc,wr-access-ns = <40>; - gpmc,wr-data-mux-bus-ns = <0>; - - #address-cells = <1>; - #size-cells = <1>; - elm_id = <&elm>; - - /* MTD partition table */ - partition@0 { - label = "SPL1"; - reg = <0x00000000 0x000020000>; - }; - - partition@1 { - label = "SPL2"; - reg = <0x00020000 0x00020000>; - }; - - partition@2 { - label = "SPL3"; - reg = <0x00040000 0x00020000>; - }; - - partition@3 { - label = "SPL4"; - reg = <0x00060000 0x00020000>; - }; - - partition@4 { - label = "U-boot"; - reg = <0x00080000 0x001e0000>; - }; - - partition@5 { - label = "environment"; - reg = <0x00260000 0x00020000>; - }; - - partition@6 { - label = "Kernel"; - reg = <0x00280000 0x00500000>; - }; - - partition@7 { - label = "File-System"; - reg = <0x00780000 0x0F880000>; - }; - }; }; #include "tps65910.dtsi" -&mcasp1 { - pinctrl-names = "default"; - pinctrl-0 = <&am335x_evm_audio_pins>; - - status = "okay"; - - op-mode = <0>; /* MCASP_IIS_MODE */ - tdm-slots = <2>; - /* 4 serializers */ - serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */ - 0 0 1 2 - >; - tx-num-evt = <1>; - rx-num-evt = <1>; -}; - &tps { vcc1-supply = <&vbat>; vcc2-supply = <&vbat>; @@ -596,8 +477,6 @@ }; vmmc_reg: regulator@12 { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; regulator-always-on; }; }; @@ -630,7 +509,7 @@ tsc { ti,wires = <4>; ti,x-plate-resistance = <200>; - ti,coordinate-readouts = <5>; + ti,coordiante-readouts = <5>; ti,wire-config = <0x00 0x11 0x22 0x33>; }; @@ -638,17 +517,3 @@ ti,adc-channels = <4 5 6 7>; }; }; - -&mmc1 { - status = "okay"; - vmmc-supply = <&vmmc_reg>; - bus-width = <4>; -}; - -&sham { - status = "okay"; -}; - -&aes { - status = "okay"; -}; diff --git a/arch/arm/boot/dts/am335x-evmsk.dts b/arch/arm/boot/dts/am335x-evmsk.dts index 4718ec4..4f339fa 100644 --- a/arch/arm/boot/dts/am335x-evmsk.dts +++ b/arch/arm/boot/dts/am335x-evmsk.dts @@ -31,6 +31,210 @@ reg = <0x80000000 0x10000000>; /* 256 MB */ }; + am33xx_pinmux: pinmux@44e10800 { + pinctrl-names = "default"; + pinctrl-0 = <&gpio_keys_s0 &clkout2_pin>; + + user_leds_s0: user_leds_s0 { + pinctrl-single,pins = < + 0x10 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad4.gpio1_4 */ + 0x14 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad5.gpio1_5 */ + 0x18 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad6.gpio1_6 */ + 0x1c (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad7.gpio1_7 */ + >; + }; + + gpio_keys_s0: gpio_keys_s0 { + pinctrl-single,pins = < + 0x94 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_oen_ren.gpio2_3 */ + 0x90 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_advn_ale.gpio2_2 */ + 0x70 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_wait0.gpio0_30 */ + 0x9c (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ben0_cle.gpio2_5 */ + >; + }; + + i2c0_pins: pinmux_i2c0_pins { + pinctrl-single,pins = < + 0x188 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */ + 0x18c (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */ + >; + }; + + uart0_pins: pinmux_uart0_pins { + pinctrl-single,pins = < + 0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */ + 0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */ + >; + }; + + clkout2_pin: pinmux_clkout2_pin { + pinctrl-single,pins = < + 0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */ + >; + }; + + ecap2_pins: backlight_pins { + pinctrl-single,pins = < + 0x19c 0x4 /* mcasp0_ahclkr.ecap2_in_pwm2_out MODE4 */ + >; + }; + + cpsw_default: cpsw_default { + pinctrl-single,pins = < + /* Slave 1 */ + 0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txen.rgmii1_tctl */ + 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */ + 0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd3.rgmii1_td3 */ + 0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd2.rgmii1_td2 */ + 0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_td1 */ + 0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_td0 */ + 0x12c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txclk.rgmii1_tclk */ + 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxclk.rgmii1_rclk */ + 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd3.rgmii1_rd3 */ + 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd2.rgmii1_rd2 */ + 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd1.rgmii1_rd1 */ + 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd0.rgmii1_rd0 */ + + /* Slave 2 */ + 0x40 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a0.rgmii2_tctl */ + 0x44 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a1.rgmii2_rctl */ + 0x48 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a2.rgmii2_td3 */ + 0x4c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a3.rgmii2_td2 */ + 0x50 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a4.rgmii2_td1 */ + 0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a5.rgmii2_td0 */ + 0x58 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a6.rgmii2_tclk */ + 0x5c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a7.rgmii2_rclk */ + 0x60 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a8.rgmii2_rd3 */ + 0x64 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a9.rgmii2_rd2 */ + 0x68 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a10.rgmii2_rd1 */ + 0x6c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a11.rgmii2_rd0 */ + >; + }; + + cpsw_sleep: cpsw_sleep { + pinctrl-single,pins = < + /* Slave 1 reset value */ + 0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7) + + /* Slave 2 reset value*/ + 0x40 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x44 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x48 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x4c (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x50 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x54 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x58 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x5c (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x60 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x64 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x68 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x6c (PIN_INPUT_PULLDOWN | MUX_MODE7) + >; + }; + + davinci_mdio_default: davinci_mdio_default { + pinctrl-single,pins = < + /* MDIO */ + 0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */ + 0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */ + >; + }; + + davinci_mdio_sleep: davinci_mdio_sleep { + pinctrl-single,pins = < + /* MDIO reset value */ + 0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7) + >; + }; + }; + + ocp { + uart0: serial@44e09000 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pins>; + + status = "okay"; + }; + + i2c0: i2c@44e0b000 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c0_pins>; + + status = "okay"; + clock-frequency = <400000>; + + tps: tps@2d { + reg = <0x2d>; + }; + + lis331dlh: lis331dlh@18 { + compatible = "st,lis331dlh", "st,lis3lv02d"; + reg = <0x18>; + Vdd-supply = <&lis3_reg>; + Vdd_IO-supply = <&lis3_reg>; + + st,click-single-x; + st,click-single-y; + st,click-single-z; + st,click-thresh-x = <10>; + st,click-thresh-y = <10>; + st,click-thresh-z = <10>; + st,irq1-click; + st,irq2-click; + st,wakeup-x-lo; + st,wakeup-x-hi; + st,wakeup-y-lo; + st,wakeup-y-hi; + st,wakeup-z-lo; + st,wakeup-z-hi; + st,min-limit-x = <120>; + st,min-limit-y = <120>; + st,min-limit-z = <140>; + st,max-limit-x = <550>; + st,max-limit-y = <550>; + st,max-limit-z = <750>; + }; + }; + + musb: usb@47400000 { + status = "okay"; + + control@44e10000 { + status = "okay"; + }; + + usb-phy@47401300 { + status = "okay"; + }; + + usb@47401000 { + status = "okay"; + }; + }; + + epwmss2: epwmss@48304000 { + status = "okay"; + + ecap2: ecap@48304100 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&ecap2_pins>; + }; + }; + }; + vbat: fixedregulator@0 { compatible = "regulator-fixed"; regulator-name = "vbat"; @@ -115,240 +319,6 @@ brightness-levels = <0 58 61 66 75 90 125 170 255>; default-brightness-level = <8>; }; - - sound { - compatible = "ti,da830-evm-audio"; - ti,model = "AM335x-EVMSK"; - ti,audio-codec = <&tlv320aic3106>; - ti,mcasp-controller = <&mcasp1>; - ti,codec-clock-rate = <24576000>; - ti,audio-routing = - "Headphone Jack", "HPLOUT", - "Headphone Jack", "HPROUT"; - }; -}; - -&am33xx_pinmux { - pinctrl-names = "default"; - pinctrl-0 = <&gpio_keys_s0 &clkout2_pin>; - - user_leds_s0: user_leds_s0 { - pinctrl-single,pins = < - 0x10 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad4.gpio1_4 */ - 0x14 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad5.gpio1_5 */ - 0x18 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad6.gpio1_6 */ - 0x1c (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad7.gpio1_7 */ - >; - }; - - gpio_keys_s0: gpio_keys_s0 { - pinctrl-single,pins = < - 0x94 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_oen_ren.gpio2_3 */ - 0x90 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_advn_ale.gpio2_2 */ - 0x70 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_wait0.gpio0_30 */ - 0x9c (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ben0_cle.gpio2_5 */ - >; - }; - - i2c0_pins: pinmux_i2c0_pins { - pinctrl-single,pins = < - 0x188 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */ - 0x18c (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */ - >; - }; - - uart0_pins: pinmux_uart0_pins { - pinctrl-single,pins = < - 0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */ - 0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */ - >; - }; - - clkout2_pin: pinmux_clkout2_pin { - pinctrl-single,pins = < - 0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */ - >; - }; - - ecap2_pins: backlight_pins { - pinctrl-single,pins = < - 0x19c 0x4 /* mcasp0_ahclkr.ecap2_in_pwm2_out MODE4 */ - >; - }; - - cpsw_default: cpsw_default { - pinctrl-single,pins = < - /* Slave 1 */ - 0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txen.rgmii1_tctl */ - 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */ - 0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd3.rgmii1_td3 */ - 0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd2.rgmii1_td2 */ - 0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_td1 */ - 0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_td0 */ - 0x12c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txclk.rgmii1_tclk */ - 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxclk.rgmii1_rclk */ - 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd3.rgmii1_rd3 */ - 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd2.rgmii1_rd2 */ - 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd1.rgmii1_rd1 */ - 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd0.rgmii1_rd0 */ - - /* Slave 2 */ - 0x40 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a0.rgmii2_tctl */ - 0x44 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a1.rgmii2_rctl */ - 0x48 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a2.rgmii2_td3 */ - 0x4c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a3.rgmii2_td2 */ - 0x50 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a4.rgmii2_td1 */ - 0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a5.rgmii2_td0 */ - 0x58 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a6.rgmii2_tclk */ - 0x5c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a7.rgmii2_rclk */ - 0x60 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a8.rgmii2_rd3 */ - 0x64 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a9.rgmii2_rd2 */ - 0x68 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a10.rgmii2_rd1 */ - 0x6c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a11.rgmii2_rd0 */ - >; - }; - - cpsw_sleep: cpsw_sleep { - pinctrl-single,pins = < - /* Slave 1 reset value */ - 0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7) - - /* Slave 2 reset value*/ - 0x40 (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x44 (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x48 (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x4c (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x50 (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x54 (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x58 (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x5c (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x60 (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x64 (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x68 (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x6c (PIN_INPUT_PULLDOWN | MUX_MODE7) - >; - }; - - davinci_mdio_default: davinci_mdio_default { - pinctrl-single,pins = < - /* MDIO */ - 0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */ - 0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */ - >; - }; - - davinci_mdio_sleep: davinci_mdio_sleep { - pinctrl-single,pins = < - /* MDIO reset value */ - 0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7) - >; - }; - - mcasp1_pins: mcasp1_pins { - pinctrl-single,pins = < - 0x10c (PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_crs.mcasp1_aclkx */ - 0x110 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_rxerr.mcasp1_fsx */ - 0x108 (PIN_OUTPUT_PULLDOWN | MUX_MODE4) /* mii1_col.mcasp1_axr2 */ - 0x144 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* rmii1_ref_clk.mcasp1_axr3 */ - >; - }; -}; - -&uart0 { - pinctrl-names = "default"; - pinctrl-0 = <&uart0_pins>; - - status = "okay"; -}; - -&i2c0 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c0_pins>; - - status = "okay"; - clock-frequency = <400000>; - - tps: tps@2d { - reg = <0x2d>; - }; - - lis331dlh: lis331dlh@18 { - compatible = "st,lis331dlh", "st,lis3lv02d"; - reg = <0x18>; - Vdd-supply = <&lis3_reg>; - Vdd_IO-supply = <&lis3_reg>; - - st,click-single-x; - st,click-single-y; - st,click-single-z; - st,click-thresh-x = <10>; - st,click-thresh-y = <10>; - st,click-thresh-z = <10>; - st,irq1-click; - st,irq2-click; - st,wakeup-x-lo; - st,wakeup-x-hi; - st,wakeup-y-lo; - st,wakeup-y-hi; - st,wakeup-z-lo; - st,wakeup-z-hi; - st,min-limit-x = <120>; - st,min-limit-y = <120>; - st,min-limit-z = <140>; - st,max-limit-x = <550>; - st,max-limit-y = <550>; - st,max-limit-z = <750>; - }; - - tlv320aic3106: tlv320aic3106@1b { - compatible = "ti,tlv320aic3106"; - reg = <0x1b>; - status = "okay"; - - /* Regulators */ - AVDD-supply = <&vaux2_reg>; - IOVDD-supply = <&vaux2_reg>; - DRVDD-supply = <&vaux2_reg>; - DVDD-supply = <&vbat>; - }; -}; - -&usb { - status = "okay"; - - control@44e10000 { - status = "okay"; - }; - - usb-phy@47401300 { - status = "okay"; - }; - - usb@47401000 { - status = "okay"; - }; -}; - -&epwmss2 { - status = "okay"; - - ecap2: ecap@48304100 { - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&ecap2_pins>; - }; }; #include "tps65910.dtsi" @@ -423,8 +393,6 @@ }; vmmc_reg: regulator@12 { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; regulator-always-on; }; }; @@ -451,47 +419,3 @@ phy_id = <&davinci_mdio>, <1>; phy-mode = "rgmii-txid"; }; - -&mmc1 { - status = "okay"; - vmmc-supply = <&vmmc_reg>; - bus-width = <4>; -}; - -&sham { - status = "okay"; -}; - -&aes { - status = "okay"; -}; - -&gpio0 { - ti,no-reset-on-init; -}; - -&mcasp1 { - pinctrl-names = "default"; - pinctrl-0 = <&mcasp1_pins>; - - status = "okay"; - - op-mode = <0>; /* MCASP_IIS_MODE */ - tdm-slots = <2>; - /* 4 serializers */ - serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */ - 0 0 1 2 - >; - tx-num-evt = <1>; - rx-num-evt = <1>; -}; - -&tscadc { - status = "okay"; - tsc { - ti,wires = <4>; - ti,x-plate-resistance = <200>; - ti,coordinate-readouts = <5>; - ti,wire-config = <0x00 0x11 0x22 0x33>; - }; -}; diff --git a/arch/arm/boot/dts/am335x-igep0033.dtsi b/arch/arm/boot/dts/am335x-igep0033.dtsi deleted file mode 100644 index 7063311..0000000 --- a/arch/arm/boot/dts/am335x-igep0033.dtsi +++ /dev/null @@ -1,307 +0,0 @@ -/* - * am335x-igep0033.dtsi - Device Tree file for IGEP COM AQUILA AM335x - * - * Copyright (C) 2013 ISEE 2007 SL - http://www.isee.biz - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -/dts-v1/; - -#include "am33xx.dtsi" - -/ { - cpus { - cpu@0 { - cpu0-supply = <&vdd1_reg>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x80000000 0x10000000>; /* 256 MB */ - }; - - leds { - pinctrl-names = "default"; - pinctrl-0 = <&leds_pins>; - - compatible = "gpio-leds"; - - led@0 { - label = "com:green:user"; - gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>; - default-state = "on"; - }; - }; - - vbat: fixedregulator@0 { - compatible = "regulator-fixed"; - regulator-name = "vbat"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - regulator-boot-on; - }; - - vmmc: fixedregulator@0 { - compatible = "regulator-fixed"; - regulator-name = "vmmc"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - }; -}; - -&am33xx_pinmux { - i2c0_pins: pinmux_i2c0_pins { - pinctrl-single,pins = < - 0x188 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */ - 0x18c (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */ - >; - }; - - nandflash_pins: pinmux_nandflash_pins { - pinctrl-single,pins = < - 0x0 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad0.gpmc_ad0 */ - 0x4 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad1.gpmc_ad1 */ - 0x8 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad2.gpmc_ad2 */ - 0xc (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad3.gpmc_ad3 */ - 0x10 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad4.gpmc_ad4 */ - 0x14 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad5.gpmc_ad5 */ - 0x18 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad6.gpmc_ad6 */ - 0x1c (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad7.gpmc_ad7 */ - 0x70 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_wait0.gpmc_wait0 */ - 0x74 (PIN_INPUT_PULLUP | MUX_MODE7) /* gpmc_wpn.gpio0_30 */ - 0x7c (PIN_OUTPUT | MUX_MODE0) /* gpmc_csn0.gpmc_csn0 */ - 0x90 (PIN_OUTPUT | MUX_MODE0) /* gpmc_advn_ale.gpmc_advn_ale */ - 0x94 (PIN_OUTPUT | MUX_MODE0) /* gpmc_oen_ren.gpmc_oen_ren */ - 0x98 (PIN_OUTPUT | MUX_MODE0) /* gpmc_wen.gpmc_wen */ - 0x9c (PIN_OUTPUT | MUX_MODE0) /* gpmc_be0n_cle.gpmc_be0n_cle */ - >; - }; - - uart0_pins: pinmux_uart0_pins { - pinctrl-single,pins = < - 0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */ - 0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */ - >; - }; - - leds_pins: pinmux_leds_pins { - pinctrl-single,pins = < - 0x5c (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a7.gpio1_23 */ - >; - }; -}; - -&cpsw_emac0 { - phy_id = <&davinci_mdio>, <0>; -}; - -&cpsw_emac1 { - phy_id = <&davinci_mdio>, <1>; -}; - -&elm { - status = "okay"; -}; - -&gpmc { - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&nandflash_pins>; - - ranges = <0 0 0x08000000 0x10000000>; /* CS0: NAND */ - - nand@0,0 { - reg = <0 0 0>; /* CS0, offset 0 */ - nand-bus-width = <8>; - ti,nand-ecc-opt = "bch8"; - gpmc,device-nand = "true"; - gpmc,device-width = <1>; - gpmc,sync-clk-ps = <0>; - gpmc,cs-on-ns = <0>; - gpmc,cs-rd-off-ns = <44>; - gpmc,cs-wr-off-ns = <44>; - gpmc,adv-on-ns = <6>; - gpmc,adv-rd-off-ns = <34>; - gpmc,adv-wr-off-ns = <44>; - gpmc,we-on-ns = <0>; - gpmc,we-off-ns = <40>; - gpmc,oe-on-ns = <0>; - gpmc,oe-off-ns = <54>; - gpmc,access-ns = <64>; - gpmc,rd-cycle-ns = <82>; - gpmc,wr-cycle-ns = <82>; - gpmc,wait-on-read = "true"; - gpmc,wait-on-write = "true"; - gpmc,bus-turnaround-ns = <0>; - gpmc,cycle2cycle-delay-ns = <0>; - gpmc,clk-activation-ns = <0>; - gpmc,wait-monitoring-ns = <0>; - gpmc,wr-access-ns = <40>; - gpmc,wr-data-mux-bus-ns = <0>; - - #address-cells = <1>; - #size-cells = <1>; - elm_id = <&elm>; - - /* MTD partition table */ - partition@0 { - label = "SPL"; - reg = <0x00000000 0x000080000>; - }; - - partition@1 { - label = "U-boot"; - reg = <0x00080000 0x001e0000>; - }; - - partition@2 { - label = "U-Boot Env"; - reg = <0x00260000 0x00020000>; - }; - - partition@3 { - label = "Kernel"; - reg = <0x00280000 0x00500000>; - }; - - partition@4 { - label = "File System"; - reg = <0x00780000 0x007880000>; - }; - }; -}; - -&i2c0 { - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&i2c0_pins>; - - clock-frequency = <400000>; - - tps: tps@2d { - reg = <0x2d>; - }; -}; - -&mmc1 { - status = "okay"; - vmmc-supply = <&vmmc>; - bus-width = <4>; -}; - -&uart0 { - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&uart0_pins>; -}; - -&usb { - status = "okay"; - - control@44e10000 { - status = "okay"; - }; - - usb-phy@47401300 { - status = "okay"; - }; - - usb-phy@47401b00 { - status = "okay"; - }; - - usb@47401000 { - status = "okay"; - }; - - usb@47401800 { - status = "okay"; - dr_mode = "host"; - }; - - dma-controller@07402000 { - status = "okay"; - }; -}; - -#include "tps65910.dtsi" - -&tps { - vcc1-supply = <&vbat>; - vcc2-supply = <&vbat>; - vcc3-supply = <&vbat>; - vcc4-supply = <&vbat>; - vcc5-supply = <&vbat>; - vcc6-supply = <&vbat>; - vcc7-supply = <&vbat>; - vccio-supply = <&vbat>; - - regulators { - vrtc_reg: regulator@0 { - regulator-always-on; - }; - - vio_reg: regulator@1 { - regulator-always-on; - }; - - vdd1_reg: regulator@2 { - /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */ - regulator-name = "vdd_mpu"; - regulator-min-microvolt = <912500>; - regulator-max-microvolt = <1312500>; - regulator-boot-on; - regulator-always-on; - }; - - vdd2_reg: regulator@3 { - /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */ - regulator-name = "vdd_core"; - regulator-min-microvolt = <912500>; - regulator-max-microvolt = <1150000>; - regulator-boot-on; - regulator-always-on; - }; - - vdd3_reg: regulator@4 { - regulator-always-on; - }; - - vdig1_reg: regulator@5 { - regulator-always-on; - }; - - vdig2_reg: regulator@6 { - regulator-always-on; - }; - - vpll_reg: regulator@7 { - regulator-always-on; - }; - - vdac_reg: regulator@8 { - regulator-always-on; - }; - - vaux1_reg: regulator@9 { - regulator-always-on; - }; - - vaux2_reg: regulator@10 { - regulator-always-on; - }; - - vaux33_reg: regulator@11 { - regulator-always-on; - }; - - vmmc_reg: regulator@12 { - regulator-always-on; - }; - }; -}; - diff --git a/arch/arm/boot/dts/am335x-nano.dts b/arch/arm/boot/dts/am335x-nano.dts deleted file mode 100644 index 9907b49..0000000 --- a/arch/arm/boot/dts/am335x-nano.dts +++ /dev/null @@ -1,431 +0,0 @@ -/* - * Copyright (C) 2013 Newflow Ltd - http://www.newflow.co.uk/ - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -/dts-v1/; - -#include "am33xx.dtsi" - -/ { - model = "Newflow AM335x NanoBone"; - compatible = "ti,am33xx"; - - cpus { - cpu@0 { - cpu0-supply = <&dcdc2_reg>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x80000000 0x10000000>; /* 256 MB */ - }; - - leds { - compatible = "gpio-leds"; - - led@0 { - label = "nanobone:green:usr1"; - gpios = <&gpio1 5 0>; - default-state = "off"; - }; - }; -}; - -&am33xx_pinmux { - pinctrl-names = "default"; - pinctrl-0 = <&misc_pins>; - - misc_pins: misc_pins { - pinctrl-single,pins = < - 0x15c (PIN_OUTPUT | MUX_MODE7) /* spi0_cs0.gpio0_5 */ - >; - }; - - gpmc_pins: gpmc_pins { - pinctrl-single,pins = < - 0x0 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad0.gpmc_ad0 */ - 0x4 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad1.gpmc_ad1 */ - 0x8 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad2.gpmc_ad2 */ - 0xc (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad3.gpmc_ad3 */ - 0x10 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad4.gpmc_ad4 */ - 0x14 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad5.gpmc_ad5 */ - 0x18 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad6.gpmc_ad6 */ - 0x1c (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad7.gpmc_ad7 */ - 0x20 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad8.gpmc_ad8 */ - 0x24 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad9.gpmc_ad9 */ - 0x28 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad10.gpmc_ad10 */ - 0x2c (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad11.gpmc_ad11 */ - 0x30 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad12.gpmc_ad12 */ - 0x34 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad13.gpmc_ad13 */ - 0x38 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad14.gpmc_ad14 */ - 0x3c (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad15.gpmc_ad15 */ - - 0x70 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_wait0.gpmc_wait0 */ - 0x7c (PIN_OUTPUT | MUX_MODE0) /* gpmc_csn0.gpmc_csn0 */ - 0x80 (PIN_OUTPUT | MUX_MODE0) /* gpmc_csn1.gpmc_csn1 */ - 0x84 (PIN_OUTPUT | MUX_MODE0) /* gpmc_csn2.gpmc_csn2 */ - 0x88 (PIN_OUTPUT | MUX_MODE0) /* gpmc_csn3.gpmc_csn3 */ - - 0x90 (PIN_OUTPUT | MUX_MODE0) /* gpmc_advn_ale.gpmc_advn_ale */ - 0x94 (PIN_OUTPUT | MUX_MODE0) /* gpmc_oen_ren.gpmc_oen_ren */ - 0x98 (PIN_OUTPUT | MUX_MODE0) /* gpmc_wen.gpmc_wen */ - 0x9c (PIN_OUTPUT | MUX_MODE0) /* gpmc_ben0_cle.gpmc_ben0_cle */ - - 0xa4 (PIN_OUTPUT | MUX_MODE1) /* lcd_data1.gpmc_a1 */ - 0xa8 (PIN_OUTPUT | MUX_MODE1) /* lcd_data2.gpmc_a2 */ - 0xac (PIN_OUTPUT | MUX_MODE1) /* lcd_data3.gpmc_a3 */ - 0xb0 (PIN_OUTPUT | MUX_MODE1) /* lcd_data4.gpmc_a4 */ - 0xb4 (PIN_OUTPUT | MUX_MODE1) /* lcd_data5.gpmc_a5 */ - 0xb8 (PIN_OUTPUT | MUX_MODE1) /* lcd_data6.gpmc_a6 */ - 0xbc (PIN_OUTPUT | MUX_MODE1) /* lcd_data7.gpmc_a7 */ - - 0xe0 (PIN_OUTPUT | MUX_MODE1) /* lcd_vsync.gpmc_a8 */ - 0xe4 (PIN_OUTPUT | MUX_MODE1) /* lcd_hsync.gpmc_a9 */ - 0xe8 (PIN_OUTPUT | MUX_MODE1) /* lcd_pclk.gpmc_a10 */ - >; - }; - - i2c0_pins: i2c0_pins { - pinctrl-single,pins = < - 0x188 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* i2c0_sda.i2c0_sda */ - 0x18c (PIN_INPUT_PULLDOWN | MUX_MODE0) /* i2c0_scl.i2c0_scl */ - >; - }; - - uart0_pins: uart0_pins { - pinctrl-single,pins = < - 0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */ - 0x174 (PIN_OUTPUT | MUX_MODE0) /* uart0_txd.uart0_txd */ - >; - }; - - uart1_pins: uart1_pins { - pinctrl-single,pins = < - 0x178 (PIN_OUTPUT | MUX_MODE7) /* uart1_ctsn.uart1_ctsn */ - 0x17c (PIN_OUTPUT | MUX_MODE7) /* uart1_rtsn.uart1_rtsn */ - 0x180 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart1_rxd.uart1_rxd */ - 0x184 (PIN_OUTPUT | MUX_MODE0) /* uart1_txd.uart1_txd */ - >; - }; - - uart2_pins: uart2_pins { - pinctrl-single,pins = < - 0xc0 (PIN_INPUT_PULLUP | MUX_MODE7) /* lcd_data8.gpio2[14] */ - 0xc4 (PIN_OUTPUT | MUX_MODE7) /* lcd_data9.gpio2[15] */ - 0x150 (PIN_INPUT | MUX_MODE1) /* spi0_sclk.uart2_rxd */ - 0x154 (PIN_OUTPUT | MUX_MODE1) /* spi0_d0.uart2_txd */ - >; - }; - - uart3_pins: uart3_pins { - pinctrl-single,pins = < - 0xc8 (PIN_INPUT_PULLUP | MUX_MODE6) /* lcd_data10.uart3_ctsn */ - 0xcc (PIN_OUTPUT | MUX_MODE6) /* lcd_data11.uart3_rtsn */ - 0x160 (PIN_INPUT | MUX_MODE1) /* spi0_cs1.uart3_rxd */ - 0x164 (PIN_OUTPUT | MUX_MODE1) /* ecap0_in_pwm0_out.uart3_txd */ - >; - }; - - uart4_pins: uart4_pins { - pinctrl-single,pins = < - 0xd0 (PIN_INPUT_PULLUP | MUX_MODE6) /* lcd_data12.uart4_ctsn */ - 0xd4 (PIN_OUTPUT | MUX_MODE6) /* lcd_data13.uart4_rtsn */ - 0x168 (PIN_INPUT | MUX_MODE1) /* uart0_ctsn.uart4_rxd */ - 0x16c (PIN_OUTPUT | MUX_MODE1) /* uart0_rtsn.uart4_txd */ - >; - }; - - uart5_pins: uart5_pins { - pinctrl-single,pins = < - 0xd8 (PIN_INPUT | MUX_MODE4) /* lcd_data14.uart5_rxd */ - 0x144 (PIN_OUTPUT | MUX_MODE3) /* rmiii1_refclk.uart5_txd */ - >; - }; - - mmc1_pins: mmc1_pins { - pinctrl-single,pins = < - 0xf0 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat0.mmc0_dat0 */ - 0xf4 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat1.mmc0_dat1 */ - 0xf8 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat2.mmc0_dat2 */ - 0xfc (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat3.mmc0_dat3 */ - 0x100 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_clk.mmc0_clk */ - 0x104 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_cmd.mmc0_cmd */ - 0x1e8 (PIN_INPUT_PULLUP | MUX_MODE7) /* emu1.gpio3[8] */ - 0x1a0 (PIN_INPUT_PULLUP | MUX_MODE7) /* mcasp0_aclkr.gpio3[18] */ - >; - }; -}; - -&uart0 { - pinctrl-names = "default"; - pinctrl-0 = <&uart0_pins>; - status = "okay"; -}; - -&uart1 { - pinctrl-names = "default"; - pinctrl-0 = <&uart1_pins>; - status = "okay"; - rts-gpio = <&gpio0 13 GPIO_ACTIVE_HIGH>; - rs485-rts-active-high; - rs485-rx-during-tx; - rs485-rts-delay = <1 1>; - linux,rs485-enabled-at-boot-time; -}; - -&uart2 { - pinctrl-names = "default"; - pinctrl-0 = <&uart2_pins>; - status = "okay"; - rts-gpio = <&gpio2 15 GPIO_ACTIVE_HIGH>; - rs485-rts-active-high; - rs485-rts-delay = <1 1>; - linux,rs485-enabled-at-boot-time; -}; - -&uart3 { - pinctrl-names = "default"; - pinctrl-0 = <&uart3_pins>; - status = "okay"; -}; - -&uart4 { - pinctrl-names = "default"; - pinctrl-0 = <&uart4_pins>; - status = "okay"; -}; - -&uart5 { - pinctrl-names = "default"; - pinctrl-0 = <&uart5_pins>; - status = "okay"; -}; - -&i2c0 { - status = "okay"; - pinctrl-names = "default"; - clock-frequency = <400000>; - pinctrl-names = "default"; - pinctrl-0 = <&i2c0_pins>; - - gpio@20 { - compatible = "mcp,mcp23017"; - reg = <0x20>; - }; - - tps: tps@24 { - reg = <0x24>; - }; - - eeprom@53 { - compatible = "mcp,24c02"; - reg = <0x53>; - pagesize = <8>; - }; - - rtc@68 { - compatible = "dallas,ds1307"; - reg = <0x68>; - }; -}; - -&elm { - status = "okay"; -}; - -&gpmc { - compatible = "ti,am3352-gpmc"; - ti,hwmods = "gpmc"; - status = "okay"; - gpmc,num-waitpins = <2>; - pinctrl-names = "default"; - pinctrl-0 = <&gpmc_pins>; - - #address-cells = <2>; - #size-cells = <1>; - ranges = <0 0 0x08000000 0x08000000>; /* CS0: NOR 128M */ - - nor@0,0 { - reg = <0 0x00000000 0x08000000>; - compatible = "cfi-flash"; - linux,mtd-name = "spansion,s29gl010p11t"; - bank-width = <2>; - - gpmc,mux-add-data = <2>; - - gpmc,sync-clk-ps = <0>; - gpmc,cs-on-ns = <0>; - gpmc,cs-rd-off-ns = <160>; - gpmc,cs-wr-off-ns = <160>; - gpmc,adv-on-ns = <10>; - gpmc,adv-rd-off-ns = <30>; - gpmc,adv-wr-off-ns = <30>; - gpmc,oe-on-ns = <40>; - gpmc,oe-off-ns = <160>; - gpmc,we-on-ns = <40>; - gpmc,we-off-ns = <160>; - gpmc,rd-cycle-ns = <160>; - gpmc,wr-cycle-ns = <160>; - gpmc,access-ns = <150>; - gpmc,page-burst-access-ns = <10>; - gpmc,cycle2cycle-samecsen; - gpmc,cycle2cycle-delay-ns = <20>; - gpmc,wr-data-mux-bus-ns = <70>; - gpmc,wr-access-ns = <80>; - - #address-cells = <1>; - #size-cells = <1>; - - /* - MTD partition table - =================== - +------------+-->0x00000000-> U-Boot start - | | - | |-->0x000BFFFF-> U-Boot end - | |-->0x000C0000-> ENV1 start - | | - | |-->0x000DFFFF-> ENV1 end - | |-->0x000E0000-> ENV2 start - | | - | |-->0x000FFFFF-> ENV2 end - | |-->0x00100000-> Kernel start - | | - | |-->0x004FFFFF-> Kernel end - | |-->0x00500000-> File system start - | | - | |-->0x014FFFFF-> File system end - | |-->0x01500000-> User data start - | | - | |-->0x03FFFFFF-> User data end - | |-->0x04000000-> Data storage start - | | - +------------+-->0x08000000-> NOR end (Free end) - */ - partition@0 { - label = "boot"; - reg = <0x00000000 0x000c0000>; /* 768KB */ - }; - - partition@1 { - label = "env1"; - reg = <0x000c0000 0x00020000>; /* 128KB */ - }; - - partition@2 { - label = "env2"; - reg = <0x000e0000 0x00020000>; /* 128KB */ - }; - - partition@3 { - label = "kernel"; - reg = <0x00100000 0x00400000>; /* 4MB */ - }; - - partition@4 { - label = "rootfs"; - reg = <0x00500000 0x01000000>; /* 16MB */ - }; - - partition@5 { - label = "user"; - reg = <0x01500000 0x02b00000>; /* 43MB */ - }; - - partition@6 { - label = "data"; - reg = <0x04000000 0x04000000>; /* 64MB */ - }; - }; -}; - -&mac { - dual_emac = <1>; -}; - -&cpsw_emac0 { - phy_id = <&davinci_mdio>, <0>; - dual_emac_res_vlan = <1>; -}; - -&cpsw_emac1 { - phy_id = <&davinci_mdio>, <1>; - dual_emac_res_vlan = <2>; -}; - -&mmc1 { - status = "okay"; - vmmc-supply = <&ldo4_reg>; - pinctrl-names = "default"; - pinctrl-0 = <&mmc1_pins>; - bus-width = <4>; - cd-gpios = <&gpio3 8 0>; - wp-gpios = <&gpio3 18 0>; -}; - -#include "tps65217.dtsi" - -&tps { - regulators { - dcdc1_reg: regulator@0 { - /* +1.5V voltage with ±4% tolerance */ - regulator-min-microvolt = <1450000>; - regulator-max-microvolt = <1550000>; - regulator-boot-on; - regulator-always-on; - }; - - dcdc2_reg: regulator@1 { - /* VDD_MPU voltage limits 0.95V - 1.1V with ±4% tolerance */ - regulator-name = "vdd_mpu"; - regulator-min-microvolt = <915000>; - regulator-max-microvolt = <1140000>; - regulator-boot-on; - regulator-always-on; - }; - - dcdc3_reg: regulator@2 { - /* VDD_CORE voltage limits 0.95V - 1.1V with ±4% tolerance */ - regulator-name = "vdd_core"; - regulator-min-microvolt = <915000>; - regulator-max-microvolt = <1140000>; - regulator-boot-on; - regulator-always-on; - }; - - ldo1_reg: regulator@3 { - /* +1.8V voltage with ±4% tolerance */ - regulator-min-microvolt = <1750000>; - regulator-max-microvolt = <1870000>; - regulator-boot-on; - regulator-always-on; - }; - - ldo2_reg: regulator@4 { - /* +3.3V voltage with ±4% tolerance */ - regulator-min-microvolt = <3175000>; - regulator-max-microvolt = <3430000>; - regulator-boot-on; - regulator-always-on; - }; - - ldo3_reg: regulator@5 { - /* +1.8V voltage with ±4% tolerance */ - regulator-min-microvolt = <1750000>; - regulator-max-microvolt = <1870000>; - regulator-boot-on; - regulator-always-on; - }; - - ldo4_reg: regulator@6 { - /* +3.3V voltage with ±4% tolerance */ - regulator-min-microvolt = <3175000>; - regulator-max-microvolt = <3430000>; - regulator-boot-on; - regulator-always-on; - }; - }; -}; diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi index f6d8ffe..f9c5da9 100644 --- a/arch/arm/boot/dts/am33xx.dtsi +++ b/arch/arm/boot/dts/am33xx.dtsi @@ -18,9 +18,6 @@ interrupt-parent = <&intc>; aliases { - i2c0 = &i2c0; - i2c1 = &i2c1; - i2c2 = &i2c2; serial0 = &uart0; serial1 = &uart1; serial2 = &uart2; @@ -33,8 +30,6 @@ usb1 = &usb1; phy0 = &usb0_phy; phy1 = &usb1_phy; - ethernet0 = &cpsw_emac0; - ethernet1 = &cpsw_emac1; }; cpus { @@ -62,11 +57,6 @@ }; }; - pmu { - compatible = "arm,cortex-a8-pmu"; - interrupts = <3>; - }; - /* * The soc node represents the soc top level view. It is uses for IPs * that are not memory mapped in the MPU view or for the MPU itself. @@ -110,25 +100,13 @@ reg = <0x48200000 0x1000>; }; - edma: edma@49000000 { - compatible = "ti,edma3"; - ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2"; - reg = <0x49000000 0x10000>, - <0x44e10f90 0x10>; - interrupts = <12 13 14>; - #dma-cells = <1>; - dma-channels = <64>; - ti,edma-regions = <4>; - ti,edma-slots = <256>; - }; - gpio0: gpio@44e07000 { compatible = "ti,omap4-gpio"; ti,hwmods = "gpio1"; gpio-controller; #gpio-cells = <2>; interrupt-controller; - #interrupt-cells = <2>; + #interrupt-cells = <1>; reg = <0x44e07000 0x1000>; interrupts = <96>; }; @@ -139,7 +117,7 @@ gpio-controller; #gpio-cells = <2>; interrupt-controller; - #interrupt-cells = <2>; + #interrupt-cells = <1>; reg = <0x4804c000 0x1000>; interrupts = <98>; }; @@ -150,7 +128,7 @@ gpio-controller; #gpio-cells = <2>; interrupt-controller; - #interrupt-cells = <2>; + #interrupt-cells = <1>; reg = <0x481ac000 0x1000>; interrupts = <32>; }; @@ -161,7 +139,7 @@ gpio-controller; #gpio-cells = <2>; interrupt-controller; - #interrupt-cells = <2>; + #interrupt-cells = <1>; reg = <0x481ae000 0x1000>; interrupts = <62>; }; @@ -250,50 +228,6 @@ status = "disabled"; }; - mmc1: mmc@48060000 { - compatible = "ti,omap4-hsmmc"; - ti,hwmods = "mmc1"; - ti,dual-volt; - ti,needs-special-reset; - ti,needs-special-hs-handling; - dmas = <&edma 24 - &edma 25>; - dma-names = "tx", "rx"; - interrupts = <64>; - interrupt-parent = <&intc>; - reg = <0x48060000 0x1000>; - status = "disabled"; - }; - - mmc2: mmc@481d8000 { - compatible = "ti,omap4-hsmmc"; - ti,hwmods = "mmc2"; - ti,needs-special-reset; - dmas = <&edma 2 - &edma 3>; - dma-names = "tx", "rx"; - interrupts = <28>; - interrupt-parent = <&intc>; - reg = <0x481d8000 0x1000>; - status = "disabled"; - }; - - mmc3: mmc@47810000 { - compatible = "ti,omap4-hsmmc"; - ti,hwmods = "mmc3"; - ti,needs-special-reset; - interrupts = <29>; - interrupt-parent = <&intc>; - reg = <0x47810000 0x1000>; - status = "disabled"; - }; - - hwspinlock: spinlock@480ca000 { - compatible = "ti,omap4-hwspinlock"; - reg = <0x480ca000 0x1000>; - ti,hwmods = "spinlock"; - }; - wdt2: wdt@44e35000 { compatible = "ti,omap3-wdt"; ti,hwmods = "wd_timer2"; @@ -389,11 +323,6 @@ interrupts = <65>; ti,spi-num-cs = <2>; ti,hwmods = "spi0"; - dmas = <&edma 16 - &edma 17 - &edma 18 - &edma 19>; - dma-names = "tx0", "rx0", "tx1", "rx1"; status = "disabled"; }; @@ -405,11 +334,6 @@ interrupts = <125>; ti,spi-num-cs = <2>; ti,hwmods = "spi1"; - dmas = <&edma 42 - &edma 43 - &edma 44 - &edma 45>; - dma-names = "tx0", "rx0", "tx1", "rx1"; status = "disabled"; }; @@ -422,7 +346,7 @@ ti,hwmods = "usb_otg_hs"; status = "disabled"; - usb_ctrl_mod: control@44e10000 { + ctrl_mod: control@44e10000 { compatible = "ti,am335x-usb-ctrl-module"; reg = <0x44e10620 0x10 0x44e10648 0x4>; @@ -435,7 +359,7 @@ reg = <0x47401300 0x100>; reg-names = "phy"; status = "disabled"; - ti,ctrl_mod = <&usb_ctrl_mod>; + ti,ctrl_mod = <&ctrl_mod>; }; usb0: usb@47401000 { @@ -483,7 +407,7 @@ reg = <0x47401b00 0x100>; reg-names = "phy"; status = "disabled"; - ti,ctrl_mod = <&usb_ctrl_mod>; + ti,ctrl_mod = <&ctrl_mod>; }; usb1: usb@47401800 { @@ -670,12 +594,6 @@ /* Filled in by U-Boot */ mac-address = [ 00 00 00 00 00 00 ]; }; - - phy_sel: cpsw-phy-sel@44e10650 { - compatible = "ti,am3352-cpsw-phy-sel"; - reg= <0x44e10650 0x4>; - reg-names = "gmii-sel"; - }; }; ocmcram: ocmcram@40300000 { @@ -689,7 +607,6 @@ reg = <0x44d00000 0x4000 /* M3 UMEM */ 0x44d80000 0x2000>; /* M3 DMEM */ ti,hwmods = "wkup_m3"; - ti,no-reset-on-init; }; elm: elm@48080000 { @@ -700,15 +617,6 @@ status = "disabled"; }; - lcdc: lcdc@4830e000 { - compatible = "ti,am33xx-tilcdc"; - reg = <0x4830e000 0x1000>; - interrupt-parent = <&intc>; - interrupts = <36>; - ti,hwmods = "lcdc"; - status = "disabled"; - }; - tscadc: tscadc@44e0d000 { compatible = "ti,am3359-tscadc"; reg = <0x44e0d000 0x1000>; @@ -729,7 +637,6 @@ gpmc: gpmc@50000000 { compatible = "ti,am3352-gpmc"; ti,hwmods = "gpmc"; - ti,no-idle-on-init; reg = <0x50000000 0x2000>; interrupts = <100>; gpmc,num-cs = <7>; @@ -738,59 +645,5 @@ #size-cells = <1>; status = "disabled"; }; - - sham: sham@53100000 { - compatible = "ti,omap4-sham"; - ti,hwmods = "sham"; - reg = <0x53100000 0x200>; - interrupts = <109>; - dmas = <&edma 36>; - dma-names = "rx"; - }; - - aes: aes@53500000 { - compatible = "ti,omap4-aes"; - ti,hwmods = "aes"; - reg = <0x53500000 0xa0>; - interrupts = <103>; - dmas = <&edma 6>, - <&edma 5>; - dma-names = "tx", "rx"; - }; - - mcasp0: mcasp@48038000 { - compatible = "ti,am33xx-mcasp-audio"; - ti,hwmods = "mcasp0"; - reg = <0x48038000 0x2000>, - <0x46000000 0x400000>; - reg-names = "mpu", "dat"; - interrupts = <80>, <81>; - interrupts-names = "tx", "rx"; - status = "disabled"; - dmas = <&edma 8>, - <&edma 9>; - dma-names = "tx", "rx"; - }; - - mcasp1: mcasp@4803C000 { - compatible = "ti,am33xx-mcasp-audio"; - ti,hwmods = "mcasp1"; - reg = <0x4803C000 0x2000>, - <0x46400000 0x400000>; - reg-names = "mpu", "dat"; - interrupts = <82>, <83>; - interrupts-names = "tx", "rx"; - status = "disabled"; - dmas = <&edma 10>, - <&edma 11>; - dma-names = "tx", "rx"; - }; - - rng: rng@48310000 { - compatible = "ti,omap4-rng"; - ti,hwmods = "rng"; - reg = <0x48310000 0x2000>; - interrupts = <111>; - }; }; }; diff --git a/arch/arm/boot/dts/am4372.dtsi b/arch/arm/boot/dts/am4372.dtsi index 974d103..ddc1df7 100644 --- a/arch/arm/boot/dts/am4372.dtsi +++ b/arch/arm/boot/dts/am4372.dtsi @@ -18,21 +18,12 @@ aliases { - i2c0 = &i2c0; - i2c1 = &i2c1; - i2c2 = &i2c2; serial0 = &uart0; - ethernet0 = &cpsw_emac0; - ethernet1 = &cpsw_emac1; }; cpus { - #address-cells = <1>; - #size-cells = <0>; cpu@0 { compatible = "arm,cortex-a9"; - device_type = "cpu"; - reg = <0>; }; }; @@ -44,100 +35,16 @@ <0x48240100 0x0100>; }; - l2-cache-controller@48242000 { - compatible = "arm,pl310-cache"; - reg = <0x48242000 0x1000>; - cache-unified; - cache-level = <2>; - }; - - am43xx_pinmux: pinmux@44e10800 { - compatible = "pinctrl-single"; - reg = <0x44e10800 0x31c>; - #address-cells = <1>; - #size-cells = <0>; - pinctrl-single,register-width = <32>; - pinctrl-single,function-mask = <0xffffffff>; - }; - ocp { compatible = "simple-bus"; #address-cells = <1>; #size-cells = <1>; ranges; - ti,hwmods = "l3_main"; - - edma: edma@49000000 { - compatible = "ti,edma3"; - ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2"; - reg = <0x49000000 0x10000>, - <0x44e10f90 0x10>; - interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; - #dma-cells = <1>; - dma-channels = <64>; - ti,edma-regions = <4>; - ti,edma-slots = <256>; - }; uart0: serial@44e09000 { compatible = "ti,am4372-uart","ti,omap2-uart"; reg = <0x44e09000 0x2000>; interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>; - ti,hwmods = "uart1"; - }; - - uart1: serial@48022000 { - compatible = "ti,am4372-uart","ti,omap2-uart"; - reg = <0x48022000 0x2000>; - interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; - ti,hwmods = "uart2"; - status = "disabled"; - }; - - uart2: serial@48024000 { - compatible = "ti,am4372-uart","ti,omap2-uart"; - reg = <0x48024000 0x2000>; - interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>; - ti,hwmods = "uart3"; - status = "disabled"; - }; - - uart3: serial@481a6000 { - compatible = "ti,am4372-uart","ti,omap2-uart"; - reg = <0x481a6000 0x2000>; - interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>; - ti,hwmods = "uart4"; - status = "disabled"; - }; - - uart4: serial@481a8000 { - compatible = "ti,am4372-uart","ti,omap2-uart"; - reg = <0x481a8000 0x2000>; - interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>; - ti,hwmods = "uart5"; - status = "disabled"; - }; - - uart5: serial@481aa000 { - compatible = "ti,am4372-uart","ti,omap2-uart"; - reg = <0x481aa000 0x2000>; - interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>; - ti,hwmods = "uart6"; - status = "disabled"; - }; - - mailbox: mailbox@480C8000 { - compatible = "ti,omap4-mailbox"; - reg = <0x480C8000 0x200>; - interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>; - ti,hwmods = "mailbox"; - ti,mbox-num-users = <4>; - ti,mbox-num-fifos = <8>; - ti,mbox-names = "wkup_m3"; - ti,mbox-data = <0 0 0 0>; - status = "disabled"; }; timer1: timer@44e31000 { @@ -145,523 +52,17 @@ reg = <0x44e31000 0x400>; interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>; ti,timer-alwon; - ti,hwmods = "timer1"; }; timer2: timer@48040000 { compatible = "ti,am4372-timer","ti,am335x-timer"; reg = <0x48040000 0x400>; interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>; - ti,hwmods = "timer2"; - }; - - timer3: timer@48042000 { - compatible = "ti,am4372-timer","ti,am335x-timer"; - reg = <0x48042000 0x400>; - interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; - ti,hwmods = "timer3"; - status = "disabled"; - }; - - timer4: timer@48044000 { - compatible = "ti,am4372-timer","ti,am335x-timer"; - reg = <0x48044000 0x400>; - interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>; - ti,timer-pwm; - ti,hwmods = "timer4"; - status = "disabled"; - }; - - timer5: timer@48046000 { - compatible = "ti,am4372-timer","ti,am335x-timer"; - reg = <0x48046000 0x400>; - interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>; - ti,timer-pwm; - ti,hwmods = "timer5"; - status = "disabled"; - }; - - timer6: timer@48048000 { - compatible = "ti,am4372-timer","ti,am335x-timer"; - reg = <0x48048000 0x400>; - interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>; - ti,timer-pwm; - ti,hwmods = "timer6"; - status = "disabled"; - }; - - timer7: timer@4804a000 { - compatible = "ti,am4372-timer","ti,am335x-timer"; - reg = <0x4804a000 0x400>; - interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>; - ti,timer-pwm; - ti,hwmods = "timer7"; - status = "disabled"; - }; - - timer8: timer@481c1000 { - compatible = "ti,am4372-timer","ti,am335x-timer"; - reg = <0x481c1000 0x400>; - interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>; - ti,hwmods = "timer8"; - status = "disabled"; - }; - - timer9: timer@4833d000 { - compatible = "ti,am4372-timer","ti,am335x-timer"; - reg = <0x4833d000 0x400>; - interrupts = <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>; - ti,hwmods = "timer9"; - status = "disabled"; - }; - - timer10: timer@4833f000 { - compatible = "ti,am4372-timer","ti,am335x-timer"; - reg = <0x4833f000 0x400>; - interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>; - ti,hwmods = "timer10"; - status = "disabled"; - }; - - timer11: timer@48341000 { - compatible = "ti,am4372-timer","ti,am335x-timer"; - reg = <0x48341000 0x400>; - interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>; - ti,hwmods = "timer11"; - status = "disabled"; }; counter32k: counter@44e86000 { compatible = "ti,am4372-counter32k","ti,omap-counter32k"; reg = <0x44e86000 0x40>; - ti,hwmods = "counter_32k"; - }; - - rtc@44e3e000 { - compatible = "ti,am4372-rtc","ti,da830-rtc"; - reg = <0x44e3e000 0x1000>; - interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>; - ti,hwmods = "rtc"; - status = "disabled"; - }; - - wdt@44e35000 { - compatible = "ti,am4372-wdt","ti,omap3-wdt"; - reg = <0x44e35000 0x1000>; - interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>; - ti,hwmods = "wd_timer2"; - }; - - gpio0: gpio@44e07000 { - compatible = "ti,am4372-gpio","ti,omap4-gpio"; - reg = <0x44e07000 0x1000>; - interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - ti,hwmods = "gpio1"; - status = "disabled"; - }; - - gpio1: gpio@4804c000 { - compatible = "ti,am4372-gpio","ti,omap4-gpio"; - reg = <0x4804c000 0x1000>; - interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - ti,hwmods = "gpio2"; - status = "disabled"; - }; - - gpio2: gpio@481ac000 { - compatible = "ti,am4372-gpio","ti,omap4-gpio"; - reg = <0x481ac000 0x1000>; - interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - ti,hwmods = "gpio3"; - status = "disabled"; - }; - - gpio3: gpio@481ae000 { - compatible = "ti,am4372-gpio","ti,omap4-gpio"; - reg = <0x481ae000 0x1000>; - interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - ti,hwmods = "gpio4"; - status = "disabled"; - }; - - gpio4: gpio@48320000 { - compatible = "ti,am4372-gpio","ti,omap4-gpio"; - reg = <0x48320000 0x1000>; - interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - ti,hwmods = "gpio5"; - status = "disabled"; - }; - - gpio5: gpio@48322000 { - compatible = "ti,am4372-gpio","ti,omap4-gpio"; - reg = <0x48322000 0x1000>; - interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - ti,hwmods = "gpio6"; - status = "disabled"; - }; - - i2c0: i2c@44e0b000 { - compatible = "ti,am4372-i2c","ti,omap4-i2c"; - reg = <0x44e0b000 0x1000>; - interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>; - ti,hwmods = "i2c1"; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - i2c1: i2c@4802a000 { - compatible = "ti,am4372-i2c","ti,omap4-i2c"; - reg = <0x4802a000 0x1000>; - interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; - ti,hwmods = "i2c2"; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - i2c2: i2c@4819c000 { - compatible = "ti,am4372-i2c","ti,omap4-i2c"; - reg = <0x4819c000 0x1000>; - interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; - ti,hwmods = "i2c3"; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - spi0: spi@48030000 { - compatible = "ti,am4372-mcspi","ti,omap4-mcspi"; - reg = <0x48030000 0x400>; - interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>; - ti,hwmods = "spi0"; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - mmc1: mmc@48060000 { - compatible = "ti,omap4-hsmmc"; - reg = <0x48060000 0x1000>; - ti,hwmods = "mmc1"; - ti,dual-volt; - ti,needs-special-reset; - dmas = <&edma 24 - &edma 25>; - dma-names = "tx", "rx"; - interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>; - status = "disabled"; - }; - - mmc2: mmc@481d8000 { - compatible = "ti,omap4-hsmmc"; - reg = <0x481d8000 0x1000>; - ti,hwmods = "mmc2"; - ti,needs-special-reset; - dmas = <&edma 2 - &edma 3>; - dma-names = "tx", "rx"; - interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>; - status = "disabled"; - }; - - mmc3: mmc@47810000 { - compatible = "ti,omap4-hsmmc"; - reg = <0x47810000 0x1000>; - ti,hwmods = "mmc3"; - ti,needs-special-reset; - interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; - status = "disabled"; - }; - - spi1: spi@481a0000 { - compatible = "ti,am4372-mcspi","ti,omap4-mcspi"; - reg = <0x481a0000 0x400>; - interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>; - ti,hwmods = "spi1"; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - spi2: spi@481a2000 { - compatible = "ti,am4372-mcspi","ti,omap4-mcspi"; - reg = <0x481a2000 0x400>; - interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>; - ti,hwmods = "spi2"; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - spi3: spi@481a4000 { - compatible = "ti,am4372-mcspi","ti,omap4-mcspi"; - reg = <0x481a4000 0x400>; - interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>; - ti,hwmods = "spi3"; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - spi4: spi@48345000 { - compatible = "ti,am4372-mcspi","ti,omap4-mcspi"; - reg = <0x48345000 0x400>; - interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>; - ti,hwmods = "spi4"; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - mac: ethernet@4a100000 { - compatible = "ti,am4372-cpsw","ti,cpsw"; - reg = <0x4a100000 0x800 - 0x4a101200 0x100>; - interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>; - #address-cells = <1>; - #size-cells = <1>; - ti,hwmods = "cpgmac0"; - status = "disabled"; - cpdma_channels = <8>; - ale_entries = <1024>; - bd_ram_size = <0x2000>; - no_bd_ram = <0>; - rx_descs = <64>; - mac_control = <0x20>; - slaves = <2>; - active_slave = <0>; - cpts_clock_mult = <0x80000000>; - cpts_clock_shift = <29>; - ranges; - - davinci_mdio: mdio@4a101000 { - compatible = "ti,am4372-mdio","ti,davinci_mdio"; - reg = <0x4a101000 0x100>; - #address-cells = <1>; - #size-cells = <0>; - ti,hwmods = "davinci_mdio"; - bus_freq = <1000000>; - status = "disabled"; - }; - - cpsw_emac0: slave@4a100200 { - /* Filled in by U-Boot */ - mac-address = [ 00 00 00 00 00 00 ]; - }; - - cpsw_emac1: slave@4a100300 { - /* Filled in by U-Boot */ - mac-address = [ 00 00 00 00 00 00 ]; - }; - }; - - epwmss0: epwmss@48300000 { - compatible = "ti,am4372-pwmss","ti,am33xx-pwmss"; - reg = <0x48300000 0x10>; - #address-cells = <1>; - #size-cells = <1>; - ranges; - ti,hwmods = "epwmss0"; - status = "disabled"; - - ecap0: ecap@48300100 { - compatible = "ti,am4372-ecap","ti,am33xx-ecap"; - reg = <0x48300100 0x80>; - ti,hwmods = "ecap0"; - status = "disabled"; - }; - - ehrpwm0: ehrpwm@48300200 { - compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm"; - reg = <0x48300200 0x80>; - ti,hwmods = "ehrpwm0"; - status = "disabled"; - }; - }; - - epwmss1: epwmss@48302000 { - compatible = "ti,am4372-pwmss","ti,am33xx-pwmss"; - reg = <0x48302000 0x10>; - #address-cells = <1>; - #size-cells = <1>; - ranges; - ti,hwmods = "epwmss1"; - status = "disabled"; - - ecap1: ecap@48302100 { - compatible = "ti,am4372-ecap","ti,am33xx-ecap"; - reg = <0x48302100 0x80>; - ti,hwmods = "ecap1"; - status = "disabled"; - }; - - ehrpwm1: ehrpwm@48302200 { - compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm"; - reg = <0x48302200 0x80>; - ti,hwmods = "ehrpwm1"; - status = "disabled"; - }; - }; - - epwmss2: epwmss@48304000 { - compatible = "ti,am4372-pwmss","ti,am33xx-pwmss"; - reg = <0x48304000 0x10>; - #address-cells = <1>; - #size-cells = <1>; - ranges; - ti,hwmods = "epwmss2"; - status = "disabled"; - - ecap2: ecap@48304100 { - compatible = "ti,am4372-ecap","ti,am33xx-ecap"; - reg = <0x48304100 0x80>; - ti,hwmods = "ecap2"; - status = "disabled"; - }; - - ehrpwm2: ehrpwm@48304200 { - compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm"; - reg = <0x48304200 0x80>; - ti,hwmods = "ehrpwm2"; - status = "disabled"; - }; - }; - - epwmss3: epwmss@48306000 { - compatible = "ti,am4372-pwmss","ti,am33xx-pwmss"; - reg = <0x48306000 0x10>; - #address-cells = <1>; - #size-cells = <1>; - ranges; - ti,hwmods = "epwmss3"; - status = "disabled"; - - ehrpwm3: ehrpwm@48306200 { - compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm"; - reg = <0x48306200 0x80>; - ti,hwmods = "ehrpwm3"; - status = "disabled"; - }; - }; - - epwmss4: epwmss@48308000 { - compatible = "ti,am4372-pwmss","ti,am33xx-pwmss"; - reg = <0x48308000 0x10>; - #address-cells = <1>; - #size-cells = <1>; - ranges; - ti,hwmods = "epwmss4"; - status = "disabled"; - - ehrpwm4: ehrpwm@48308200 { - compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm"; - reg = <0x48308200 0x80>; - ti,hwmods = "ehrpwm4"; - status = "disabled"; - }; - }; - - epwmss5: epwmss@4830a000 { - compatible = "ti,am4372-pwmss","ti,am33xx-pwmss"; - reg = <0x4830a000 0x10>; - #address-cells = <1>; - #size-cells = <1>; - ranges; - ti,hwmods = "epwmss5"; - status = "disabled"; - - ehrpwm5: ehrpwm@4830a200 { - compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm"; - reg = <0x4830a200 0x80>; - ti,hwmods = "ehrpwm5"; - status = "disabled"; - }; - }; - - sham: sham@53100000 { - compatible = "ti,omap5-sham"; - ti,hwmods = "sham"; - reg = <0x53100000 0x300>; - dmas = <&edma 36>; - dma-names = "rx"; - interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; - }; - - aes: aes@53501000 { - compatible = "ti,omap4-aes"; - ti,hwmods = "aes"; - reg = <0x53501000 0xa0>; - interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&edma 6 - &edma 5>; - dma-names = "tx", "rx"; - }; - - des: des@53701000 { - compatible = "ti,omap4-des"; - ti,hwmods = "des"; - reg = <0x53701000 0xa0>; - interrupts = <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&edma 34 - &edma 33>; - dma-names = "tx", "rx"; - }; - - mcasp0: mcasp@48038000 { - compatible = "ti,am33xx-mcasp-audio"; - ti,hwmods = "mcasp0"; - reg = <0x48038000 0x2000>, - <0x46000000 0x400000>; - reg-names = "mpu", "dat"; - interrupts = <80>, <81>; - interrupts-names = "tx", "rx"; - status = "disabled"; - dmas = <&edma 8>, - <&edma 9>; - dma-names = "tx", "rx"; - }; - - mcasp1: mcasp@4803C000 { - compatible = "ti,am33xx-mcasp-audio"; - ti,hwmods = "mcasp1"; - reg = <0x4803C000 0x2000>, - <0x46400000 0x400000>; - reg-names = "mpu", "dat"; - interrupts = <82>, <83>; - interrupts-names = "tx", "rx"; - status = "disabled"; - dmas = <&edma 10>, - <&edma 11>; - dma-names = "tx", "rx"; }; }; }; diff --git a/arch/arm/boot/dts/am43x-epos-evm.dts b/arch/arm/boot/dts/am43x-epos-evm.dts index fbf9c4c..74174d4 100644 --- a/arch/arm/boot/dts/am43x-epos-evm.dts +++ b/arch/arm/boot/dts/am43x-epos-evm.dts @@ -11,176 +11,8 @@ /dts-v1/; #include "am4372.dtsi" -#include <dt-bindings/pinctrl/am43xx.h> -#include <dt-bindings/gpio/gpio.h> / { model = "TI AM43x EPOS EVM"; compatible = "ti,am43x-epos-evm","ti,am4372","ti,am43"; - - vmmcsd_fixed: fixedregulator-sd { - compatible = "regulator-fixed"; - regulator-name = "vmmcsd_fixed"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - enable-active-high; - }; - - am43xx_pinmux: pinmux@44e10800 { - cpsw_default: cpsw_default { - pinctrl-single,pins = < - /* Slave 1 */ - 0x10c (PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_crs.rmii1_crs */ - 0x110 (PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_rxerr.rmii1_rxerr */ - 0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* mii1_txen.rmii1_txen */ - 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_rxdv.rmii1_rxdv */ - 0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* mii1_txd1.rmii1_txd1 */ - 0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* mii1_txd0.rmii1_txd0 */ - 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_rxd1.rmii1_rxd1 */ - 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_rxd0.rmii1_rxd0 */ - 0x144 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* rmii1_refclk.rmii1_refclk */ - >; - }; - - cpsw_sleep: cpsw_sleep { - pinctrl-single,pins = < - /* Slave 1 reset value */ - 0x10c (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x110 (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x144 (PIN_INPUT_PULLDOWN | MUX_MODE7) - >; - }; - - davinci_mdio_default: davinci_mdio_default { - pinctrl-single,pins = < - /* MDIO */ - 0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */ - 0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */ - >; - }; - - davinci_mdio_sleep: davinci_mdio_sleep { - pinctrl-single,pins = < - /* MDIO reset value */ - 0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7) - >; - }; - - i2c0_pins: pinmux_i2c0_pins { - pinctrl-single,pins = < - 0x188 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_sda.i2c0_sda */ - 0x18c (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_scl.i2c0_scl */ - >; - }; - }; - - matrix_keypad: matrix_keypad@0 { - compatible = "gpio-matrix-keypad"; - debounce-delay-ms = <5>; - col-scan-delay-us = <2>; - - row-gpios = <&gpio0 12 GPIO_ACTIVE_HIGH /* Bank0, pin12 */ - &gpio0 13 GPIO_ACTIVE_HIGH /* Bank0, pin13 */ - &gpio0 14 GPIO_ACTIVE_HIGH /* Bank0, pin14 */ - &gpio0 15 GPIO_ACTIVE_HIGH>; /* Bank0, pin15 */ - - col-gpios = <&gpio3 9 GPIO_ACTIVE_HIGH /* Bank3, pin9 */ - &gpio3 10 GPIO_ACTIVE_HIGH /* Bank3, pin10 */ - &gpio2 18 GPIO_ACTIVE_HIGH /* Bank2, pin18 */ - &gpio2 19 GPIO_ACTIVE_HIGH>; /* Bank2, pin19 */ - - linux,keymap = <0x00000201 /* P1 */ - 0x01000204 /* P4 */ - 0x02000207 /* P7 */ - 0x0300020a /* NUMERIC_STAR */ - 0x00010202 /* P2 */ - 0x01010205 /* P5 */ - 0x02010208 /* P8 */ - 0x03010200 /* P0 */ - 0x00020203 /* P3 */ - 0x01020206 /* P6 */ - 0x02020209 /* P9 */ - 0x0302020b /* NUMERIC_POUND */ - 0x00030067 /* UP */ - 0x0103006a /* RIGHT */ - 0x0203006c /* DOWN */ - 0x03030069>; /* LEFT */ - }; -}; - -&mmc1 { - status = "okay"; - vmmc-supply = <&vmmcsd_fixed>; - bus-width = <4>; -}; - -&mac { - pinctrl-names = "default", "sleep"; - pinctrl-0 = <&cpsw_default>; - pinctrl-1 = <&cpsw_sleep>; - status = "okay"; -}; - -&davinci_mdio { - pinctrl-names = "default", "sleep"; - pinctrl-0 = <&davinci_mdio_default>; - pinctrl-1 = <&davinci_mdio_sleep>; - status = "okay"; -}; - -&cpsw_emac0 { - phy_id = <&davinci_mdio>, <16>; - phy-mode = "rmii"; -}; - -&cpsw_emac1 { - phy_id = <&davinci_mdio>, <1>; - phy-mode = "rmii"; -}; - -&i2c0 { - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&i2c0_pins>; - - at24@50 { - compatible = "at24,24c256"; - pagesize = <64>; - reg = <0x50>; - }; - - pixcir_ts@5c { - compatible = "pixcir,pixcir_ts"; - reg = <0x5c>; - interrupt-parent = <&gpio1>; - interrupts = <17 0>; - - attb-gpio = <&gpio1 17 GPIO_ACTIVE_HIGH>; - - x-size = <1024>; - y-size = <768>; - }; -}; - -&gpio0 { - status = "okay"; -}; - -&gpio1 { - status = "okay"; -}; - -&gpio2 { - status = "okay"; -}; - -&gpio3 { - status = "okay"; }; diff --git a/arch/arm/boot/dts/armada-370-db.dts b/arch/arm/boot/dts/armada-370-db.dts index 08a56bc..90ce29d 100644 --- a/arch/arm/boot/dts/armada-370-db.dts +++ b/arch/arm/boot/dts/armada-370-db.dts @@ -99,22 +99,22 @@ spi-max-frequency = <50000000>; }; }; - }; - pcie-controller { - status = "okay"; - /* - * The two PCIe units are accessible through - * both standard PCIe slots and mini-PCIe - * slots on the board. - */ - pcie@1,0 { - /* Port 0, Lane 0 */ - status = "okay"; - }; - pcie@2,0 { - /* Port 1, Lane 0 */ + pcie-controller { status = "okay"; + /* + * The two PCIe units are accessible through + * both standard PCIe slots and mini-PCIe + * slots on the board. + */ + pcie@1,0 { + /* Port 0, Lane 0 */ + status = "okay"; + }; + pcie@2,0 { + /* Port 1, Lane 0 */ + status = "okay"; + }; }; }; }; diff --git a/arch/arm/boot/dts/armada-370-netgear-rn104.dts b/arch/arm/boot/dts/armada-370-netgear-rn104.dts deleted file mode 100644 index b0b32f5..0000000 --- a/arch/arm/boot/dts/armada-370-netgear-rn104.dts +++ /dev/null @@ -1,193 +0,0 @@ -/* - * Device Tree file for NETGEAR ReadyNAS 104 - * - * Copyright (C) 2013, Arnaud EBALARD <arno@natisbad.org> - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ - -/dts-v1/; - -#include "armada-370.dtsi" - -/ { - model = "NETGEAR ReadyNAS 104"; - compatible = "netgear,readynas-104", "marvell,armada370", "marvell,armada-370-xp"; - - chosen { - bootargs = "console=ttyS0,115200 earlyprintk"; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x20000000>; /* 512 MB */ - }; - - soc { - ranges = <MBUS_ID(0xf0, 0x01) 0 0xd0000000 0x100000 - MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000>; - - pcie-controller { - status = "okay"; - - /* Connected to FL1009 USB 3.0 controller */ - pcie@1,0 { - /* Port 0, Lane 0 */ - status = "okay"; - }; - - /* Connected to Marvell 88SE9215 SATA controller */ - pcie@2,0 { - /* Port 1, Lane 0 */ - status = "okay"; - }; - }; - - internal-regs { - serial@12000 { - clock-frequency = <200000000>; - status = "okay"; - }; - - pinctrl { - poweroff: poweroff { - marvell,pins = "mpp60"; - marvell,function = "gpio"; - }; - - backup_key_pin: backup-key-pin { - marvell,pins = "mpp52"; - marvell,function = "gpio"; - }; - - power_key_pin: power-key-pin { - marvell,pins = "mpp62"; - marvell,function = "gpio"; - }; - - backup_led_pin: backup-led-pin { - marvell,pins = "mpp63"; - marvell,function = "gpo"; - }; - - power_led_pin: power-led-pin { - marvell,pins = "mpp64"; - marvell,function = "gpio"; - }; - - reset_key_pin: reset-key-pin { - marvell,pins = "mpp65"; - marvell,function = "gpio"; - }; - }; - - mdio { - phy0: ethernet-phy@0 { - reg = <0>; - }; - - phy1: ethernet-phy@1 { - reg = <1>; - }; - }; - - ethernet@70000 { - status = "okay"; - phy = <&phy0>; - phy-mode = "rgmii-id"; - }; - - ethernet@74000 { - status = "okay"; - phy = <&phy1>; - phy-mode = "rgmii-id"; - }; - - usb@50000 { - status = "okay"; - }; - - i2c@11000 { - compatible = "marvell,mv64xxx-i2c"; - clock-frequency = <100000>; - status = "okay"; - - g762: g762@3e { - compatible = "gmt,g762"; - reg = <0x3e>; - clocks = <&g762_clk>; /* input clock */ - fan_gear_mode = <0>; - fan_startv = <1>; - pwm_polarity = <0>; - }; - }; - }; - }; - - clocks { - #address-cells = <1>; - #size-cells = <0>; - - g762_clk: fixedclk { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <8192>; - }; - }; - - gpio_leds { - compatible = "gpio-leds"; - pinctrl-0 = <&backup_led_pin &power_led_pin>; - pinctrl-names = "default"; - - blue_backup_led { - label = "rn104:blue:backup"; - gpios = <&gpio1 31 0>; /* GPIO 63 Active High */ - default-state = "off"; - }; - - blue_power_led { - label = "rn104:blue:pwr"; - gpios = <&gpio2 0 1>; /* GPIO 64 Active Low */ - linux,default-trigger = "keep"; - }; - }; - - gpio_keys { - compatible = "gpio-keys"; - #address-cells = <1>; - #size-cells = <0>; - pinctrl-0 = <&backup_key_pin - &power_key_pin - &reset_key_pin>; - pinctrl-names = "default"; - - button@1 { - label = "Backup Button"; - linux,code = <133>; /* KEY_COPY */ - gpios = <&gpio1 20 1>; - }; - - button@2 { - label = "Power Button"; - linux,code = <116>; /* KEY_POWER */ - gpios = <&gpio1 30 0>; - }; - - button@3 { - label = "Reset Button"; - linux,code = <0x198>; /* KEY_RESTART */ - gpios = <&gpio2 1 1>; - }; - }; - - gpio_poweroff { - compatible = "gpio-poweroff"; - pinctrl-0 = <&poweroff>; - pinctrl-names = "default"; - gpios = <&gpio1 28 1>; - }; -}; diff --git a/arch/arm/boot/dts/armada-370-xp.dtsi b/arch/arm/boot/dts/armada-370-xp.dtsi index 7f10f62..1de2dae 100644 --- a/arch/arm/boot/dts/armada-370-xp.dtsi +++ b/arch/arm/boot/dts/armada-370-xp.dtsi @@ -113,12 +113,11 @@ #interrupt-cells = <1>; #size-cells = <1>; interrupt-controller; - msi-controller; }; coherency-fabric@20200 { compatible = "marvell,coherency-fabric"; - reg = <0x20200 0xb0>, <0x21010 0x1c>; + reg = <0x20200 0xb0>, <0x21810 0x1c>; }; serial@12000 { @@ -138,14 +137,6 @@ status = "disabled"; }; - coredivclk: corediv-clock@18740 { - compatible = "marvell,armada-370-corediv-clock"; - reg = <0x18740 0xc>; - #clock-cells = <1>; - clocks = <&mainpll>; - clock-output-names = "nand"; - }; - timer@20300 { reg = <0x20300 0x30>, <0x21040 0x30>; interrupts = <37>, <38>, <39>, <40>, <5>, <6>; @@ -185,6 +176,7 @@ i2c0: i2c@11000 { compatible = "marvell,mv64xxx-i2c"; + reg = <0x11000 0x20>; #address-cells = <1>; #size-cells = <0>; interrupts = <31>; @@ -195,6 +187,7 @@ i2c1: i2c@11100 { compatible = "marvell,mv64xxx-i2c"; + reg = <0x11100 0x20>; #address-cells = <1>; #size-cells = <0>; interrupts = <32>; @@ -259,13 +252,4 @@ }; }; - - clocks { - /* 2 GHz fixed main PLL */ - mainpll: mainpll { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <2000000000>; - }; - }; }; diff --git a/arch/arm/boot/dts/armada-370.dtsi b/arch/arm/boot/dts/armada-370.dtsi index 7a4b82e..e134d7a 100644 --- a/arch/arm/boot/dts/armada-370.dtsi +++ b/arch/arm/boot/dts/armada-370.dtsi @@ -44,7 +44,6 @@ #address-cells = <3>; #size-cells = <2>; - msi-parent = <&mpic>; bus-range = <0x00 0xff>; ranges = @@ -219,14 +218,6 @@ }; }; - i2c0: i2c@11000 { - reg = <0x11000 0x20>; - }; - - i2c1: i2c@11100 { - reg = <0x11100 0x20>; - }; - usb@50000 { clocks = <&coreclk 0>; }; diff --git a/arch/arm/boot/dts/armada-xp-matrix.dts b/arch/arm/boot/dts/armada-xp-matrix.dts deleted file mode 100644 index e47c49e..0000000 --- a/arch/arm/boot/dts/armada-xp-matrix.dts +++ /dev/null @@ -1,75 +0,0 @@ -/* - * Device Tree file for Marvell Armada XP Matrix board - * - * Copyright (C) 2013 Marvell - * - * Lior Amsalem <alior@marvell.com> - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -/dts-v1/; -#include "armada-xp-mv78460.dtsi" - -/ { - model = "Marvell Armada XP Matrix Board"; - compatible = "marvell,axp-matrix", "marvell,armadaxp-mv78460", "marvell,armadaxp", "marvell,armada-370-xp"; - - chosen { - bootargs = "console=ttyS0,115200 earlyprintk"; - }; - - memory { - device_type = "memory"; - reg = <0 0x00000000 0 0x80000000>; /* 2 GB */ - }; - - soc { - ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xf1000000 0x100000 - MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000>; - - internal-regs { - serial@12000 { - clock-frequency = <250000000>; - status = "okay"; - }; - serial@12100 { - clock-frequency = <250000000>; - status = "okay"; - }; - serial@12200 { - clock-frequency = <250000000>; - status = "okay"; - }; - serial@12300 { - clock-frequency = <250000000>; - status = "okay"; - }; - - sata@a0000 { - nr-ports = <2>; - status = "okay"; - }; - - ethernet@30000 { - status = "okay"; - phy-mode = "sgmii"; - }; - - pcie-controller { - status = "okay"; - - pcie@1,0 { - /* Port 0, Lane 0 */ - status = "okay"; - }; - }; - - usb@50000 { - status = "okay"; - }; - }; - }; -}; diff --git a/arch/arm/boot/dts/armada-xp-mv78230.dtsi b/arch/arm/boot/dts/armada-xp-mv78230.dtsi index 98335fb..0358a33 100644 --- a/arch/arm/boot/dts/armada-xp-mv78230.dtsi +++ b/arch/arm/boot/dts/armada-xp-mv78230.dtsi @@ -47,7 +47,7 @@ /* * MV78230 has 2 PCIe units Gen2.0: One unit can be * configured as x4 or quad x1 lanes. One unit is - * x1 only. + * x4/x1. */ pcie-controller { compatible = "marvell,armada-xp-pcie"; @@ -57,15 +57,14 @@ #address-cells = <3>; #size-cells = <2>; - msi-parent = <&mpic>; bus-range = <0x00 0xff>; ranges = <0x82000000 0 0x40000 MBUS_ID(0xf0, 0x01) 0x40000 0 0x00002000 /* Port 0.0 registers */ + 0x82000000 0 0x42000 MBUS_ID(0xf0, 0x01) 0x42000 0 0x00002000 /* Port 2.0 registers */ 0x82000000 0 0x44000 MBUS_ID(0xf0, 0x01) 0x44000 0 0x00002000 /* Port 0.1 registers */ 0x82000000 0 0x48000 MBUS_ID(0xf0, 0x01) 0x48000 0 0x00002000 /* Port 0.2 registers */ 0x82000000 0 0x4c000 MBUS_ID(0xf0, 0x01) 0x4c000 0 0x00002000 /* Port 0.3 registers */ - 0x82000000 0 0x80000 MBUS_ID(0xf0, 0x01) 0x80000 0 0x00002000 /* Port 1.0 registers */ 0x82000000 0x1 0 MBUS_ID(0x04, 0xe8) 0 1 0 /* Port 0.0 MEM */ 0x81000000 0x1 0 MBUS_ID(0x04, 0xe0) 0 1 0 /* Port 0.0 IO */ 0x82000000 0x2 0 MBUS_ID(0x04, 0xd8) 0 1 0 /* Port 0.1 MEM */ @@ -74,8 +73,8 @@ 0x81000000 0x3 0 MBUS_ID(0x04, 0xb0) 0 1 0 /* Port 0.2 IO */ 0x82000000 0x4 0 MBUS_ID(0x04, 0x78) 0 1 0 /* Port 0.3 MEM */ 0x81000000 0x4 0 MBUS_ID(0x04, 0x70) 0 1 0 /* Port 0.3 IO */ - 0x82000000 0x5 0 MBUS_ID(0x08, 0xe8) 0 1 0 /* Port 1.0 MEM */ - 0x81000000 0x5 0 MBUS_ID(0x08, 0xe0) 0 1 0 /* Port 1.0 IO */>; + 0x82000000 0x9 0 MBUS_ID(0x04, 0xf8) 0 1 0 /* Port 2.0 MEM */ + 0x81000000 0x9 0 MBUS_ID(0x04, 0xf0) 0 1 0 /* Port 2.0 IO */>; pcie@1,0 { device_type = "pci"; @@ -145,20 +144,20 @@ status = "disabled"; }; - pcie@5,0 { + pcie@9,0 { device_type = "pci"; - assigned-addresses = <0x82000800 0 0x80000 0 0x2000>; - reg = <0x2800 0 0 0 0>; + assigned-addresses = <0x82000800 0 0x42000 0 0x2000>; + reg = <0x4800 0 0 0 0>; #address-cells = <3>; #size-cells = <2>; #interrupt-cells = <1>; - ranges = <0x82000000 0 0 0x82000000 0x5 0 1 0 - 0x81000000 0 0 0x81000000 0x5 0 1 0>; + ranges = <0x82000000 0 0 0x82000000 0x9 0 1 0 + 0x81000000 0 0 0x81000000 0x9 0 1 0>; interrupt-map-mask = <0 0 0 0>; - interrupt-map = <0 0 0 0 &mpic 62>; - marvell,pcie-port = <1>; + interrupt-map = <0 0 0 0 &mpic 99>; + marvell,pcie-port = <2>; marvell,pcie-lane = <0>; - clocks = <&gateclk 9>; + clocks = <&gateclk 26>; status = "disabled"; }; }; diff --git a/arch/arm/boot/dts/armada-xp-mv78260.dtsi b/arch/arm/boot/dts/armada-xp-mv78260.dtsi index 6660968..0e82c50 100644 --- a/arch/arm/boot/dts/armada-xp-mv78260.dtsi +++ b/arch/arm/boot/dts/armada-xp-mv78260.dtsi @@ -48,7 +48,7 @@ /* * MV78260 has 3 PCIe units Gen2.0: Two units can be * configured as x4 or quad x1 lanes. One unit is - * x4 only. + * x4/x1. */ pcie-controller { compatible = "marvell,armada-xp-pcie"; @@ -58,7 +58,6 @@ #address-cells = <3>; #size-cells = <2>; - msi-parent = <&mpic>; bus-range = <0x00 0xff>; ranges = @@ -68,9 +67,7 @@ 0x82000000 0 0x48000 MBUS_ID(0xf0, 0x01) 0x48000 0 0x00002000 /* Port 0.2 registers */ 0x82000000 0 0x4c000 MBUS_ID(0xf0, 0x01) 0x4c000 0 0x00002000 /* Port 0.3 registers */ 0x82000000 0 0x80000 MBUS_ID(0xf0, 0x01) 0x80000 0 0x00002000 /* Port 1.0 registers */ - 0x82000000 0 0x84000 MBUS_ID(0xf0, 0x01) 0x84000 0 0x00002000 /* Port 1.1 registers */ - 0x82000000 0 0x88000 MBUS_ID(0xf0, 0x01) 0x88000 0 0x00002000 /* Port 1.2 registers */ - 0x82000000 0 0x8c000 MBUS_ID(0xf0, 0x01) 0x8c000 0 0x00002000 /* Port 1.3 registers */ + 0x82000000 0 0x82000 MBUS_ID(0xf0, 0x01) 0x82000 0 0x00002000 /* Port 3.0 registers */ 0x82000000 0x1 0 MBUS_ID(0x04, 0xe8) 0 1 0 /* Port 0.0 MEM */ 0x81000000 0x1 0 MBUS_ID(0x04, 0xe0) 0 1 0 /* Port 0.0 IO */ 0x82000000 0x2 0 MBUS_ID(0x04, 0xd8) 0 1 0 /* Port 0.1 MEM */ @@ -79,18 +76,10 @@ 0x81000000 0x3 0 MBUS_ID(0x04, 0xb0) 0 1 0 /* Port 0.2 IO */ 0x82000000 0x4 0 MBUS_ID(0x04, 0x78) 0 1 0 /* Port 0.3 MEM */ 0x81000000 0x4 0 MBUS_ID(0x04, 0x70) 0 1 0 /* Port 0.3 IO */ - - 0x82000000 0x5 0 MBUS_ID(0x08, 0xe8) 0 1 0 /* Port 1.0 MEM */ - 0x81000000 0x5 0 MBUS_ID(0x08, 0xe0) 0 1 0 /* Port 1.0 IO */ - 0x82000000 0x6 0 MBUS_ID(0x08, 0xd8) 0 1 0 /* Port 1.1 MEM */ - 0x81000000 0x6 0 MBUS_ID(0x08, 0xd0) 0 1 0 /* Port 1.1 IO */ - 0x82000000 0x7 0 MBUS_ID(0x08, 0xb8) 0 1 0 /* Port 1.2 MEM */ - 0x81000000 0x7 0 MBUS_ID(0x08, 0xb0) 0 1 0 /* Port 1.2 IO */ - 0x82000000 0x8 0 MBUS_ID(0x08, 0x78) 0 1 0 /* Port 1.3 MEM */ - 0x81000000 0x8 0 MBUS_ID(0x08, 0x70) 0 1 0 /* Port 1.3 IO */ - - 0x82000000 0x9 0 MBUS_ID(0x04, 0xf8) 0 1 0 /* Port 2.0 MEM */ - 0x81000000 0x9 0 MBUS_ID(0x04, 0xf0) 0 1 0 /* Port 2.0 IO */>; + 0x82000000 0x9 0 MBUS_ID(0x08, 0xe8) 0 1 0 /* Port 1.0 MEM */ + 0x81000000 0x9 0 MBUS_ID(0x08, 0xe0) 0 1 0 /* Port 1.0 IO */ + 0x82000000 0xa 0 MBUS_ID(0x08, 0xf8) 0 1 0 /* Port 3.0 MEM */ + 0x81000000 0xa 0 MBUS_ID(0x08, 0xf0) 0 1 0 /* Port 3.0 IO */>; pcie@1,0 { device_type = "pci"; @@ -116,8 +105,8 @@ #address-cells = <3>; #size-cells = <2>; #interrupt-cells = <1>; - ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0 - 0x81000000 0 0 0x81000000 0x2 0 1 0>; + ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0 + 0x81000000 0 0 0x81000000 0x2 0 1 0>; interrupt-map-mask = <0 0 0 0>; interrupt-map = <0 0 0 0 &mpic 59>; marvell,pcie-port = <0>; @@ -160,88 +149,37 @@ status = "disabled"; }; - pcie@5,0 { + pcie@9,0 { device_type = "pci"; - assigned-addresses = <0x82000800 0 0x80000 0 0x2000>; - reg = <0x2800 0 0 0 0>; + assigned-addresses = <0x82000800 0 0x42000 0 0x2000>; + reg = <0x4800 0 0 0 0>; #address-cells = <3>; #size-cells = <2>; #interrupt-cells = <1>; - ranges = <0x82000000 0 0 0x82000000 0x5 0 1 0 - 0x81000000 0 0 0x81000000 0x5 0 1 0>; + ranges = <0x82000000 0 0 0x82000000 0x9 0 1 0 + 0x81000000 0 0 0x81000000 0x9 0 1 0>; interrupt-map-mask = <0 0 0 0>; - interrupt-map = <0 0 0 0 &mpic 62>; - marvell,pcie-port = <1>; + interrupt-map = <0 0 0 0 &mpic 99>; + marvell,pcie-port = <2>; marvell,pcie-lane = <0>; - clocks = <&gateclk 9>; - status = "disabled"; - }; - - pcie@6,0 { - device_type = "pci"; - assigned-addresses = <0x82000800 0 0x84000 0 0x2000>; - reg = <0x3000 0 0 0 0>; - #address-cells = <3>; - #size-cells = <2>; - #interrupt-cells = <1>; - ranges = <0x82000000 0 0 0x82000000 0x6 0 1 0 - 0x81000000 0 0 0x81000000 0x6 0 1 0>; - interrupt-map-mask = <0 0 0 0>; - interrupt-map = <0 0 0 0 &mpic 63>; - marvell,pcie-port = <1>; - marvell,pcie-lane = <1>; - clocks = <&gateclk 10>; - status = "disabled"; - }; - - pcie@7,0 { - device_type = "pci"; - assigned-addresses = <0x82000800 0 0x88000 0 0x2000>; - reg = <0x3800 0 0 0 0>; - #address-cells = <3>; - #size-cells = <2>; - #interrupt-cells = <1>; - ranges = <0x82000000 0 0 0x82000000 0x7 0 1 0 - 0x81000000 0 0 0x81000000 0x7 0 1 0>; - interrupt-map-mask = <0 0 0 0>; - interrupt-map = <0 0 0 0 &mpic 64>; - marvell,pcie-port = <1>; - marvell,pcie-lane = <2>; - clocks = <&gateclk 11>; - status = "disabled"; - }; - - pcie@8,0 { - device_type = "pci"; - assigned-addresses = <0x82000800 0 0x8c000 0 0x2000>; - reg = <0x4000 0 0 0 0>; - #address-cells = <3>; - #size-cells = <2>; - #interrupt-cells = <1>; - ranges = <0x82000000 0 0 0x82000000 0x8 0 1 0 - 0x81000000 0 0 0x81000000 0x8 0 1 0>; - interrupt-map-mask = <0 0 0 0>; - interrupt-map = <0 0 0 0 &mpic 65>; - marvell,pcie-port = <1>; - marvell,pcie-lane = <3>; - clocks = <&gateclk 12>; + clocks = <&gateclk 26>; status = "disabled"; }; - pcie@9,0 { + pcie@10,0 { device_type = "pci"; - assigned-addresses = <0x82000800 0 0x42000 0 0x2000>; - reg = <0x4800 0 0 0 0>; + assigned-addresses = <0x82000800 0 0x82000 0 0x2000>; + reg = <0x5000 0 0 0 0>; #address-cells = <3>; #size-cells = <2>; #interrupt-cells = <1>; - ranges = <0x82000000 0 0 0x82000000 0x9 0 1 0 - 0x81000000 0 0 0x81000000 0x9 0 1 0>; + ranges = <0x82000000 0 0 0x82000000 0xa 0 1 0 + 0x81000000 0 0 0x81000000 0xa 0 1 0>; interrupt-map-mask = <0 0 0 0>; - interrupt-map = <0 0 0 0 &mpic 99>; - marvell,pcie-port = <2>; + interrupt-map = <0 0 0 0 &mpic 103>; + marvell,pcie-port = <3>; marvell,pcie-lane = <0>; - clocks = <&gateclk 26>; + clocks = <&gateclk 27>; status = "disabled"; }; }; diff --git a/arch/arm/boot/dts/armada-xp-mv78460.dtsi b/arch/arm/boot/dts/armada-xp-mv78460.dtsi index 31ba6d8..e82c1b8 100644 --- a/arch/arm/boot/dts/armada-xp-mv78460.dtsi +++ b/arch/arm/boot/dts/armada-xp-mv78460.dtsi @@ -74,7 +74,6 @@ #address-cells = <3>; #size-cells = <2>; - msi-parent = <&mpic>; bus-range = <0x00 0xff>; ranges = diff --git a/arch/arm/boot/dts/armada-xp.dtsi b/arch/arm/boot/dts/armada-xp.dtsi index 281c644..3058522 100644 --- a/arch/arm/boot/dts/armada-xp.dtsi +++ b/arch/arm/boot/dts/armada-xp.dtsi @@ -147,16 +147,6 @@ }; }; - i2c0: i2c@11000 { - compatible = "marvell,mv78230-i2c", "marvell,mv64xxx-i2c"; - reg = <0x11000 0x100>; - }; - - i2c1: i2c@11100 { - compatible = "marvell,mv78230-i2c", "marvell,mv64xxx-i2c"; - reg = <0x11100 0x100>; - }; - usb@50000 { clocks = <&gateclk 18>; }; diff --git a/arch/arm/boot/dts/at91sam9g20ek_common.dtsi b/arch/arm/boot/dts/at91sam9g20ek_common.dtsi index cb2c010..1373546 100644 --- a/arch/arm/boot/dts/at91sam9g20ek_common.dtsi +++ b/arch/arm/boot/dts/at91sam9g20ek_common.dtsi @@ -96,6 +96,7 @@ }; spi0: spi@fffc8000 { + status = "okay"; cs-gpios = <0>, <&pioC 11 0>, <0>, <0>; mtd_dataflash@0 { compatible = "atmel,at45", "atmel,dataflash"; diff --git a/arch/arm/boot/dts/at91sam9g25.dtsi b/arch/arm/boot/dts/at91sam9g25.dtsi index 17b8799..b4ec6fe 100644 --- a/arch/arm/boot/dts/at91sam9g25.dtsi +++ b/arch/arm/boot/dts/at91sam9g25.dtsi @@ -7,8 +7,6 @@ */ #include "at91sam9x5.dtsi" -#include "at91sam9x5_usart3.dtsi" -#include "at91sam9x5_macb0.dtsi" / { model = "Atmel AT91SAM9G25 SoC"; diff --git a/arch/arm/boot/dts/at91sam9g35.dtsi b/arch/arm/boot/dts/at91sam9g35.dtsi index e35c2fc..bebf9f5 100644 --- a/arch/arm/boot/dts/at91sam9g35.dtsi +++ b/arch/arm/boot/dts/at91sam9g35.dtsi @@ -7,7 +7,6 @@ */ #include "at91sam9x5.dtsi" -#include "at91sam9x5_macb0.dtsi" / { model = "Atmel AT91SAM9G35 SoC"; diff --git a/arch/arm/boot/dts/at91sam9n12.dtsi b/arch/arm/boot/dts/at91sam9n12.dtsi index 6224f9f..9fb7ffd 100644 --- a/arch/arm/boot/dts/at91sam9n12.dtsi +++ b/arch/arm/boot/dts/at91sam9n12.dtsi @@ -437,9 +437,6 @@ compatible = "atmel,at91sam9g45-ssc"; reg = <0xf0010000 0x4000>; interrupts = <28 IRQ_TYPE_LEVEL_HIGH 5>; - dmas = <&dma 0 AT91_DMA_CFG_PER_ID(21)>, - <&dma 0 AT91_DMA_CFG_PER_ID(22)>; - dma-names = "tx", "rx"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>; status = "disabled"; diff --git a/arch/arm/boot/dts/at91sam9n12ek.dts b/arch/arm/boot/dts/at91sam9n12ek.dts index e9487f6..27a9352 100644 --- a/arch/arm/boot/dts/at91sam9n12ek.dts +++ b/arch/arm/boot/dts/at91sam9n12ek.dts @@ -38,18 +38,9 @@ status = "okay"; }; - ssc0: ssc@f0010000 { - status = "okay"; - }; - i2c0: i2c@f8010000 { status = "okay"; - wm8904: codec@1a { - compatible = "wm8904"; - reg = <0x1a>; - }; - qt1070: keyboard@1b { compatible = "qt1070"; reg = <0x1b>; @@ -91,13 +82,6 @@ <AT91_PIOA 2 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; }; }; - - sound { - pinctrl_pck0_as_audio_mck: pck0_as_audio_mck { - atmel,pins = - <AT91_PIOB 10 AT91_PERIPH_B AT91_PINCTRL_NONE>; - }; - }; }; spi0: spi@f0000000 { @@ -158,22 +142,4 @@ gpio-key,wakeup; }; }; - - sound { - compatible = "atmel,asoc-wm8904"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_pck0_as_audio_mck>; - - atmel,model = "wm8904 @ AT91SAM9N12"; - atmel,audio-routing = - "Headphone Jack", "HPOUTL", - "Headphone Jack", "HPOUTR", - "IN2L", "Line In Jack", - "IN2R", "Line In Jack", - "Mic", "MICBIAS", - "IN1L", "Mic"; - - atmel,ssc-controller = <&ssc0>; - atmel,audio-codec = <&wm8904>; - }; }; diff --git a/arch/arm/boot/dts/at91sam9x25.dtsi b/arch/arm/boot/dts/at91sam9x25.dtsi index c255421..49e94ab 100644 --- a/arch/arm/boot/dts/at91sam9x25.dtsi +++ b/arch/arm/boot/dts/at91sam9x25.dtsi @@ -7,9 +7,6 @@ */ #include "at91sam9x5.dtsi" -#include "at91sam9x5_usart3.dtsi" -#include "at91sam9x5_macb0.dtsi" -#include "at91sam9x5_macb1.dtsi" / { model = "Atmel AT91SAM9X25 SoC"; @@ -25,6 +22,27 @@ 0x80000000 0xfffd0000 0xb83fffff /* pioC */ 0x003fffff 0x003f8000 0x00000000 /* pioD */ >; + + macb1 { + pinctrl_macb1_rmii: macb1_rmii-0 { + atmel,pins = + <AT91_PIOC 16 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC16 periph B */ + AT91_PIOC 18 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC18 periph B */ + AT91_PIOC 19 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC19 periph B */ + AT91_PIOC 20 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC20 periph B */ + AT91_PIOC 21 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC21 periph B */ + AT91_PIOC 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC27 periph B */ + AT91_PIOC 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC28 periph B */ + AT91_PIOC 29 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC29 periph B */ + AT91_PIOC 30 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC30 periph B */ + AT91_PIOC 31 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC31 periph B */ + }; + }; + }; + + macb1: ethernet@f8030000 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_macb1_rmii>; }; }; }; diff --git a/arch/arm/boot/dts/at91sam9x35.dtsi b/arch/arm/boot/dts/at91sam9x35.dtsi index 8eac66c..1a3d525 100644 --- a/arch/arm/boot/dts/at91sam9x35.dtsi +++ b/arch/arm/boot/dts/at91sam9x35.dtsi @@ -7,7 +7,6 @@ */ #include "at91sam9x5.dtsi" -#include "at91sam9x5_macb0.dtsi" / { model = "Atmel AT91SAM9X35 SoC"; diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi b/arch/arm/boot/dts/at91sam9x5.dtsi index 40267a1..e74dc15 100644 --- a/arch/arm/boot/dts/at91sam9x5.dtsi +++ b/arch/arm/boot/dts/at91sam9x5.dtsi @@ -206,6 +206,29 @@ }; }; + usart3 { + pinctrl_usart3: usart3-0 { + atmel,pins = + <AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PC22 periph B with pullup */ + AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC23 periph B */ + }; + + pinctrl_usart3_rts: usart3_rts-0 { + atmel,pins = + <AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC24 periph B */ + }; + + pinctrl_usart3_cts: usart3_cts-0 { + atmel,pins = + <AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC25 periph B */ + }; + + pinctrl_usart3_sck: usart3_sck-0 { + atmel,pins = + <AT91_PIOC 26 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC26 periph B */ + }; + }; + uart0 { pinctrl_uart0: uart0-0 { atmel,pins = @@ -254,6 +277,34 @@ }; }; + macb0 { + pinctrl_macb0_rmii: macb0_rmii-0 { + atmel,pins = + <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB0 periph A */ + AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB1 periph A */ + AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB2 periph A */ + AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB3 periph A */ + AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB4 periph A */ + AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB5 periph A */ + AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB6 periph A */ + AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB7 periph A */ + AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB9 periph A */ + AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB10 periph A */ + }; + + pinctrl_macb0_rmii_mii: macb0_rmii_mii-0 { + atmel,pins = + <AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB8 periph A */ + AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB11 periph A */ + AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB12 periph A */ + AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB13 periph A */ + AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB14 periph A */ + AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB15 periph A */ + AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB16 periph A */ + AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB17 periph A */ + }; + }; + mmc0 { pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 { atmel,pins = @@ -559,6 +610,22 @@ status = "disabled"; }; + macb0: ethernet@f802c000 { + compatible = "cdns,at32ap7000-macb", "cdns,macb"; + reg = <0xf802c000 0x100>; + interrupts = <24 IRQ_TYPE_LEVEL_HIGH 3>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_macb0_rmii>; + status = "disabled"; + }; + + macb1: ethernet@f8030000 { + compatible = "cdns,at32ap7000-macb", "cdns,macb"; + reg = <0xf8030000 0x100>; + interrupts = <27 IRQ_TYPE_LEVEL_HIGH 3>; + status = "disabled"; + }; + i2c0: i2c@f8010000 { compatible = "atmel,at91sam9x5-i2c"; reg = <0xf8010000 0x100>; diff --git a/arch/arm/boot/dts/at91sam9x5_macb0.dtsi b/arch/arm/boot/dts/at91sam9x5_macb0.dtsi deleted file mode 100644 index 55731ff..0000000 --- a/arch/arm/boot/dts/at91sam9x5_macb0.dtsi +++ /dev/null @@ -1,56 +0,0 @@ -/* - * at91sam9x5_macb0.dtsi - Device Tree Include file for AT91SAM9x5 SoC with 1 - * Ethernet interface. - * - * Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com> - * - * Licensed under GPLv2. - */ - -#include <dt-bindings/pinctrl/at91.h> -#include <dt-bindings/interrupt-controller/irq.h> - -/ { - ahb { - apb { - pinctrl@fffff400 { - macb0 { - pinctrl_macb0_rmii: macb0_rmii-0 { - atmel,pins = - <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB0 periph A */ - AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB1 periph A */ - AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB2 periph A */ - AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB3 periph A */ - AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB4 periph A */ - AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB5 periph A */ - AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB6 periph A */ - AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB7 periph A */ - AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB9 periph A */ - AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB10 periph A */ - }; - - pinctrl_macb0_rmii_mii: macb0_rmii_mii-0 { - atmel,pins = - <AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB8 periph A */ - AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB11 periph A */ - AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB12 periph A */ - AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB13 periph A */ - AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB14 periph A */ - AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB15 periph A */ - AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB16 periph A */ - AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB17 periph A */ - }; - }; - }; - - macb0: ethernet@f802c000 { - compatible = "cdns,at32ap7000-macb", "cdns,macb"; - reg = <0xf802c000 0x100>; - interrupts = <24 IRQ_TYPE_LEVEL_HIGH 3>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_macb0_rmii>; - status = "disabled"; - }; - }; - }; -}; diff --git a/arch/arm/boot/dts/at91sam9x5_macb1.dtsi b/arch/arm/boot/dts/at91sam9x5_macb1.dtsi deleted file mode 100644 index 77425a6..0000000 --- a/arch/arm/boot/dts/at91sam9x5_macb1.dtsi +++ /dev/null @@ -1,44 +0,0 @@ -/* - * at91sam9x5_macb1.dtsi - Device Tree Include file for AT91SAM9x5 SoC with 2 - * Ethernet interfaces. - * - * Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com> - * - * Licensed under GPLv2. - */ - -#include <dt-bindings/pinctrl/at91.h> -#include <dt-bindings/interrupt-controller/irq.h> - -/ { - ahb { - apb { - pinctrl@fffff400 { - macb1 { - pinctrl_macb1_rmii: macb1_rmii-0 { - atmel,pins = - <AT91_PIOC 16 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC16 periph B */ - AT91_PIOC 18 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC18 periph B */ - AT91_PIOC 19 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC19 periph B */ - AT91_PIOC 20 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC20 periph B */ - AT91_PIOC 21 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC21 periph B */ - AT91_PIOC 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC27 periph B */ - AT91_PIOC 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC28 periph B */ - AT91_PIOC 29 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC29 periph B */ - AT91_PIOC 30 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC30 periph B */ - AT91_PIOC 31 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC31 periph B */ - }; - }; - }; - - macb1: ethernet@f8030000 { - compatible = "cdns,at32ap7000-macb", "cdns,macb"; - reg = <0xf8030000 0x100>; - interrupts = <27 IRQ_TYPE_LEVEL_HIGH 3>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_macb1_rmii>; - status = "disabled"; - }; - }; - }; -}; diff --git a/arch/arm/boot/dts/at91sam9x5_usart3.dtsi b/arch/arm/boot/dts/at91sam9x5_usart3.dtsi deleted file mode 100644 index 6801106..0000000 --- a/arch/arm/boot/dts/at91sam9x5_usart3.dtsi +++ /dev/null @@ -1,55 +0,0 @@ -/* - * at91sam9x5_usart3.dtsi - Device Tree Include file for AT91SAM9x5 SoC with - * 4 USART. - * - * Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com> - * - * Licensed under GPLv2. - */ - -#include <dt-bindings/pinctrl/at91.h> -#include <dt-bindings/interrupt-controller/irq.h> - -/ { - aliases { - serial4 = &usart3; - }; - - ahb { - apb { - pinctrl@fffff400 { - usart3 { - pinctrl_usart3: usart3-0 { - atmel,pins = - <AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PC22 periph B with pullup */ - AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC23 periph B */ - }; - - pinctrl_usart3_rts: usart3_rts-0 { - atmel,pins = - <AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC24 periph B */ - }; - - pinctrl_usart3_cts: usart3_cts-0 { - atmel,pins = - <AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC25 periph B */ - }; - - pinctrl_usart3_sck: usart3_sck-0 { - atmel,pins = - <AT91_PIOC 26 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC26 periph B */ - }; - }; - }; - - usart3: serial@f8028000 { - compatible = "atmel,at91sam9260-usart"; - reg = <0xf8028000 0x200>; - interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_usart3>; - status = "disabled"; - }; - }; - }; -}; diff --git a/arch/arm/boot/dts/atlas6.dtsi b/arch/arm/boot/dts/atlas6.dtsi index 978bab4..6db4f81 100644 --- a/arch/arm/boot/dts/atlas6.dtsi +++ b/arch/arm/boot/dts/atlas6.dtsi @@ -65,11 +65,6 @@ compatible = "sirf,prima2-rsc"; reg = <0x88020000 0x1000>; }; - - cphifbg@88030000 { - compatible = "sirf,prima2-cphifbg"; - reg = <0x88030000 0x1000>; - }; }; mem-iobg { @@ -80,17 +75,10 @@ memory-controller@90000000 { compatible = "sirf,prima2-memc"; - reg = <0x90000000 0x2000>; + reg = <0x90000000 0x10000>; interrupts = <27>; clocks = <&clks 5>; }; - - memc-monitor { - compatible = "sirf,prima2-memcmon"; - reg = <0x90002000 0x200>; - interrupts = <4>; - clocks = <&clks 32>; - }; }; disp-iobg { @@ -132,20 +120,6 @@ }; }; - graphics2d-iobg { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0xa0000000 0xa0000000 0x8000000>; - - ble@a0000000 { - compatible = "sirf,atlas6-ble"; - reg = <0xa0000000 0x2000>; - interrupts = <5>; - clocks = <&clks 33>; - }; - }; - dsp-iobg { compatible = "simple-bus"; #address-cells = <1>; @@ -297,11 +271,6 @@ compatible = "sirf,prima2-spi"; reg = <0xb0170000 0x10000>; interrupts = <16>; - sirf,spi-num-chipselects = <1>; - sirf,spi-dma-rx-channel = <12>; - sirf,spi-dma-tx-channel = <13>; - #address-cells = <1>; - #size-cells = <0>; clocks = <&clks 20>; status = "disabled"; }; @@ -558,18 +527,6 @@ sirf,function = "usb1_utmi_drvbus"; }; }; - usb1_dp_dn_pins_a: usb1_dp_dn@0 { - usb1_dp_dn { - sirf,pins = "usb1_dp_dngrp"; - sirf,function = "usb1_dp_dn"; - }; - }; - uart1_route_io_usb1_pins_a: uart1_route_io_usb1@0 { - uart1_route_io_usb1 { - sirf,pins = "uart1_route_io_usb1grp"; - sirf,function = "uart1_route_io_usb1"; - }; - }; warm_rst_pins_a: warm_rst@0 { warm_rst { sirf,pins = "warm_rstgrp"; diff --git a/arch/arm/boot/dts/bcm11351-brt.dts b/arch/arm/boot/dts/bcm11351-brt.dts index 23cd16d..9d36eb4 100644 --- a/arch/arm/boot/dts/bcm11351-brt.dts +++ b/arch/arm/boot/dts/bcm11351-brt.dts @@ -40,7 +40,6 @@ sdio4: sdio@3f1b0000 { max-frequency = <48000000>; - cd-gpios = <&gpio 14 0>; status = "okay"; }; diff --git a/arch/arm/boot/dts/bcm11351.dtsi b/arch/arm/boot/dts/bcm11351.dtsi index b0c0610..05a5aab 100644 --- a/arch/arm/boot/dts/bcm11351.dtsi +++ b/arch/arm/boot/dts/bcm11351.dtsi @@ -49,36 +49,6 @@ reg-io-width = <4>; }; - uart@3e001000 { - compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart"; - status = "disabled"; - reg = <0x3e001000 0x1000>; - clock-frequency = <13000000>; - interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>; - reg-shift = <2>; - reg-io-width = <4>; - }; - - uart@3e002000 { - compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart"; - status = "disabled"; - reg = <0x3e002000 0x1000>; - clock-frequency = <13000000>; - interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>; - reg-shift = <2>; - reg-io-width = <4>; - }; - - uart@3e003000 { - compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart"; - status = "disabled"; - reg = <0x3e003000 0x1000>; - clock-frequency = <13000000>; - interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>; - reg-shift = <2>; - reg-io-width = <4>; - }; - L2: l2-cache { compatible = "brcm,bcm11351-a2-pl310-cache"; reg = <0x3ff20000 0x1000>; @@ -98,47 +68,31 @@ clock-frequency = <32768>; }; - gpio: gpio@35003000 { - compatible = "brcm,bcm11351-gpio", "brcm,kona-gpio"; - reg = <0x35003000 0x800>; - interrupts = - <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>; - #gpio-cells = <2>; - #interrupt-cells = <2>; - gpio-controller; - interrupt-controller; - }; - sdio1: sdio@3f180000 { compatible = "brcm,kona-sdhci"; reg = <0x3f180000 0x10000>; - interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <0x0 77 0x4>; status = "disabled"; }; sdio2: sdio@3f190000 { compatible = "brcm,kona-sdhci"; reg = <0x3f190000 0x10000>; - interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <0x0 76 0x4>; status = "disabled"; }; sdio3: sdio@3f1a0000 { compatible = "brcm,kona-sdhci"; reg = <0x3f1a0000 0x10000>; - interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <0x0 74 0x4>; status = "disabled"; }; sdio4: sdio@3f1b0000 { compatible = "brcm,kona-sdhci"; reg = <0x3f1b0000 0x10000>; - interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <0x0 73 0x4>; status = "disabled"; }; diff --git a/arch/arm/boot/dts/bcm28155-ap.dts b/arch/arm/boot/dts/bcm28155-ap.dts index 08e47c2..96ae67a 100644 --- a/arch/arm/boot/dts/bcm28155-ap.dts +++ b/arch/arm/boot/dts/bcm28155-ap.dts @@ -40,7 +40,6 @@ sdio4: sdio@3f1b0000 { max-frequency = <48000000>; - cd-gpios = <&gpio 14 0>; status = "okay"; }; }; diff --git a/arch/arm/boot/dts/bcm2835.dtsi b/arch/arm/boot/dts/bcm2835.dtsi index aa537ed..1e12aef 100644 --- a/arch/arm/boot/dts/bcm2835.dtsi +++ b/arch/arm/boot/dts/bcm2835.dtsi @@ -85,8 +85,6 @@ reg = <0x7e205000 0x1000>; interrupts = <2 21>; clocks = <&clk_i2c>; - #address-cells = <1>; - #size-cells = <0>; status = "disabled"; }; @@ -95,8 +93,6 @@ reg = <0x7e804000 0x1000>; interrupts = <2 21>; clocks = <&clk_i2c>; - #address-cells = <1>; - #size-cells = <0>; status = "disabled"; }; diff --git a/arch/arm/boot/dts/cros5250-common.dtsi b/arch/arm/boot/dts/cros5250-common.dtsi index 9b186ac..dc259e8b 100644 --- a/arch/arm/boot/dts/cros5250-common.dtsi +++ b/arch/arm/boot/dts/cros5250-common.dtsi @@ -27,13 +27,6 @@ i2c2_bus: i2c2-bus { samsung,pin-pud = <0>; }; - - max77686_irq: max77686-irq { - samsung,pins = "gpx3-2"; - samsung,pin-function = <0>; - samsung,pin-pud = <0>; - samsung,pin-drv = <0>; - }; }; i2c@12C60000 { @@ -42,11 +35,6 @@ max77686@09 { compatible = "maxim,max77686"; - interrupt-parent = <&gpx3>; - interrupts = <2 0>; - pinctrl-names = "default"; - pinctrl-0 = <&max77686_irq>; - wakeup-source; reg = <0x09>; voltage-regulators { diff --git a/arch/arm/boot/dts/dove-cm-a510.dts b/arch/arm/boot/dts/dove-cm-a510.dts index 50c0d69..61a8062 100644 --- a/arch/arm/boot/dts/dove-cm-a510.dts +++ b/arch/arm/boot/dts/dove-cm-a510.dts @@ -1,6 +1,6 @@ /dts-v1/; -#include "dove.dtsi" +/include/ "dove.dtsi" / { model = "Compulab CM-A510"; diff --git a/arch/arm/boot/dts/dove-cubox.dts b/arch/arm/boot/dts/dove-cubox.dts index 8349a24..022646e 100644 --- a/arch/arm/boot/dts/dove-cubox.dts +++ b/arch/arm/boot/dts/dove-cubox.dts @@ -1,6 +1,6 @@ /dts-v1/; -#include "dove.dtsi" +/include/ "dove.dtsi" / { model = "SolidRun CuBox"; @@ -99,13 +99,19 @@ silabs,pll-master; }; - clkout2 { - reg = <2>; + clkout1 { + reg = <1>; silabs,drive-strength = <8>; silabs,multisynth-source = <1>; silabs,clock-source = <0>; silabs,pll-master; }; + + clkout2 { + reg = <2>; + silabs,multisynth-source = <1>; + silabs,clock-source = <0>; + }; }; }; @@ -126,11 +132,3 @@ reg = <0>; }; }; - -&audio1 { - status = "okay"; - clocks = <&gate_clk 13>, <&si5351 2>; - clock-names = "internal", "extclk"; - pinctrl-0 = <&pmx_audio1_i2s1_spdifo &pmx_audio1_extclk>; - pinctrl-names = "default"; -}; diff --git a/arch/arm/boot/dts/dove-d2plug.dts b/arch/arm/boot/dts/dove-d2plug.dts index c11d363..e2222ce 100644 --- a/arch/arm/boot/dts/dove-d2plug.dts +++ b/arch/arm/boot/dts/dove-d2plug.dts @@ -1,6 +1,6 @@ /dts-v1/; -#include "dove.dtsi" +/include/ "dove.dtsi" / { model = "Globalscale D2Plug"; diff --git a/arch/arm/boot/dts/dove-d3plug.dts b/arch/arm/boot/dts/dove-d3plug.dts deleted file mode 100644 index f5f59bb..0000000 --- a/arch/arm/boot/dts/dove-d3plug.dts +++ /dev/null @@ -1,103 +0,0 @@ -/dts-v1/; - -#include "dove.dtsi" - -/ { - model = "Globalscale D3Plug"; - compatible = "globalscale,d3plug", "marvell,dove"; - - memory { - device_type = "memory"; - reg = <0x00000000 0x40000000>; - }; - - chosen { - bootargs = "console=ttyS0,115200n8 earlyprintk root=/dev/mmcblk0p2 rw rootwait"; - }; - - leds { - compatible = "gpio-leds"; - pinctrl-0 = <&pmx_gpio_0 &pmx_gpio_1 &pmx_gpio_2>; - pinctrl-names = "default"; - - wlan-act { - label = "wlan-act"; - gpios = <&gpio0 0 1>; - }; - - wlan-ap { - label = "wlan-ap"; - gpios = <&gpio0 1 1>; - }; - - status { - label = "status"; - gpios = <&gpio0 2 1>; - }; - }; - - regulators { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <0>; - - usb_power: regulator@1 { - compatible = "regulator-fixed"; - reg = <1>; - regulator-name = "USB Power"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - enable-active-high; - regulator-always-on; - regulator-boot-on; - gpio = <&gpio0 8 0>; - pinctrl-0 = <&pmx_gpio_8>; - pinctrl-names = "default"; - }; - }; -}; - -&uart0 { status = "okay"; }; -&sata0 { status = "okay"; }; -&i2c0 { status = "okay"; }; - -/* Samsung M8G2F eMMC */ -&sdio0 { - status = "okay"; - non-removable; - bus-width = <4>; -}; - -/* Marvell SD8787 WLAN/BT */ -&sdio1 { - status = "okay"; - non-removable; -}; - -&spi0 { - status = "okay"; - - /* spi0.0: 2M Flash Macronix MX25L1605D */ - spi-flash@0 { - compatible = "st,m25l1605d"; - spi-max-frequency = <86000000>; - reg = <0>; - }; -}; - -&pcie { - status = "okay"; - /* Fresco Logic USB3.0 xHCI controller */ - pcie-port@0 { - status = "okay"; - reset-gpios = <&gpio0 26 1>; - reset-delay-us = <20000>; - pinctrl-0 = <&pmx_camera_gpio>; - pinctrl-names = "default"; - }; - /* Mini-PCIe slot */ - pcie-port@1 { - status = "okay"; - reset-gpios = <&gpio0 25 1>; - }; -}; diff --git a/arch/arm/boot/dts/dove-dove-db.dts b/arch/arm/boot/dts/dove-dove-db.dts index bb725dc..e5a920b 100644 --- a/arch/arm/boot/dts/dove-dove-db.dts +++ b/arch/arm/boot/dts/dove-dove-db.dts @@ -1,6 +1,6 @@ /dts-v1/; -#include "dove.dtsi" +/include/ "dove.dtsi" / { model = "Marvell DB-MV88AP510-BP Development Board"; diff --git a/arch/arm/boot/dts/dove.dtsi b/arch/arm/boot/dts/dove.dtsi index 113a8bc..cc27916 100644 --- a/arch/arm/boot/dts/dove.dtsi +++ b/arch/arm/boot/dts/dove.dtsi @@ -1,11 +1,8 @@ /include/ "skeleton.dtsi" -#define MBUS_ID(target,attributes) (((target) << 24) | ((attributes) << 16)) - / { compatible = "marvell,dove"; model = "Marvell Armada 88AP510 SoC"; - interrupt-parent = <&intc>; aliases { gpio0 = &gpio0; @@ -30,576 +27,482 @@ marvell,tauros2-cache-features = <0>; }; - mbus { - compatible = "marvell,dove-mbus", "marvell,mbus", "simple-bus"; - #address-cells = <2>; + soc@f1000000 { + compatible = "simple-bus"; + #address-cells = <1>; #size-cells = <1>; - controller = <&mbusc>; - pcie-mem-aperture = <0xe0000000 0x10000000>; /* 256M MEM space */ - pcie-io-aperture = <0xf2000000 0x00200000>; /* 2M I/O space */ - - ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x0100000 /* MBUS regs 1M */ - MBUS_ID(0xf0, 0x02) 0 0xf1800000 0x1000000 /* AXI regs 16M */ - MBUS_ID(0x01, 0xfd) 0 0xf8000000 0x8000000 /* BootROM 128M */ - MBUS_ID(0x03, 0x01) 0 0xc8000000 0x0100000 /* CESA SRAM 1M */ - MBUS_ID(0x0d, 0x00) 0 0xf0000000 0x0100000>; /* PMU SRAM 1M */ - - pcie: pcie-controller { - compatible = "marvell,dove-pcie"; + interrupt-parent = <&intc>; + + ranges = <0xc8000000 0xc8000000 0x0100000 /* CESA SRAM 1M */ + 0xe0000000 0xe0000000 0x8000000 /* PCIe0 Mem 128M */ + 0xe8000000 0xe8000000 0x8000000 /* PCIe1 Mem 128M */ + 0xf0000000 0xf0000000 0x0100000 /* ScratchPad 1M */ + 0x00000000 0xf1000000 0x1000000 /* SB/NB regs 16M */ + 0xf2000000 0xf2000000 0x0100000 /* PCIe0 I/O 1M */ + 0xf2100000 0xf2100000 0x0100000 /* PCIe0 I/O 1M */ + 0xf8000000 0xf8000000 0x8000000>; /* BootROM 128M */ + + timer: timer@20300 { + compatible = "marvell,orion-timer"; + reg = <0x20300 0x20>; + interrupt-parent = <&bridge_intc>; + interrupts = <1>, <2>; + clocks = <&core_clk 0>; + }; + + intc: main-interrupt-ctrl@20200 { + compatible = "marvell,orion-intc"; + interrupt-controller; + #interrupt-cells = <1>; + reg = <0x20200 0x10>, <0x20210 0x10>; + }; + + bridge_intc: bridge-interrupt-ctrl@20110 { + compatible = "marvell,orion-bridge-intc"; + interrupt-controller; + #interrupt-cells = <1>; + reg = <0x20110 0x8>; + interrupts = <0>; + marvell,#interrupts = <5>; + }; + + core_clk: core-clocks@d0214 { + compatible = "marvell,dove-core-clock"; + reg = <0xd0214 0x4>; + #clock-cells = <1>; + }; + + gate_clk: clock-gating-ctrl@d0038 { + compatible = "marvell,dove-gating-clock"; + reg = <0xd0038 0x4>; + clocks = <&core_clk 0>; + #clock-cells = <1>; + }; + + thermal: thermal-diode@d001c { + compatible = "marvell,dove-thermal"; + reg = <0xd001c 0x0c>, <0xd005c 0x08>; + }; + + uart0: serial@12000 { + compatible = "ns16550a"; + reg = <0x12000 0x100>; + reg-shift = <2>; + interrupts = <7>; + clocks = <&core_clk 0>; + status = "disabled"; + }; + + uart1: serial@12100 { + compatible = "ns16550a"; + reg = <0x12100 0x100>; + reg-shift = <2>; + interrupts = <8>; + clocks = <&core_clk 0>; + pinctrl-0 = <&pmx_uart1>; + pinctrl-names = "default"; + status = "disabled"; + }; + + uart2: serial@12200 { + compatible = "ns16550a"; + reg = <0x12000 0x100>; + reg-shift = <2>; + interrupts = <9>; + clocks = <&core_clk 0>; status = "disabled"; - device_type = "pci"; - #address-cells = <3>; - #size-cells = <2>; - - msi-parent = <&intc>; - bus-range = <0x00 0xff>; - - ranges = <0x82000000 0x0 0x40000 MBUS_ID(0xf0, 0x01) 0x40000 0 0x2000 - 0x82000000 0x0 0x80000 MBUS_ID(0xf0, 0x01) 0x80000 0 0x2000 - 0x82000000 0x1 0x0 MBUS_ID(0x04, 0xe8) 0 1 0 /* Port 0.0 Mem */ - 0x81000000 0x1 0x0 MBUS_ID(0x04, 0xe0) 0 1 0 /* Port 0.0 I/O */ - 0x82000000 0x2 0x0 MBUS_ID(0x08, 0xe8) 0 1 0 /* Port 1.0 Mem */ - 0x81000000 0x2 0x0 MBUS_ID(0x08, 0xe0) 0 1 0>; /* Port 1.0 I/O */ - - pcie-port@0 { - device_type = "pci"; - status = "disabled"; - assigned-addresses = <0x82000800 0 0x40000 0 0x2000>; - reg = <0x0800 0 0 0 0>; - clocks = <&gate_clk 4>; - marvell,pcie-port = <0>; - - #address-cells = <3>; - #size-cells = <2>; - ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0 - 0x81000000 0 0 0x81000000 0x1 0 1 0>; - - #interrupt-cells = <1>; - interrupt-map-mask = <0 0 0 0>; - interrupt-map = <0 0 0 0 &intc 16>; - }; - - pcie-port@1 { - device_type = "pci"; - status = "disabled"; - assigned-addresses = <0x82002800 0 0x80000 0 0x2000>; - reg = <0x1000 0 0 0 0>; - clocks = <&gate_clk 5>; - marvell,pcie-port = <1>; - - #address-cells = <3>; - #size-cells = <2>; - ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0 - 0x81000000 0 0 0x81000000 0x2 0 1 0>; - - #interrupt-cells = <1>; - interrupt-map-mask = <0 0 0 0>; - interrupt-map = <0 0 0 0 &intc 18>; + }; + + uart3: serial@12300 { + compatible = "ns16550a"; + reg = <0x12100 0x100>; + reg-shift = <2>; + interrupts = <10>; + clocks = <&core_clk 0>; + status = "disabled"; + }; + + gpio0: gpio-ctrl@d0400 { + compatible = "marvell,orion-gpio"; + #gpio-cells = <2>; + gpio-controller; + reg = <0xd0400 0x20>; + ngpios = <32>; + interrupt-controller; + #interrupt-cells = <2>; + interrupts = <12>, <13>, <14>, <60>; + }; + + gpio1: gpio-ctrl@d0420 { + compatible = "marvell,orion-gpio"; + #gpio-cells = <2>; + gpio-controller; + reg = <0xd0420 0x20>; + ngpios = <32>; + interrupt-controller; + #interrupt-cells = <2>; + interrupts = <61>; + }; + + gpio2: gpio-ctrl@e8400 { + compatible = "marvell,orion-gpio"; + #gpio-cells = <2>; + gpio-controller; + reg = <0xe8400 0x0c>; + ngpios = <8>; + }; + + pinctrl: pin-ctrl@d0200 { + compatible = "marvell,dove-pinctrl"; + reg = <0xd0200 0x10>; + clocks = <&gate_clk 22>; + + pmx_gpio_0: pmx-gpio-0 { + marvell,pins = "mpp0"; + marvell,function = "gpio"; + }; + + pmx_gpio_1: pmx-gpio-1 { + marvell,pins = "mpp1"; + marvell,function = "gpio"; + }; + + pmx_gpio_2: pmx-gpio-2 { + marvell,pins = "mpp2"; + marvell,function = "gpio"; + }; + + pmx_gpio_3: pmx-gpio-3 { + marvell,pins = "mpp3"; + marvell,function = "gpio"; }; + + pmx_gpio_4: pmx-gpio-4 { + marvell,pins = "mpp4"; + marvell,function = "gpio"; + }; + + pmx_gpio_5: pmx-gpio-5 { + marvell,pins = "mpp5"; + marvell,function = "gpio"; + }; + + pmx_gpio_6: pmx-gpio-6 { + marvell,pins = "mpp6"; + marvell,function = "gpio"; + }; + + pmx_gpio_7: pmx-gpio-7 { + marvell,pins = "mpp7"; + marvell,function = "gpio"; + }; + + pmx_gpio_8: pmx-gpio-8 { + marvell,pins = "mpp8"; + marvell,function = "gpio"; + }; + + pmx_gpio_9: pmx-gpio-9 { + marvell,pins = "mpp9"; + marvell,function = "gpio"; + }; + + pmx_gpio_10: pmx-gpio-10 { + marvell,pins = "mpp10"; + marvell,function = "gpio"; + }; + + pmx_gpio_11: pmx-gpio-11 { + marvell,pins = "mpp11"; + marvell,function = "gpio"; + }; + + pmx_gpio_12: pmx-gpio-12 { + marvell,pins = "mpp12"; + marvell,function = "gpio"; + }; + + pmx_gpio_13: pmx-gpio-13 { + marvell,pins = "mpp13"; + marvell,function = "gpio"; + }; + + pmx_gpio_14: pmx-gpio-14 { + marvell,pins = "mpp14"; + marvell,function = "gpio"; + }; + + pmx_gpio_15: pmx-gpio-15 { + marvell,pins = "mpp15"; + marvell,function = "gpio"; + }; + + pmx_gpio_16: pmx-gpio-16 { + marvell,pins = "mpp16"; + marvell,function = "gpio"; + }; + + pmx_gpio_17: pmx-gpio-17 { + marvell,pins = "mpp17"; + marvell,function = "gpio"; + }; + + pmx_gpio_18: pmx-gpio-18 { + marvell,pins = "mpp18"; + marvell,function = "gpio"; + }; + + pmx_gpio_19: pmx-gpio-19 { + marvell,pins = "mpp19"; + marvell,function = "gpio"; + }; + + pmx_gpio_20: pmx-gpio-20 { + marvell,pins = "mpp20"; + marvell,function = "gpio"; + }; + + pmx_gpio_21: pmx-gpio-21 { + marvell,pins = "mpp21"; + marvell,function = "gpio"; + }; + + pmx_camera: pmx-camera { + marvell,pins = "mpp_camera"; + marvell,function = "camera"; + }; + + pmx_camera_gpio: pmx-camera-gpio { + marvell,pins = "mpp_camera"; + marvell,function = "gpio"; + }; + + pmx_sdio0: pmx-sdio0 { + marvell,pins = "mpp_sdio0"; + marvell,function = "sdio0"; + }; + + pmx_sdio0_gpio: pmx-sdio0-gpio { + marvell,pins = "mpp_sdio0"; + marvell,function = "gpio"; + }; + + pmx_sdio1: pmx-sdio1 { + marvell,pins = "mpp_sdio1"; + marvell,function = "sdio1"; + }; + + pmx_sdio1_gpio: pmx-sdio1-gpio { + marvell,pins = "mpp_sdio1"; + marvell,function = "gpio"; + }; + + pmx_audio1_gpio: pmx-audio1-gpio { + marvell,pins = "mpp_audio1"; + marvell,function = "gpio"; + }; + + pmx_spi0: pmx-spi0 { + marvell,pins = "mpp_spi0"; + marvell,function = "spi0"; + }; + + pmx_spi0_gpio: pmx-spi0-gpio { + marvell,pins = "mpp_spi0"; + marvell,function = "gpio"; + }; + + pmx_uart1: pmx-uart1 { + marvell,pins = "mpp_uart1"; + marvell,function = "uart1"; + }; + + pmx_uart1_gpio: pmx-uart1-gpio { + marvell,pins = "mpp_uart1"; + marvell,function = "gpio"; + }; + + pmx_nand: pmx-nand { + marvell,pins = "mpp_nand"; + marvell,function = "nand"; + }; + + pmx_nand_gpo: pmx-nand-gpo { + marvell,pins = "mpp_nand"; + marvell,function = "gpo"; + }; + }; + + spi0: spi-ctrl@10600 { + compatible = "marvell,orion-spi"; + #address-cells = <1>; + #size-cells = <0>; + cell-index = <0>; + interrupts = <6>; + reg = <0x10600 0x28>; + clocks = <&core_clk 0>; + pinctrl-0 = <&pmx_spi0>; + pinctrl-names = "default"; + status = "disabled"; + }; + + spi1: spi-ctrl@14600 { + compatible = "marvell,orion-spi"; + #address-cells = <1>; + #size-cells = <0>; + cell-index = <1>; + interrupts = <5>; + reg = <0x14600 0x28>; + clocks = <&core_clk 0>; + status = "disabled"; + }; + + i2c0: i2c-ctrl@11000 { + compatible = "marvell,mv64xxx-i2c"; + reg = <0x11000 0x20>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = <11>; + clock-frequency = <400000>; + timeout-ms = <1000>; + clocks = <&core_clk 0>; + status = "disabled"; }; - internal-regs { - compatible = "simple-bus"; + ehci0: usb-host@50000 { + compatible = "marvell,orion-ehci"; + reg = <0x50000 0x1000>; + interrupts = <24>; + clocks = <&gate_clk 0>; + status = "okay"; + }; + + ehci1: usb-host@51000 { + compatible = "marvell,orion-ehci"; + reg = <0x51000 0x1000>; + interrupts = <25>; + clocks = <&gate_clk 1>; + status = "okay"; + }; + + sdio0: sdio-host@92000 { + compatible = "marvell,dove-sdhci"; + reg = <0x92000 0x100>; + interrupts = <35>, <37>; + clocks = <&gate_clk 8>; + pinctrl-0 = <&pmx_sdio0>; + pinctrl-names = "default"; + status = "disabled"; + }; + + sdio1: sdio-host@90000 { + compatible = "marvell,dove-sdhci"; + reg = <0x90000 0x100>; + interrupts = <36>, <38>; + clocks = <&gate_clk 9>; + pinctrl-0 = <&pmx_sdio1>; + pinctrl-names = "default"; + status = "disabled"; + }; + + sata0: sata-host@a0000 { + compatible = "marvell,orion-sata"; + reg = <0xa0000 0x2400>; + interrupts = <62>; + clocks = <&gate_clk 3>; + nr-ports = <1>; + status = "disabled"; + }; + + rtc: real-time-clock@d8500 { + compatible = "marvell,orion-rtc"; + reg = <0xd8500 0x20>; + }; + + crypto: crypto-engine@30000 { + compatible = "marvell,orion-crypto"; + reg = <0x30000 0x10000>, + <0xc8000000 0x800>; + reg-names = "regs", "sram"; + interrupts = <31>; + clocks = <&gate_clk 15>; + status = "okay"; + }; + + xor0: dma-engine@60800 { + compatible = "marvell,orion-xor"; + reg = <0x60800 0x100 + 0x60a00 0x100>; + clocks = <&gate_clk 23>; + status = "okay"; + + channel0 { + interrupts = <39>; + dmacap,memcpy; + dmacap,xor; + }; + + channel1 { + interrupts = <40>; + dmacap,memset; + dmacap,memcpy; + dmacap,xor; + }; + }; + + xor1: dma-engine@60900 { + compatible = "marvell,orion-xor"; + reg = <0x60900 0x100 + 0x60b00 0x100>; + clocks = <&gate_clk 24>; + status = "okay"; + + channel0 { + interrupts = <42>; + dmacap,memcpy; + dmacap,xor; + }; + + channel1 { + interrupts = <43>; + dmacap,memset; + dmacap,memcpy; + dmacap,xor; + }; + }; + + mdio: mdio-bus@72004 { + compatible = "marvell,orion-mdio"; #address-cells = <1>; - #size-cells = <1>; - ranges = <0x00000000 MBUS_ID(0xf0, 0x01) 0 0x0100000 /* MBUS regs 1M */ - 0x00800000 MBUS_ID(0xf0, 0x02) 0 0x1000000 /* AXI regs 16M */ - 0xffffe000 MBUS_ID(0x03, 0x01) 0 0x0000800 /* CESA SRAM 2k */ - 0xfffff000 MBUS_ID(0x0d, 0x00) 0 0x0000800>; /* PMU SRAM 2k */ - - mbusc: mbus-ctrl@20000 { - compatible = "marvell,mbus-controller"; - reg = <0x20000 0x80>, <0x800100 0x8>; - }; - - timer: timer@20300 { - compatible = "marvell,orion-timer"; - reg = <0x20300 0x20>; - interrupt-parent = <&bridge_intc>; - interrupts = <1>, <2>; - clocks = <&core_clk 0>; - }; - - intc: main-interrupt-ctrl@20200 { - compatible = "marvell,orion-intc"; - interrupt-controller; - #interrupt-cells = <1>; - reg = <0x20200 0x10>, <0x20210 0x10>; - }; - - bridge_intc: bridge-interrupt-ctrl@20110 { - compatible = "marvell,orion-bridge-intc"; - interrupt-controller; - #interrupt-cells = <1>; - reg = <0x20110 0x8>; - interrupts = <0>; - marvell,#interrupts = <5>; - }; - - core_clk: core-clocks@d0214 { - compatible = "marvell,dove-core-clock"; - reg = <0xd0214 0x4>; - #clock-cells = <1>; - }; - - gate_clk: clock-gating-ctrl@d0038 { - compatible = "marvell,dove-gating-clock"; - reg = <0xd0038 0x4>; - clocks = <&core_clk 0>; - #clock-cells = <1>; - }; - - thermal: thermal-diode@d001c { - compatible = "marvell,dove-thermal"; - reg = <0xd001c 0x0c>, <0xd005c 0x08>; - }; - - uart0: serial@12000 { - compatible = "ns16550a"; - reg = <0x12000 0x100>; - reg-shift = <2>; - interrupts = <7>; - clocks = <&core_clk 0>; - status = "disabled"; - }; - - uart1: serial@12100 { - compatible = "ns16550a"; - reg = <0x12100 0x100>; - reg-shift = <2>; - interrupts = <8>; - clocks = <&core_clk 0>; - pinctrl-0 = <&pmx_uart1>; - pinctrl-names = "default"; - status = "disabled"; - }; - - uart2: serial@12200 { - compatible = "ns16550a"; - reg = <0x12000 0x100>; - reg-shift = <2>; - interrupts = <9>; - clocks = <&core_clk 0>; - status = "disabled"; - }; - - uart3: serial@12300 { - compatible = "ns16550a"; - reg = <0x12100 0x100>; - reg-shift = <2>; - interrupts = <10>; - clocks = <&core_clk 0>; - status = "disabled"; - }; - - gpio0: gpio-ctrl@d0400 { - compatible = "marvell,orion-gpio"; - #gpio-cells = <2>; - gpio-controller; - reg = <0xd0400 0x20>; - ngpios = <32>; - interrupt-controller; - #interrupt-cells = <2>; - interrupts = <12>, <13>, <14>, <60>; - }; - - gpio1: gpio-ctrl@d0420 { - compatible = "marvell,orion-gpio"; - #gpio-cells = <2>; - gpio-controller; - reg = <0xd0420 0x20>; - ngpios = <32>; - interrupt-controller; - #interrupt-cells = <2>; - interrupts = <61>; - }; - - gpio2: gpio-ctrl@e8400 { - compatible = "marvell,orion-gpio"; - #gpio-cells = <2>; - gpio-controller; - reg = <0xe8400 0x0c>; - ngpios = <8>; - }; - - pinctrl: pin-ctrl@d0200 { - compatible = "marvell,dove-pinctrl"; - reg = <0xd0200 0x10>; - clocks = <&gate_clk 22>; - - pmx_gpio_0: pmx-gpio-0 { - marvell,pins = "mpp0"; - marvell,function = "gpio"; - }; - - pmx_gpio_1: pmx-gpio-1 { - marvell,pins = "mpp1"; - marvell,function = "gpio"; - }; - - pmx_gpio_2: pmx-gpio-2 { - marvell,pins = "mpp2"; - marvell,function = "gpio"; - }; - - pmx_gpio_3: pmx-gpio-3 { - marvell,pins = "mpp3"; - marvell,function = "gpio"; - }; - - pmx_gpio_4: pmx-gpio-4 { - marvell,pins = "mpp4"; - marvell,function = "gpio"; - }; - - pmx_gpio_5: pmx-gpio-5 { - marvell,pins = "mpp5"; - marvell,function = "gpio"; - }; - - pmx_gpio_6: pmx-gpio-6 { - marvell,pins = "mpp6"; - marvell,function = "gpio"; - }; - - pmx_gpio_7: pmx-gpio-7 { - marvell,pins = "mpp7"; - marvell,function = "gpio"; - }; - - pmx_gpio_8: pmx-gpio-8 { - marvell,pins = "mpp8"; - marvell,function = "gpio"; - }; - - pmx_gpio_9: pmx-gpio-9 { - marvell,pins = "mpp9"; - marvell,function = "gpio"; - }; - - pmx_gpio_10: pmx-gpio-10 { - marvell,pins = "mpp10"; - marvell,function = "gpio"; - }; - - pmx_gpio_11: pmx-gpio-11 { - marvell,pins = "mpp11"; - marvell,function = "gpio"; - }; - - pmx_gpio_12: pmx-gpio-12 { - marvell,pins = "mpp12"; - marvell,function = "gpio"; - }; - - pmx_gpio_13: pmx-gpio-13 { - marvell,pins = "mpp13"; - marvell,function = "gpio"; - }; - - pmx_audio1_extclk: pmx-audio1-extclk { - marvell,pins = "mpp13"; - marvell,function = "audio1"; - }; - - pmx_gpio_14: pmx-gpio-14 { - marvell,pins = "mpp14"; - marvell,function = "gpio"; - }; - - pmx_gpio_15: pmx-gpio-15 { - marvell,pins = "mpp15"; - marvell,function = "gpio"; - }; - - pmx_gpio_16: pmx-gpio-16 { - marvell,pins = "mpp16"; - marvell,function = "gpio"; - }; - - pmx_gpio_17: pmx-gpio-17 { - marvell,pins = "mpp17"; - marvell,function = "gpio"; - }; - - pmx_gpio_18: pmx-gpio-18 { - marvell,pins = "mpp18"; - marvell,function = "gpio"; - }; - - pmx_gpio_19: pmx-gpio-19 { - marvell,pins = "mpp19"; - marvell,function = "gpio"; - }; - - pmx_gpio_20: pmx-gpio-20 { - marvell,pins = "mpp20"; - marvell,function = "gpio"; - }; - - pmx_gpio_21: pmx-gpio-21 { - marvell,pins = "mpp21"; - marvell,function = "gpio"; - }; - - pmx_camera: pmx-camera { - marvell,pins = "mpp_camera"; - marvell,function = "camera"; - }; - - pmx_camera_gpio: pmx-camera-gpio { - marvell,pins = "mpp_camera"; - marvell,function = "gpio"; - }; - - pmx_sdio0: pmx-sdio0 { - marvell,pins = "mpp_sdio0"; - marvell,function = "sdio0"; - }; - - pmx_sdio0_gpio: pmx-sdio0-gpio { - marvell,pins = "mpp_sdio0"; - marvell,function = "gpio"; - }; - - pmx_sdio1: pmx-sdio1 { - marvell,pins = "mpp_sdio1"; - marvell,function = "sdio1"; - }; - - pmx_sdio1_gpio: pmx-sdio1-gpio { - marvell,pins = "mpp_sdio1"; - marvell,function = "gpio"; - }; - - pmx_audio1_gpio: pmx-audio1-gpio { - marvell,pins = "mpp_audio1"; - marvell,function = "gpio"; - }; - - pmx_audio1_i2s1_spdifo: pmx-audio1-i2s1-spdifo { - marvell,pins = "mpp_audio1"; - marvell,function = "i2s1/spdifo"; - }; - - pmx_spi0: pmx-spi0 { - marvell,pins = "mpp_spi0"; - marvell,function = "spi0"; - }; - - pmx_spi0_gpio: pmx-spi0-gpio { - marvell,pins = "mpp_spi0"; - marvell,function = "gpio"; - }; - - pmx_uart1: pmx-uart1 { - marvell,pins = "mpp_uart1"; - marvell,function = "uart1"; - }; - - pmx_uart1_gpio: pmx-uart1-gpio { - marvell,pins = "mpp_uart1"; - marvell,function = "gpio"; - }; - - pmx_nand: pmx-nand { - marvell,pins = "mpp_nand"; - marvell,function = "nand"; - }; - - pmx_nand_gpo: pmx-nand-gpo { - marvell,pins = "mpp_nand"; - marvell,function = "gpo"; - }; - }; - - spi0: spi-ctrl@10600 { - compatible = "marvell,orion-spi"; - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - interrupts = <6>; - reg = <0x10600 0x28>; - clocks = <&core_clk 0>; - pinctrl-0 = <&pmx_spi0>; - pinctrl-names = "default"; - status = "disabled"; - }; - - spi1: spi-ctrl@14600 { - compatible = "marvell,orion-spi"; - #address-cells = <1>; - #size-cells = <0>; - cell-index = <1>; - interrupts = <5>; - reg = <0x14600 0x28>; - clocks = <&core_clk 0>; - status = "disabled"; - }; - - i2c0: i2c-ctrl@11000 { - compatible = "marvell,mv64xxx-i2c"; - reg = <0x11000 0x20>; - #address-cells = <1>; - #size-cells = <0>; - interrupts = <11>; - clock-frequency = <400000>; - timeout-ms = <1000>; - clocks = <&core_clk 0>; - status = "disabled"; - }; - - ehci0: usb-host@50000 { - compatible = "marvell,orion-ehci"; - reg = <0x50000 0x1000>; - interrupts = <24>; - clocks = <&gate_clk 0>; - status = "okay"; - }; - - ehci1: usb-host@51000 { - compatible = "marvell,orion-ehci"; - reg = <0x51000 0x1000>; - interrupts = <25>; - clocks = <&gate_clk 1>; - status = "okay"; - }; - - sdio0: sdio-host@92000 { - compatible = "marvell,dove-sdhci"; - reg = <0x92000 0x100>; - interrupts = <35>, <37>; - clocks = <&gate_clk 8>; - pinctrl-0 = <&pmx_sdio0>; - pinctrl-names = "default"; - status = "disabled"; - }; - - sdio1: sdio-host@90000 { - compatible = "marvell,dove-sdhci"; - reg = <0x90000 0x100>; - interrupts = <36>, <38>; - clocks = <&gate_clk 9>; - pinctrl-0 = <&pmx_sdio1>; - pinctrl-names = "default"; - status = "disabled"; - }; - - sata0: sata-host@a0000 { - compatible = "marvell,orion-sata"; - reg = <0xa0000 0x2400>; - interrupts = <62>; - clocks = <&gate_clk 3>; - nr-ports = <1>; - status = "disabled"; - }; - - rtc: real-time-clock@d8500 { - compatible = "marvell,orion-rtc"; - reg = <0xd8500 0x20>; - }; - - crypto: crypto-engine@30000 { - compatible = "marvell,orion-crypto"; - reg = <0x30000 0x10000>, - <0xffffe000 0x800>; - reg-names = "regs", "sram"; - interrupts = <31>; - clocks = <&gate_clk 15>; - status = "okay"; - }; - - xor0: dma-engine@60800 { - compatible = "marvell,orion-xor"; - reg = <0x60800 0x100 - 0x60a00 0x100>; - clocks = <&gate_clk 23>; - status = "okay"; - - channel0 { - interrupts = <39>; - dmacap,memcpy; - dmacap,xor; - }; - - channel1 { - interrupts = <40>; - dmacap,memcpy; - dmacap,xor; - }; - }; - - xor1: dma-engine@60900 { - compatible = "marvell,orion-xor"; - reg = <0x60900 0x100 - 0x60b00 0x100>; - clocks = <&gate_clk 24>; - status = "okay"; - - channel0 { - interrupts = <42>; - dmacap,memcpy; - dmacap,xor; - }; - - channel1 { - interrupts = <43>; - dmacap,memcpy; - dmacap,xor; - }; - }; - - mdio: mdio-bus@72004 { - compatible = "marvell,orion-mdio"; - #address-cells = <1>; - #size-cells = <0>; - reg = <0x72004 0x84>; - interrupts = <30>; - clocks = <&gate_clk 2>; - status = "disabled"; - - ethphy: ethernet-phy { - device-type = "ethernet-phy"; - /* set phy address in board file */ - }; - }; - - eth: ethernet-ctrl@72000 { - compatible = "marvell,orion-eth"; - #address-cells = <1>; - #size-cells = <0>; - reg = <0x72000 0x4000>; - clocks = <&gate_clk 2>; - marvell,tx-checksum-limit = <1600>; - status = "disabled"; - - ethernet-port@0 { - device_type = "network"; - compatible = "marvell,orion-eth-port"; - reg = <0>; - interrupts = <29>; - /* overwrite MAC address in bootloader */ - local-mac-address = [00 00 00 00 00 00]; - phy-handle = <ðphy>; - }; - }; - - audio0: audio-controller@b0000 { - compatible = "marvell,dove-audio"; - reg = <0xb0000 0x2210>; - interrupts = <19>, <20>; - clocks = <&gate_clk 12>; - clock-names = "internal"; - status = "disabled"; - }; - - audio1: audio-controller@b4000 { - compatible = "marvell,dove-audio"; - reg = <0xb4000 0x2210>; - interrupts = <21>, <22>; - clocks = <&gate_clk 13>; - clock-names = "internal"; - status = "disabled"; + #size-cells = <0>; + reg = <0x72004 0x84>; + interrupts = <30>; + clocks = <&gate_clk 2>; + status = "disabled"; + + ethphy: ethernet-phy { + device-type = "ethernet-phy"; + /* set phy address in board file */ + }; + }; + + eth: ethernet-controller@72000 { + compatible = "marvell,orion-eth"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x72000 0x4000>; + clocks = <&gate_clk 2>; + marvell,tx-checksum-limit = <1600>; + status = "disabled"; + + ethernet-port@0 { + device_type = "network"; + compatible = "marvell,orion-eth-port"; + reg = <0>; + interrupts = <29>; + /* overwrite MAC address in bootloader */ + local-mac-address = [00 00 00 00 00 00]; + phy-handle = <ðphy>; }; }; }; diff --git a/arch/arm/boot/dts/dra7-evm.dts b/arch/arm/boot/dts/dra7-evm.dts deleted file mode 100644 index 5babba0..0000000 --- a/arch/arm/boot/dts/dra7-evm.dts +++ /dev/null @@ -1,275 +0,0 @@ -/* - * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/ - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -/dts-v1/; - -#include "dra7.dtsi" - -/ { - model = "TI DRA7"; - compatible = "ti,dra7-evm", "ti,dra752", "ti,dra7"; - - memory { - device_type = "memory"; - reg = <0x80000000 0x60000000>; /* 1536 MB */ - }; - - mmc2_3v3: fixedregulator-mmc2 { - compatible = "regulator-fixed"; - regulator-name = "mmc2_3v3"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - }; -}; - -&dra7_pmx_core { - i2c1_pins: pinmux_i2c1_pins { - pinctrl-single,pins = < - 0x400 (PIN_INPUT | MUX_MODE0) /* i2c1_sda */ - 0x404 (PIN_INPUT | MUX_MODE0) /* i2c1_scl */ - >; - }; - - i2c2_pins: pinmux_i2c2_pins { - pinctrl-single,pins = < - 0x408 (PIN_INPUT | MUX_MODE0) /* i2c2_sda */ - 0x40c (PIN_INPUT | MUX_MODE0) /* i2c2_scl */ - >; - }; - - i2c3_pins: pinmux_i2c3_pins { - pinctrl-single,pins = < - 0x410 (PIN_INPUT | MUX_MODE0) /* i2c3_sda */ - 0x414 (PIN_INPUT | MUX_MODE0) /* i2c3_scl */ - >; - }; - - mcspi1_pins: pinmux_mcspi1_pins { - pinctrl-single,pins = < - 0x3a4 (PIN_INPUT | MUX_MODE0) /* spi2_clk */ - 0x3a8 (PIN_INPUT | MUX_MODE0) /* spi2_d1 */ - 0x3ac (PIN_INPUT | MUX_MODE0) /* spi2_d0 */ - 0x3b0 (PIN_INPUT_SLEW | MUX_MODE0) /* spi2_cs0 */ - 0x3b4 (PIN_INPUT_SLEW | MUX_MODE0) /* spi2_cs1 */ - 0x3b8 (PIN_INPUT_SLEW | MUX_MODE6) /* spi2_cs2 */ - 0x3bc (PIN_INPUT_SLEW | MUX_MODE6) /* spi2_cs3 */ - >; - }; - - mcspi2_pins: pinmux_mcspi2_pins { - pinctrl-single,pins = < - 0x3c0 (PIN_INPUT | MUX_MODE0) /* spi2_sclk */ - 0x3c4 (PIN_INPUT_SLEW | MUX_MODE0) /* spi2_d1 */ - 0x3c8 (PIN_INPUT_SLEW | MUX_MODE0) /* spi2_d1 */ - 0x3cc (PIN_INPUT_SLEW | MUX_MODE0) /* spi2_cs0 */ - >; - }; - - uart1_pins: pinmux_uart1_pins { - pinctrl-single,pins = < - 0x3e0 (PIN_INPUT_SLEW | MUX_MODE0) /* uart1_rxd */ - 0x3e4 (PIN_INPUT_SLEW | MUX_MODE0) /* uart1_txd */ - 0x3e8 (PIN_INPUT | MUX_MODE3) /* uart1_ctsn */ - 0x3ec (PIN_INPUT | MUX_MODE3) /* uart1_rtsn */ - >; - }; - - uart2_pins: pinmux_uart2_pins { - pinctrl-single,pins = < - 0x3f0 (PIN_INPUT | MUX_MODE0) /* uart2_rxd */ - 0x3f4 (PIN_INPUT | MUX_MODE0) /* uart2_txd */ - 0x3f8 (PIN_INPUT | MUX_MODE0) /* uart2_ctsn */ - 0x3fc (PIN_INPUT | MUX_MODE0) /* uart2_rtsn */ - >; - }; - - uart3_pins: pinmux_uart3_pins { - pinctrl-single,pins = < - 0x248 (PIN_INPUT_SLEW | MUX_MODE0) /* uart3_rxd */ - 0x24c (PIN_INPUT_SLEW | MUX_MODE0) /* uart3_txd */ - >; - }; -}; - -&i2c1 { - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&i2c1_pins>; - clock-frequency = <400000>; - - tps659038: tps659038@58 { - compatible = "ti,tps659038"; - reg = <0x58>; - - tps659038_pmic { - compatible = "ti,tps659038-pmic"; - - regulators { - smps123_reg: smps123 { - /* VDD_MPU */ - regulator-name = "smps123"; - regulator-min-microvolt = < 850000>; - regulator-max-microvolt = <1250000>; - regulator-always-on; - regulator-boot-on; - }; - - smps45_reg: smps45 { - /* VDD_DSPEVE */ - regulator-name = "smps45"; - regulator-min-microvolt = < 850000>; - regulator-max-microvolt = <1150000>; - regulator-boot-on; - }; - - smps6_reg: smps6 { - /* VDD_GPU - over VDD_SMPS6 */ - regulator-name = "smps6"; - regulator-min-microvolt = <850000>; - regulator-max-microvolt = <12500000>; - regulator-boot-on; - }; - - smps7_reg: smps7 { - /* CORE_VDD */ - regulator-name = "smps7"; - regulator-min-microvolt = <850000>; - regulator-max-microvolt = <1030000>; - regulator-always-on; - regulator-boot-on; - }; - - smps8_reg: smps8 { - /* VDD_IVAHD */ - regulator-name = "smps8"; - regulator-min-microvolt = < 850000>; - regulator-max-microvolt = <1250000>; - regulator-boot-on; - }; - - smps9_reg: smps9 { - /* VDDS1V8 */ - regulator-name = "smps9"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-always-on; - regulator-boot-on; - }; - - ldo1_reg: ldo1 { - /* LDO1_OUT --> SDIO */ - regulator-name = "ldo1"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - regulator-boot-on; - }; - - ldo2_reg: ldo2 { - /* VDD_RTCIO */ - /* LDO2 -> VDDSHV5, LDO2 also goes to CAN_PHY_3V3 */ - regulator-name = "ldo2"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-boot-on; - }; - - ldo3_reg: ldo3 { - /* VDDA_1V8_PHY */ - regulator-name = "ldo3"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-boot-on; - }; - - ldo9_reg: ldo9 { - /* VDD_RTC */ - regulator-name = "ldo9"; - regulator-min-microvolt = <1050000>; - regulator-max-microvolt = <1050000>; - regulator-boot-on; - }; - - ldoln_reg: ldoln { - /* VDDA_1V8_PLL */ - regulator-name = "ldoln"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-always-on; - regulator-boot-on; - }; - - ldousb_reg: ldousb { - /* VDDA_3V_USB: VDDA_USBHS33 */ - regulator-name = "ldousb"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-boot-on; - }; - }; - }; - }; -}; - -&i2c2 { - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&i2c2_pins>; - clock-frequency = <400000>; -}; - -&i2c3 { - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&i2c3_pins>; - clock-frequency = <3400000>; -}; - -&mcspi1 { - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&mcspi1_pins>; -}; - -&mcspi2 { - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&mcspi2_pins>; -}; - -&uart1 { - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&uart1_pins>; -}; - -&uart2 { - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&uart2_pins>; -}; - -&uart3 { - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&uart3_pins>; -}; - -&mmc1 { - status = "okay"; - vmmc-supply = <&ldo1_reg>; - bus-width = <4>; -}; - -&mmc2 { - status = "okay"; - vmmc-supply = <&mmc2_3v3>; - bus-width = <8>; -}; - -&cpu0 { - cpu0-supply = <&smps123_reg>; -}; diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi deleted file mode 100644 index d0df4c4..0000000 --- a/arch/arm/boot/dts/dra7.dtsi +++ /dev/null @@ -1,586 +0,0 @@ -/* - * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/ - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * Based on "omap4.dtsi" - */ - -#include <dt-bindings/interrupt-controller/arm-gic.h> -#include <dt-bindings/pinctrl/dra.h> - -#include "skeleton.dtsi" - -/ { - #address-cells = <1>; - #size-cells = <1>; - - compatible = "ti,dra7xx"; - interrupt-parent = <&gic>; - - aliases { - i2c0 = &i2c1; - i2c1 = &i2c2; - i2c2 = &i2c3; - i2c3 = &i2c4; - i2c4 = &i2c5; - serial0 = &uart1; - serial1 = &uart2; - serial2 = &uart3; - serial3 = &uart4; - serial4 = &uart5; - serial5 = &uart6; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu0: cpu@0 { - device_type = "cpu"; - compatible = "arm,cortex-a15"; - reg = <0>; - - operating-points = < - /* kHz uV */ - 1000000 1060000 - 1176000 1160000 - >; - }; - cpu@1 { - device_type = "cpu"; - compatible = "arm,cortex-a15"; - reg = <1>; - }; - }; - - timer { - compatible = "arm,armv7-timer"; - interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, - <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, - <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, - <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; - }; - - gic: interrupt-controller@48211000 { - compatible = "arm,cortex-a15-gic"; - interrupt-controller; - #interrupt-cells = <3>; - reg = <0x48211000 0x1000>, - <0x48212000 0x1000>, - <0x48214000 0x2000>, - <0x48216000 0x2000>; - interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>; - }; - - /* - * The soc node represents the soc top level view. It is uses for IPs - * that are not memory mapped in the MPU view or for the MPU itself. - */ - soc { - compatible = "ti,omap-infra"; - mpu { - compatible = "ti,omap5-mpu"; - ti,hwmods = "mpu"; - }; - }; - - /* - * XXX: Use a flat representation of the SOC interconnect. - * The real OMAP interconnect network is quite complex. - * Since that will not bring real advantage to represent that in DT for - * the moment, just use a fake OCP bus entry to represent the whole bus - * hierarchy. - */ - ocp { - compatible = "ti,omap4-l3-noc", "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; - ranges; - ti,hwmods = "l3_main_1", "l3_main_2"; - reg = <0x44000000 0x2000>, - <0x44800000 0x3000>; - interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; - - counter32k: counter@4ae04000 { - compatible = "ti,omap-counter32k"; - reg = <0x4ae04000 0x40>; - ti,hwmods = "counter_32k"; - }; - - dra7_pmx_core: pinmux@4a003400 { - compatible = "pinctrl-single"; - reg = <0x4a003400 0x0464>; - #address-cells = <1>; - #size-cells = <0>; - pinctrl-single,register-width = <32>; - pinctrl-single,function-mask = <0x3fffffff>; - }; - - sdma: dma-controller@4a056000 { - compatible = "ti,omap4430-sdma"; - reg = <0x4a056000 0x1000>; - interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; - #dma-cells = <1>; - #dma-channels = <32>; - #dma-requests = <127>; - }; - - gpio1: gpio@4ae10000 { - compatible = "ti,omap4-gpio"; - reg = <0x4ae10000 0x200>; - interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; - ti,hwmods = "gpio1"; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <1>; - }; - - gpio2: gpio@48055000 { - compatible = "ti,omap4-gpio"; - reg = <0x48055000 0x200>; - interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; - ti,hwmods = "gpio2"; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <1>; - }; - - gpio3: gpio@48057000 { - compatible = "ti,omap4-gpio"; - reg = <0x48057000 0x200>; - interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; - ti,hwmods = "gpio3"; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <1>; - }; - - gpio4: gpio@48059000 { - compatible = "ti,omap4-gpio"; - reg = <0x48059000 0x200>; - interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; - ti,hwmods = "gpio4"; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <1>; - }; - - gpio5: gpio@4805b000 { - compatible = "ti,omap4-gpio"; - reg = <0x4805b000 0x200>; - interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; - ti,hwmods = "gpio5"; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <1>; - }; - - gpio6: gpio@4805d000 { - compatible = "ti,omap4-gpio"; - reg = <0x4805d000 0x200>; - interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>; - ti,hwmods = "gpio6"; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <1>; - }; - - gpio7: gpio@48051000 { - compatible = "ti,omap4-gpio"; - reg = <0x48051000 0x200>; - interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>; - ti,hwmods = "gpio7"; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <1>; - }; - - gpio8: gpio@48053000 { - compatible = "ti,omap4-gpio"; - reg = <0x48053000 0x200>; - interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>; - ti,hwmods = "gpio8"; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <1>; - }; - - uart1: serial@4806a000 { - compatible = "ti,omap4-uart"; - reg = <0x4806a000 0x100>; - interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>; - ti,hwmods = "uart1"; - clock-frequency = <48000000>; - status = "disabled"; - }; - - uart2: serial@4806c000 { - compatible = "ti,omap4-uart"; - reg = <0x4806c000 0x100>; - interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; - ti,hwmods = "uart2"; - clock-frequency = <48000000>; - status = "disabled"; - }; - - uart3: serial@48020000 { - compatible = "ti,omap4-uart"; - reg = <0x48020000 0x100>; - interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>; - ti,hwmods = "uart3"; - clock-frequency = <48000000>; - status = "disabled"; - }; - - uart4: serial@4806e000 { - compatible = "ti,omap4-uart"; - reg = <0x4806e000 0x100>; - interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>; - ti,hwmods = "uart4"; - clock-frequency = <48000000>; - status = "disabled"; - }; - - uart5: serial@48066000 { - compatible = "ti,omap4-uart"; - reg = <0x48066000 0x100>; - interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>; - ti,hwmods = "uart5"; - clock-frequency = <48000000>; - status = "disabled"; - }; - - uart6: serial@48068000 { - compatible = "ti,omap4-uart"; - reg = <0x48068000 0x100>; - interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>; - ti,hwmods = "uart6"; - clock-frequency = <48000000>; - status = "disabled"; - }; - - uart7: serial@48420000 { - compatible = "ti,omap4-uart"; - reg = <0x48420000 0x100>; - ti,hwmods = "uart7"; - clock-frequency = <48000000>; - status = "disabled"; - }; - - uart8: serial@48422000 { - compatible = "ti,omap4-uart"; - reg = <0x48422000 0x100>; - ti,hwmods = "uart8"; - clock-frequency = <48000000>; - status = "disabled"; - }; - - uart9: serial@48424000 { - compatible = "ti,omap4-uart"; - reg = <0x48424000 0x100>; - ti,hwmods = "uart9"; - clock-frequency = <48000000>; - status = "disabled"; - }; - - uart10: serial@4ae2b000 { - compatible = "ti,omap4-uart"; - reg = <0x4ae2b000 0x100>; - ti,hwmods = "uart10"; - clock-frequency = <48000000>; - status = "disabled"; - }; - - timer1: timer@4ae18000 { - compatible = "ti,omap5430-timer"; - reg = <0x4ae18000 0x80>; - interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; - ti,hwmods = "timer1"; - ti,timer-alwon; - }; - - timer2: timer@48032000 { - compatible = "ti,omap5430-timer"; - reg = <0x48032000 0x80>; - interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; - ti,hwmods = "timer2"; - }; - - timer3: timer@48034000 { - compatible = "ti,omap5430-timer"; - reg = <0x48034000 0x80>; - interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>; - ti,hwmods = "timer3"; - }; - - timer4: timer@48036000 { - compatible = "ti,omap5430-timer"; - reg = <0x48036000 0x80>; - interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>; - ti,hwmods = "timer4"; - }; - - timer5: timer@48820000 { - compatible = "ti,omap5430-timer"; - reg = <0x48820000 0x80>; - interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>; - ti,hwmods = "timer5"; - ti,timer-dsp; - }; - - timer6: timer@48822000 { - compatible = "ti,omap5430-timer"; - reg = <0x48822000 0x80>; - interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>; - ti,hwmods = "timer6"; - ti,timer-dsp; - ti,timer-pwm; - }; - - timer7: timer@48824000 { - compatible = "ti,omap5430-timer"; - reg = <0x48824000 0x80>; - interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>; - ti,hwmods = "timer7"; - ti,timer-dsp; - }; - - timer8: timer@48826000 { - compatible = "ti,omap5430-timer"; - reg = <0x48826000 0x80>; - interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>; - ti,hwmods = "timer8"; - ti,timer-dsp; - ti,timer-pwm; - }; - - timer9: timer@4803e000 { - compatible = "ti,omap5430-timer"; - reg = <0x4803e000 0x80>; - interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>; - ti,hwmods = "timer9"; - }; - - timer10: timer@48086000 { - compatible = "ti,omap5430-timer"; - reg = <0x48086000 0x80>; - interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>; - ti,hwmods = "timer10"; - }; - - timer11: timer@48088000 { - compatible = "ti,omap5430-timer"; - reg = <0x48088000 0x80>; - interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>; - ti,hwmods = "timer11"; - ti,timer-pwm; - }; - - timer13: timer@48828000 { - compatible = "ti,omap5430-timer"; - reg = <0x48828000 0x80>; - ti,hwmods = "timer13"; - status = "disabled"; - }; - - timer14: timer@4882a000 { - compatible = "ti,omap5430-timer"; - reg = <0x4882a000 0x80>; - ti,hwmods = "timer14"; - status = "disabled"; - }; - - timer15: timer@4882c000 { - compatible = "ti,omap5430-timer"; - reg = <0x4882c000 0x80>; - ti,hwmods = "timer15"; - status = "disabled"; - }; - - timer16: timer@4882e000 { - compatible = "ti,omap5430-timer"; - reg = <0x4882e000 0x80>; - ti,hwmods = "timer16"; - status = "disabled"; - }; - - wdt2: wdt@4ae14000 { - compatible = "ti,omap4-wdt"; - reg = <0x4ae14000 0x80>; - interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>; - ti,hwmods = "wd_timer2"; - }; - - i2c1: i2c@48070000 { - compatible = "ti,omap4-i2c"; - reg = <0x48070000 0x100>; - interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>; - #address-cells = <1>; - #size-cells = <0>; - ti,hwmods = "i2c1"; - status = "disabled"; - }; - - i2c2: i2c@48072000 { - compatible = "ti,omap4-i2c"; - reg = <0x48072000 0x100>; - interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>; - #address-cells = <1>; - #size-cells = <0>; - ti,hwmods = "i2c2"; - status = "disabled"; - }; - - i2c3: i2c@48060000 { - compatible = "ti,omap4-i2c"; - reg = <0x48060000 0x100>; - interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>; - #address-cells = <1>; - #size-cells = <0>; - ti,hwmods = "i2c3"; - status = "disabled"; - }; - - i2c4: i2c@4807a000 { - compatible = "ti,omap4-i2c"; - reg = <0x4807a000 0x100>; - interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>; - #address-cells = <1>; - #size-cells = <0>; - ti,hwmods = "i2c4"; - status = "disabled"; - }; - - i2c5: i2c@4807c000 { - compatible = "ti,omap4-i2c"; - reg = <0x4807c000 0x100>; - interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>; - #address-cells = <1>; - #size-cells = <0>; - ti,hwmods = "i2c5"; - status = "disabled"; - }; - - mmc1: mmc@4809c000 { - compatible = "ti,omap4-hsmmc"; - reg = <0x4809c000 0x400>; - interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>; - ti,hwmods = "mmc1"; - ti,dual-volt; - ti,needs-special-reset; - dmas = <&sdma 61>, <&sdma 62>; - dma-names = "tx", "rx"; - status = "disabled"; - }; - - mmc2: mmc@480b4000 { - compatible = "ti,omap4-hsmmc"; - reg = <0x480b4000 0x400>; - interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>; - ti,hwmods = "mmc2"; - ti,needs-special-reset; - dmas = <&sdma 47>, <&sdma 48>; - dma-names = "tx", "rx"; - status = "disabled"; - }; - - mmc3: mmc@480ad000 { - compatible = "ti,omap4-hsmmc"; - reg = <0x480ad000 0x400>; - interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>; - ti,hwmods = "mmc3"; - ti,needs-special-reset; - dmas = <&sdma 77>, <&sdma 78>; - dma-names = "tx", "rx"; - status = "disabled"; - }; - - mmc4: mmc@480d1000 { - compatible = "ti,omap4-hsmmc"; - reg = <0x480d1000 0x400>; - interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>; - ti,hwmods = "mmc4"; - ti,needs-special-reset; - dmas = <&sdma 57>, <&sdma 58>; - dma-names = "tx", "rx"; - status = "disabled"; - }; - - mcspi1: spi@48098000 { - compatible = "ti,omap4-mcspi"; - reg = <0x48098000 0x200>; - interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>; - #address-cells = <1>; - #size-cells = <0>; - ti,hwmods = "mcspi1"; - ti,spi-num-cs = <4>; - dmas = <&sdma 35>, - <&sdma 36>, - <&sdma 37>, - <&sdma 38>, - <&sdma 39>, - <&sdma 40>, - <&sdma 41>, - <&sdma 42>; - dma-names = "tx0", "rx0", "tx1", "rx1", - "tx2", "rx2", "tx3", "rx3"; - status = "disabled"; - }; - - mcspi2: spi@4809a000 { - compatible = "ti,omap4-mcspi"; - reg = <0x4809a000 0x200>; - interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>; - #address-cells = <1>; - #size-cells = <0>; - ti,hwmods = "mcspi2"; - ti,spi-num-cs = <2>; - dmas = <&sdma 43>, - <&sdma 44>, - <&sdma 45>, - <&sdma 46>; - dma-names = "tx0", "rx0", "tx1", "rx1"; - status = "disabled"; - }; - - mcspi3: spi@480b8000 { - compatible = "ti,omap4-mcspi"; - reg = <0x480b8000 0x200>; - interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>; - #address-cells = <1>; - #size-cells = <0>; - ti,hwmods = "mcspi3"; - ti,spi-num-cs = <2>; - dmas = <&sdma 15>, <&sdma 16>; - dma-names = "tx0", "rx0"; - status = "disabled"; - }; - - mcspi4: spi@480ba000 { - compatible = "ti,omap4-mcspi"; - reg = <0x480ba000 0x200>; - interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>; - #address-cells = <1>; - #size-cells = <0>; - ti,hwmods = "mcspi4"; - ti,spi-num-cs = <1>; - dmas = <&sdma 70>, <&sdma 71>; - dma-names = "tx0", "rx0"; - status = "disabled"; - }; - }; -}; diff --git a/arch/arm/boot/dts/ecx-2000.dts b/arch/arm/boot/dts/ecx-2000.dts index 2ccbb57f..139b40c 100644 --- a/arch/arm/boot/dts/ecx-2000.dts +++ b/arch/arm/boot/dts/ecx-2000.dts @@ -85,12 +85,6 @@ <1 10 0xf08>; }; - memory-controller@fff00000 { - compatible = "calxeda,ecx-2000-ddr-ctrl"; - reg = <0xfff00000 0x1000>; - interrupts = <0 91 4>; - }; - intc: interrupt-controller@fff11000 { compatible = "arm,cortex-a15-gic"; #interrupt-cells = <3>; diff --git a/arch/arm/boot/dts/ecx-common.dtsi b/arch/arm/boot/dts/ecx-common.dtsi index b90045a..e8559b7 100644 --- a/arch/arm/boot/dts/ecx-common.dtsi +++ b/arch/arm/boot/dts/ecx-common.dtsi @@ -19,14 +19,6 @@ bootargs = "console=ttyAMA0"; }; - psci { - compatible = "arm,psci"; - method = "smc"; - cpu_suspend = <0x84000002>; - cpu_off = <0x84000004>; - cpu_on = <0x84000006>; - }; - soc { #address-cells = <1>; #size-cells = <1>; @@ -53,6 +45,12 @@ status = "disabled"; }; + memory-controller@fff00000 { + compatible = "calxeda,hb-ddr-ctrl"; + reg = <0xfff00000 0x1000>; + interrupts = <0 91 4>; + }; + ipc@fff20000 { compatible = "arm,pl320", "arm,primecell"; reg = <0xfff20000 0x1000>; diff --git a/arch/arm/boot/dts/emev2-kzm9d-reference.dts b/arch/arm/boot/dts/emev2-kzm9d-reference.dts new file mode 100644 index 0000000..cceefda --- /dev/null +++ b/arch/arm/boot/dts/emev2-kzm9d-reference.dts @@ -0,0 +1,57 @@ +/* + * Device Tree Source for the KZM9D board + * + * Copyright (C) 2013 Renesas Solutions Corp. + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ +/dts-v1/; + +/include/ "emev2.dtsi" + +/ { + model = "EMEV2 KZM9D Board"; + compatible = "renesas,kzm9d-reference", "renesas,emev2"; + + memory { + device_type = "memory"; + reg = <0x40000000 0x8000000>; + }; + + chosen { + bootargs = "console=ttyS1,115200n81 ignore_loglevel root=/dev/nfs ip=dhcp"; + }; + + reg_1p8v: regulator@0 { + compatible = "regulator-fixed"; + regulator-name = "fixed-1.8V"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-boot-on; + }; + + reg_3p3v: regulator@1 { + compatible = "regulator-fixed"; + regulator-name = "fixed-3.3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + regulator-boot-on; + }; + + lan9220@20000000 { + compatible = "smsc,lan9220", "smsc,lan9115"; + reg = <0x20000000 0x10000>; + phy-mode = "mii"; + interrupt-parent = <&gpio0>; + interrupts = <1 1>; /* active high */ + reg-io-width = <4>; + smsc,irq-active-high; + smsc,irq-push-pull; + vddvario-supply = <®_1p8v>; + vdd33a-supply = <®_3p3v>; + }; +}; diff --git a/arch/arm/boot/dts/emev2-kzm9d.dts b/arch/arm/boot/dts/emev2-kzm9d.dts index 861aa7d..f92e812 100644 --- a/arch/arm/boot/dts/emev2-kzm9d.dts +++ b/arch/arm/boot/dts/emev2-kzm9d.dts @@ -1,7 +1,7 @@ /* * Device Tree Source for the KZM9D board * - * Copyright (C) 2013 Renesas Solutions Corp. + * Copyright (C) 2012 Renesas Solutions Corp. * * This file is licensed under the terms of the GNU General Public License * version 2. This program is licensed "as is" without any warranty of any @@ -23,35 +23,4 @@ chosen { bootargs = "console=ttyS1,115200n81 ignore_loglevel root=/dev/nfs ip=dhcp"; }; - - reg_1p8v: regulator@0 { - compatible = "regulator-fixed"; - regulator-name = "fixed-1.8V"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-always-on; - regulator-boot-on; - }; - - reg_3p3v: regulator@1 { - compatible = "regulator-fixed"; - regulator-name = "fixed-3.3V"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - regulator-boot-on; - }; - - lan9220@20000000 { - compatible = "smsc,lan9220", "smsc,lan9115"; - reg = <0x20000000 0x10000>; - phy-mode = "mii"; - interrupt-parent = <&gpio0>; - interrupts = <1 1>; /* active high */ - reg-io-width = <4>; - smsc,irq-active-high; - smsc,irq-push-pull; - vddvario-supply = <®_1p8v>; - vdd33a-supply = <®_3p3v>; - }; }; diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi index a73eeb5..caadc02 100644 --- a/arch/arm/boot/dts/exynos4.dtsi +++ b/arch/arm/boot/dts/exynos4.dtsi @@ -49,12 +49,6 @@ reg = <0x10000000 0x100>; }; - mipi_phy: video-phy@10020710 { - compatible = "samsung,s5pv210-mipi-video-phy"; - reg = <0x10020710 8>; - #phy-cells = <1>; - }; - pd_mfc: mfc-power-domain@10023C40 { compatible = "samsung,exynos4210-pd"; reg = <0x10023C40 0x20>; @@ -167,8 +161,6 @@ clock-names = "csis", "sclk_csis"; bus-width = <4>; samsung,power-domain = <&pd_cam>; - phys = <&mipi_phy 0>; - phy-names = "csis"; status = "disabled"; #address-cells = <1>; #size-cells = <0>; @@ -182,8 +174,6 @@ clock-names = "csis", "sclk_csis"; bus-width = <2>; samsung,power-domain = <&pd_cam>; - phys = <&mipi_phy 2>; - phy-names = "csis"; status = "disabled"; #address-cells = <1>; #size-cells = <0>; diff --git a/arch/arm/boot/dts/exynos4210-origen.dts b/arch/arm/boot/dts/exynos4210-origen.dts index 1a12fb2..382d8c7 100644 --- a/arch/arm/boot/dts/exynos4210-origen.dts +++ b/arch/arm/boot/dts/exynos4210-origen.dts @@ -32,20 +32,13 @@ bootargs ="root=/dev/ram0 rw ramdisk=8192 initrd=0x41000000,8M console=ttySAC2,115200 init=/linuxrc"; }; - regulators { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <0>; - - mmc_reg: regulator@0 { - compatible = "regulator-fixed"; - reg = <0>; - regulator-name = "VMEM_VDD_2.8V"; - regulator-min-microvolt = <2800000>; - regulator-max-microvolt = <2800000>; - gpio = <&gpx1 1 0>; - enable-active-high; - }; + mmc_reg: voltage-regulator { + compatible = "regulator-fixed"; + regulator-name = "VMEM_VDD_2.8V"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + gpio = <&gpx1 1 0>; + enable-active-high; }; tmu@100C0000 { @@ -199,12 +192,7 @@ }; buck1_reg: BUCK1 { - /* - * HACK: The real name is VDD_ARM_1.2V, - * but exynos-cpufreq does not support - * DT-based regulator lookup yet. - */ - regulator-name = "vdd_arm"; + regulator-name = "VDD_ARM_1.2V"; regulator-min-microvolt = <950000>; regulator-max-microvolt = <1350000>; regulator-always-on; diff --git a/arch/arm/boot/dts/exynos4210-trats.dts b/arch/arm/boot/dts/exynos4210-trats.dts index 63cc571..1c164f2 100644 --- a/arch/arm/boot/dts/exynos4210-trats.dts +++ b/arch/arm/boot/dts/exynos4210-trats.dts @@ -290,12 +290,7 @@ }; varm_breg: BUCK1 { - /* - * HACK: The real name is VARM_1.2V_C210, - * but exynos-cpufreq does not support - * DT-based regulator lookup yet. - */ - regulator-name = "vdd_arm"; + regulator-name = "VARM_1.2V_C210"; regulator-min-microvolt = <900000>; regulator-max-microvolt = <1350000>; regulator-always-on; diff --git a/arch/arm/boot/dts/exynos4210-universal_c210.dts b/arch/arm/boot/dts/exynos4210-universal_c210.dts index d2e3f5f..889cdad 100644 --- a/arch/arm/boot/dts/exynos4210-universal_c210.dts +++ b/arch/arm/boot/dts/exynos4210-universal_c210.dts @@ -350,7 +350,3 @@ status = "okay"; }; }; - -&mdma1 { - reg = <0x12840000 0x1000>; -}; diff --git a/arch/arm/boot/dts/exynos4412-origen.dts b/arch/arm/boot/dts/exynos4412-origen.dts index d65984c..8768b03 100644 --- a/arch/arm/boot/dts/exynos4412-origen.dts +++ b/arch/arm/boot/dts/exynos4412-origen.dts @@ -32,20 +32,13 @@ reg = <0x0203F000 0x1000>; }; - regulators { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <0>; - - mmc_reg: regulator@0 { - compatible = "regulator-fixed"; - reg = <0>; - regulator-name = "VMEM_VDD_2.8V"; - regulator-min-microvolt = <2800000>; - regulator-max-microvolt = <2800000>; - gpio = <&gpx1 1 0>; - enable-active-high; - }; + mmc_reg: voltage-regulator { + compatible = "regulator-fixed"; + regulator-name = "VMEM_VDD_2.8V"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + gpio = <&gpx1 1 0>; + enable-active-high; }; pinctrl@11000000 { diff --git a/arch/arm/boot/dts/exynos5250-arndale.dts b/arch/arm/boot/dts/exynos5250-arndale.dts index 6845270..cee55fa 100644 --- a/arch/arm/boot/dts/exynos5250-arndale.dts +++ b/arch/arm/boot/dts/exynos5250-arndale.dts @@ -324,14 +324,7 @@ }; i2c@12C80000 { - samsung,i2c-sda-delay = <100>; - samsung,i2c-max-bus-freq = <66000>; - samsung,i2c-slave-addr = <0x50>; - - hdmiddc@50 { - compatible = "samsung,exynos4210-hdmiddc"; - reg = <0x50>; - }; + status = "disabled"; }; i2c@12C90000 { @@ -369,17 +362,6 @@ status = "disabled"; }; - i2c@12CE0000 { - samsung,i2c-sda-delay = <100>; - samsung,i2c-max-bus-freq = <66000>; - samsung,i2c-slave-addr = <0x38>; - - hdmiphy@38 { - compatible = "samsung,exynos4212-hdmiphy"; - reg = <0x38>; - }; - }; - i2c@121D0000 { status = "disabled"; }; @@ -430,10 +412,6 @@ status = "disabled"; }; - i2s0: i2s@03830000 { - status = "okay"; - }; - spi_0: spi@12d20000 { status = "disabled"; }; @@ -504,15 +482,13 @@ #address-cells = <1>; #size-cells = <0>; - main_dc_reg: regulator@0 { + main_dc_reg: fixedregulator@1 { compatible = "regulator-fixed"; - reg = <0>; regulator-name = "MAIN_DC"; }; - mmc_reg: regulator@1 { + mmc_reg: voltage-regulator { compatible = "regulator-fixed"; - reg = <1>; regulator-name = "VDD_33ON_2.8V"; regulator-min-microvolt = <2800000>; regulator-max-microvolt = <2800000>; @@ -520,9 +496,8 @@ enable-active-high; }; - reg_hdmi_en: regulator@2 { + reg_hdmi_en: fixedregulator@0 { compatible = "regulator-fixed"; - reg = <2>; regulator-name = "hdmi-en"; }; }; diff --git a/arch/arm/boot/dts/exynos5250-pinctrl.dtsi b/arch/arm/boot/dts/exynos5250-pinctrl.dtsi index 9a49e68..724a22f 100644 --- a/arch/arm/boot/dts/exynos5250-pinctrl.dtsi +++ b/arch/arm/boot/dts/exynos5250-pinctrl.dtsi @@ -210,21 +210,21 @@ samsung,pins = "gpa0-2", "gpa0-3"; samsung,pin-function = <2>; samsung,pin-pud = <0>; - samsung,pin-drv = <0>; + samaung,pin-drv = <0>; }; i2c2_bus: i2c2-bus { samsung,pins = "gpa0-6", "gpa0-7"; samsung,pin-function = <3>; samsung,pin-pud = <3>; - samsung,pin-drv = <0>; + samaung,pin-drv = <0>; }; i2c2_hs_bus: i2c2-hs-bus { samsung,pins = "gpa0-6", "gpa0-7"; samsung,pin-function = <4>; samsung,pin-pud = <3>; - samsung,pin-drv = <0>; + samaung,pin-drv = <0>; }; uart2_data: uart2-data { @@ -238,21 +238,21 @@ samsung,pins = "gpa1-2", "gpa1-3"; samsung,pin-function = <2>; samsung,pin-pud = <0>; - samsung,pin-drv = <0>; + samaung,pin-drv = <0>; }; i2c3_bus: i2c3-bus { samsung,pins = "gpa1-2", "gpa1-3"; samsung,pin-function = <3>; samsung,pin-pud = <3>; - samsung,pin-drv = <0>; + samaung,pin-drv = <0>; }; i2c3_hs_bus: i2c3-hs-bus { samsung,pins = "gpa1-2", "gpa1-3"; samsung,pin-function = <4>; samsung,pin-pud = <3>; - samsung,pin-drv = <0>; + samaung,pin-drv = <0>; }; uart3_data: uart3-data { @@ -273,14 +273,14 @@ samsung,pins = "gpa2-0", "gpa2-1"; samsung,pin-function = <3>; samsung,pin-pud = <3>; - samsung,pin-drv = <0>; + samaung,pin-drv = <0>; }; i2c5_bus: i2c5-bus { samsung,pins = "gpa2-2", "gpa2-3"; samsung,pin-function = <3>; samsung,pin-pud = <3>; - samsung,pin-drv = <0>; + samaung,pin-drv = <0>; }; spi1_bus: spi1-bus { @@ -376,14 +376,14 @@ samsung,pins = "gpb3-0", "gpb3-1"; samsung,pin-function = <4>; samsung,pin-pud = <3>; - samsung,pin-drv = <0>; + samaung,pin-drv = <0>; }; i2c1_hs_bus: i2c1-hs-bus { samsung,pins = "gpb3-2", "gpb3-3"; samsung,pin-function = <4>; samsung,pin-pud = <3>; - samsung,pin-drv = <0>; + samaung,pin-drv = <0>; }; sd0_clk: sd0-clk { @@ -551,14 +551,14 @@ samsung,pins = "gpd0-2", "gpd0-3"; samsung,pin-function = <2>; samsung,pin-pud = <0>; - samsung,pin-drv = <0>; + samaung,pin-drv = <0>; }; dp_hpd: dp_hpd { samsung,pins = "gpx0-7"; samsung,pin-function = <3>; samsung,pin-pud = <0>; - samsung,pin-drv = <0>; + samaung,pin-drv = <0>; }; }; @@ -649,42 +649,42 @@ "gpf1-0", "gpf1-1", "gpf1-2", "gpf1-3"; samsung,pin-function = <3>; samsung,pin-pud = <0>; - samsung,pin-drv = <0>; + samaung,pin-drv = <0>; }; cam_i2c2_bus: cam-i2c2-bus { samsung,pins = "gpe0-6", "gpe1-0"; samsung,pin-function = <4>; samsung,pin-pud = <3>; - samsung,pin-drv = <0>; + samaung,pin-drv = <0>; }; cam_spi1_bus: cam-spi1-bus { samsung,pins = "gpe0-4", "gpe0-5", "gpf0-2", "gpf0-3"; samsung,pin-function = <4>; samsung,pin-pud = <0>; - samsung,pin-drv = <0>; + samaung,pin-drv = <0>; }; cam_i2c1_bus: cam-i2c1-bus { samsung,pins = "gpf0-2", "gpf0-3"; samsung,pin-function = <2>; samsung,pin-pud = <3>; - samsung,pin-drv = <0>; + samaung,pin-drv = <0>; }; cam_i2c0_bus: cam-i2c0-bus { samsung,pins = "gpf0-0", "gpf0-1"; samsung,pin-function = <2>; samsung,pin-pud = <3>; - samsung,pin-drv = <0>; + samaung,pin-drv = <0>; }; cam_spi0_bus: cam-spi0-bus { samsung,pins = "gpf1-0", "gpf1-1", "gpf1-2", "gpf1-3"; samsung,pin-function = <2>; samsung,pin-pud = <0>; - samsung,pin-drv = <0>; + samaung,pin-drv = <0>; }; cam_bayrgb_bus: cam-bayrgb-bus { @@ -695,7 +695,7 @@ "gpg2-0", "gpg2-1"; samsung,pin-function = <2>; samsung,pin-pud = <0>; - samsung,pin-drv = <0>; + samaung,pin-drv = <0>; }; cam_port_a: cam-port-a { @@ -704,7 +704,7 @@ "gph1-4", "gph1-5", "gph1-6", "gph1-7"; samsung,pin-function = <2>; samsung,pin-pud = <0>; - samsung,pin-drv = <0>; + samaung,pin-drv = <0>; }; }; @@ -756,7 +756,7 @@ "gpv1-4", "gpv1-5", "gpv1-6", "gpv1-7"; samsung,pin-function = <2>; samsung,pin-pud = <0>; - samsung,pin-drv = <0>; + samaung,pin-drv = <0>; }; c2c_txd: c2c-txd { @@ -766,7 +766,7 @@ "gpv3-4", "gpv3-5", "gpv3-6", "gpv3-7"; samsung,pin-function = <2>; samsung,pin-pud = <0>; - samsung,pin-drv = <0>; + samaung,pin-drv = <0>; }; }; diff --git a/arch/arm/boot/dts/exynos5250-smdk5250.dts b/arch/arm/boot/dts/exynos5250-smdk5250.dts index f86d567..2538b32 100644 --- a/arch/arm/boot/dts/exynos5250-smdk5250.dts +++ b/arch/arm/boot/dts/exynos5250-smdk5250.dts @@ -231,6 +231,14 @@ status = "okay"; }; + i2s1: i2s@12D60000 { + status = "disabled"; + }; + + i2s2: i2s@12D70000 { + status = "disabled"; + }; + sound { compatible = "samsung,smdk-wm8994"; diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi index 9db5047..bbac42a 100644 --- a/arch/arm/boot/dts/exynos5250.dtsi +++ b/arch/arm/boot/dts/exynos5250.dtsi @@ -422,7 +422,6 @@ i2s0: i2s@03830000 { compatible = "samsung,s5pv210-i2s"; - status = "disabled"; reg = <0x03830000 0x100>; dmas = <&pdma0 10 &pdma0 9 @@ -439,7 +438,6 @@ i2s1: i2s@12D60000 { compatible = "samsung,s3c6410-i2s"; - status = "disabled"; reg = <0x12D60000 0x100>; dmas = <&pdma1 12 &pdma1 11>; @@ -452,7 +450,6 @@ i2s2: i2s@12D70000 { compatible = "samsung,s3c6410-i2s"; - status = "disabled"; reg = <0x12D70000 0x100>; dmas = <&pdma0 12 &pdma0 11>; @@ -618,18 +615,16 @@ compatible = "samsung,exynos4212-hdmi"; reg = <0x14530000 0x70000>; interrupts = <0 95 0>; - clocks = <&clock 344>, <&clock 136>, <&clock 137>, - <&clock 159>, <&clock 1024>; + clocks = <&clock 333>, <&clock 136>, <&clock 137>, + <&clock 333>, <&clock 333>; clock-names = "hdmi", "sclk_hdmi", "sclk_pixel", - "sclk_hdmiphy", "mout_hdmi"; + "sclk_hdmiphy", "hdmiphy"; }; mixer { compatible = "samsung,exynos5250-mixer"; reg = <0x14450000 0x10000>; interrupts = <0 94 0>; - clocks = <&clock 343>, <&clock 136>; - clock-names = "mixer", "sclk_hdmi"; }; dp_phy: video-phy@10040720 { diff --git a/arch/arm/boot/dts/exynos5420-smdk5420.dts b/arch/arm/boot/dts/exynos5420-smdk5420.dts index 79524c7..bafba25 100644 --- a/arch/arm/boot/dts/exynos5420-smdk5420.dts +++ b/arch/arm/boot/dts/exynos5420-smdk5420.dts @@ -61,30 +61,4 @@ }; }; - pinctrl@13400000 { - hdmi_hpd_irq: hdmi-hpd-irq { - samsung,pins = "gpx3-7"; - samsung,pin-function = <0>; - samsung,pin-pud = <1>; - samsung,pin-drv = <0>; - }; - }; - - hdmi@14530000 { - status = "okay"; - hpd-gpio = <&gpx3 7 0>; - pinctrl-names = "default"; - pinctrl-0 = <&hdmi_hpd_irq>; - }; - - i2c_2: i2c@12C80000 { - samsung,i2c-sda-delay = <100>; - samsung,i2c-max-bus-freq = <66000>; - status = "okay"; - - hdmiddc@50 { - compatible = "samsung,exynos4210-hdmiddc"; - reg = <0x50>; - }; - }; }; diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi index 09aa06c..d537cd7 100644 --- a/arch/arm/boot/dts/exynos5420.dtsi +++ b/arch/arm/boot/dts/exynos5420.dtsi @@ -27,10 +27,6 @@ pinctrl2 = &pinctrl_2; pinctrl3 = &pinctrl_3; pinctrl4 = &pinctrl_4; - i2c0 = &i2c_0; - i2c1 = &i2c_1; - i2c2 = &i2c_2; - i2c3 = &i2c_3; }; cpus { @@ -239,75 +235,4 @@ io-channel-ranges; status = "disabled"; }; - - i2c_0: i2c@12C60000 { - compatible = "samsung,s3c2440-i2c"; - reg = <0x12C60000 0x100>; - interrupts = <0 56 0>; - #address-cells = <1>; - #size-cells = <0>; - clocks = <&clock 261>; - clock-names = "i2c"; - pinctrl-names = "default"; - pinctrl-0 = <&i2c0_bus>; - status = "disabled"; - }; - - i2c_1: i2c@12C70000 { - compatible = "samsung,s3c2440-i2c"; - reg = <0x12C70000 0x100>; - interrupts = <0 57 0>; - #address-cells = <1>; - #size-cells = <0>; - clocks = <&clock 262>; - clock-names = "i2c"; - pinctrl-names = "default"; - pinctrl-0 = <&i2c1_bus>; - status = "disabled"; - }; - - i2c_2: i2c@12C80000 { - compatible = "samsung,s3c2440-i2c"; - reg = <0x12C80000 0x100>; - interrupts = <0 58 0>; - #address-cells = <1>; - #size-cells = <0>; - clocks = <&clock 263>; - clock-names = "i2c"; - pinctrl-names = "default"; - pinctrl-0 = <&i2c2_bus>; - status = "disabled"; - }; - - i2c_3: i2c@12C90000 { - compatible = "samsung,s3c2440-i2c"; - reg = <0x12C90000 0x100>; - interrupts = <0 59 0>; - #address-cells = <1>; - #size-cells = <0>; - clocks = <&clock 264>; - clock-names = "i2c"; - pinctrl-names = "default"; - pinctrl-0 = <&i2c3_bus>; - status = "disabled"; - }; - - hdmi@14530000 { - compatible = "samsung,exynos4212-hdmi"; - reg = <0x14530000 0x70000>; - interrupts = <0 95 0>; - clocks = <&clock 413>, <&clock 143>, <&clock 768>, - <&clock 158>, <&clock 640>; - clock-names = "hdmi", "sclk_hdmi", "sclk_pixel", - "sclk_hdmiphy", "mout_hdmi"; - status = "disabled"; - }; - - mixer@14450000 { - compatible = "samsung,exynos5420-mixer"; - reg = <0x14450000 0x10000>; - interrupts = <0 94 0>; - clocks = <&clock 431>, <&clock 143>; - clock-names = "mixer", "sclk_hdmi"; - }; }; diff --git a/arch/arm/boot/dts/exynos5440-sd5v1.dts b/arch/arm/boot/dts/exynos5440-sd5v1.dts index 777fb1c..5b22508 100644 --- a/arch/arm/boot/dts/exynos5440-sd5v1.dts +++ b/arch/arm/boot/dts/exynos5440-sd5v1.dts @@ -17,7 +17,7 @@ compatible = "samsung,sd5v1", "samsung,exynos5440"; chosen { - bootargs = "root=/dev/sda2 rw rootwait ignore_loglevel earlyprintk no_console_suspend mem=2048M@0x80000000 mem=6144M@0x100000000 console=ttySAC0,115200"; + bootargs = "root=/dev/sda2 rw rootwait ignore_loglevel early_printk no_console_suspend mem=2048M@0x80000000 mem=6144M@0x100000000 console=ttySAC0,115200"; }; fixed-rate-clocks { diff --git a/arch/arm/boot/dts/exynos5440-ssdk5440.dts b/arch/arm/boot/dts/exynos5440-ssdk5440.dts index d58cb78..ede7727 100644 --- a/arch/arm/boot/dts/exynos5440-ssdk5440.dts +++ b/arch/arm/boot/dts/exynos5440-ssdk5440.dts @@ -17,7 +17,7 @@ compatible = "samsung,ssdk5440", "samsung,exynos5440"; chosen { - bootargs = "root=/dev/sda2 rw rootwait ignore_loglevel earlyprintk no_console_suspend mem=2048M@0x80000000 mem=6144M@0x100000000 console=ttySAC0,115200"; + bootargs = "root=/dev/sda2 rw rootwait ignore_loglevel early_printk no_console_suspend mem=2048M@0x80000000 mem=6144M@0x100000000 console=ttySAC0,115200"; }; spi_0: spi@D0000 { @@ -68,11 +68,9 @@ pcie@290000 { reset-gpio = <&pin_ctrl 5 0>; - status = "okay"; }; pcie@2a0000 { reset-gpio = <&pin_ctrl 22 0>; - status = "okay"; }; }; diff --git a/arch/arm/boot/dts/exynos5440.dtsi b/arch/arm/boot/dts/exynos5440.dtsi index 8da1070..5d6cf49 100644 --- a/arch/arm/boot/dts/exynos5440.dtsi +++ b/arch/arm/boot/dts/exynos5440.dtsi @@ -276,7 +276,6 @@ interrupt-map-mask = <0 0 0 0>; interrupt-map = <0x0 0 &gic 53>; num-lanes = <4>; - status = "disabled"; }; pcie@2a0000 { @@ -297,6 +296,5 @@ interrupt-map-mask = <0 0 0 0>; interrupt-map = <0x0 0 &gic 56>; num-lanes = <4>; - status = "disabled"; }; }; diff --git a/arch/arm/boot/dts/highbank.dts b/arch/arm/boot/dts/highbank.dts index ed14aea..6aad34a 100644 --- a/arch/arm/boot/dts/highbank.dts +++ b/arch/arm/boot/dts/highbank.dts @@ -86,12 +86,6 @@ soc { ranges = <0x00000000 0x00000000 0xffffffff>; - memory-controller@fff00000 { - compatible = "calxeda,hb-ddr-ctrl"; - reg = <0xfff00000 0x1000>; - interrupts = <0 91 4>; - }; - timer@fff10600 { compatible = "arm,cortex-a9-twd-timer"; reg = <0xfff10600 0x20>; diff --git a/arch/arm/boot/dts/imx23-evk.dts b/arch/arm/boot/dts/imx23-evk.dts index 1f026ad..185c7c0 100644 --- a/arch/arm/boot/dts/imx23-evk.dts +++ b/arch/arm/boot/dts/imx23-evk.dts @@ -10,7 +10,7 @@ */ /dts-v1/; -#include "imx23.dtsi" +/include/ "imx23.dtsi" / { model = "Freescale i.MX23 Evaluation Kit"; @@ -45,14 +45,14 @@ hog_pins_a: hog@0 { reg = <0>; fsl,pinmux-ids = < - MX23_PAD_LCD_RESET__GPIO_1_18 - MX23_PAD_PWM3__GPIO_1_29 - MX23_PAD_PWM4__GPIO_1_30 - MX23_PAD_SSP1_DETECT__SSP1_DETECT + 0x1123 /* MX23_PAD_LCD_RESET__GPIO_1_18 */ + 0x11d3 /* MX23_PAD_PWM3__GPIO_1_29 */ + 0x11e3 /* MX23_PAD_PWM4__GPIO_1_30 */ + 0x2010 /* MX23_PAD_SSP1_DETECT__SSP1_DETECT */ >; - fsl,drive-strength = <MXS_DRIVE_4mA>; - fsl,voltage = <MXS_VOLTAGE_HIGH>; - fsl,pull-up = <MXS_PULL_DISABLE>; + fsl,drive-strength = <0>; + fsl,voltage = <1>; + fsl,pull-up = <0>; }; }; diff --git a/arch/arm/boot/dts/imx23-olinuxino.dts b/arch/arm/boot/dts/imx23-olinuxino.dts index 526bfdb..fc766ae 100644 --- a/arch/arm/boot/dts/imx23-olinuxino.dts +++ b/arch/arm/boot/dts/imx23-olinuxino.dts @@ -12,7 +12,7 @@ */ /dts-v1/; -#include "imx23.dtsi" +/include/ "imx23.dtsi" / { model = "i.MX23 Olinuxino Low Cost Board"; @@ -40,21 +40,21 @@ hog_pins_a: hog@0 { reg = <0>; fsl,pinmux-ids = < - MX23_PAD_GPMI_ALE__GPIO_0_17 + 0x0113 /* MX23_PAD_GPMI_ALE__GPIO_0_17 */ >; - fsl,drive-strength = <MXS_DRIVE_4mA>; - fsl,voltage = <MXS_VOLTAGE_HIGH>; - fsl,pull-up = <MXS_PULL_DISABLE>; + fsl,drive-strength = <0>; + fsl,voltage = <1>; + fsl,pull-up = <0>; }; led_pin_gpio2_1: led_gpio2_1@0 { reg = <0>; fsl,pinmux-ids = < - MX23_PAD_SSP1_DETECT__GPIO_2_1 + 0x2013 /* MX23_PAD_SSP1_DETECT__GPIO_2_1 */ >; - fsl,drive-strength = <MXS_DRIVE_4mA>; - fsl,voltage = <MXS_VOLTAGE_HIGH>; - fsl,pull-up = <MXS_PULL_DISABLE>; + fsl,drive-strength = <0>; + fsl,voltage = <1>; + fsl,pull-up = <0>; }; }; diff --git a/arch/arm/boot/dts/imx23-pinfunc.h b/arch/arm/boot/dts/imx23-pinfunc.h deleted file mode 100644 index 5c0f32ca..0000000 --- a/arch/arm/boot/dts/imx23-pinfunc.h +++ /dev/null @@ -1,333 +0,0 @@ -/* - * Header providing constants for i.MX23 pinctrl bindings. - * - * Copyright (C) 2013 Lothar Waßmann <LW@KARO-electronics.de> - * - * The code contained herein is licensed under the GNU General Public - * License. You may obtain a copy of the GNU General Public License - * Version 2 at the following locations: - * - * http://www.opensource.org/licenses/gpl-license.html - * http://www.gnu.org/copyleft/gpl.html - */ - -#ifndef __DT_BINDINGS_MX23_PINCTRL_H__ -#define __DT_BINDINGS_MX23_PINCTRL_H__ - -#include "mxs-pinfunc.h" - -#define MX23_PAD_GPMI_D00__GPMI_D00 0x0000 -#define MX23_PAD_GPMI_D01__GPMI_D01 0x0010 -#define MX23_PAD_GPMI_D02__GPMI_D02 0x0020 -#define MX23_PAD_GPMI_D03__GPMI_D03 0x0030 -#define MX23_PAD_GPMI_D04__GPMI_D04 0x0040 -#define MX23_PAD_GPMI_D05__GPMI_D05 0x0050 -#define MX23_PAD_GPMI_D06__GPMI_D06 0x0060 -#define MX23_PAD_GPMI_D07__GPMI_D07 0x0070 -#define MX23_PAD_GPMI_D08__GPMI_D08 0x0080 -#define MX23_PAD_GPMI_D09__GPMI_D09 0x0090 -#define MX23_PAD_GPMI_D10__GPMI_D10 0x00a0 -#define MX23_PAD_GPMI_D11__GPMI_D11 0x00b0 -#define MX23_PAD_GPMI_D12__GPMI_D12 0x00c0 -#define MX23_PAD_GPMI_D13__GPMI_D13 0x00d0 -#define MX23_PAD_GPMI_D14__GPMI_D14 0x00e0 -#define MX23_PAD_GPMI_D15__GPMI_D15 0x00f0 -#define MX23_PAD_GPMI_CLE__GPMI_CLE 0x0100 -#define MX23_PAD_GPMI_ALE__GPMI_ALE 0x0110 -#define MX23_PAD_GPMI_CE2N__GPMI_CE2N 0x0120 -#define MX23_PAD_GPMI_RDY0__GPMI_RDY0 0x0130 -#define MX23_PAD_GPMI_RDY1__GPMI_RDY1 0x0140 -#define MX23_PAD_GPMI_RDY2__GPMI_RDY2 0x0150 -#define MX23_PAD_GPMI_RDY3__GPMI_RDY3 0x0160 -#define MX23_PAD_GPMI_WPN__GPMI_WPN 0x0170 -#define MX23_PAD_GPMI_WRN__GPMI_WRN 0x0180 -#define MX23_PAD_GPMI_RDN__GPMI_RDN 0x0190 -#define MX23_PAD_AUART1_CTS__AUART1_CTS 0x01a0 -#define MX23_PAD_AUART1_RTS__AUART1_RTS 0x01b0 -#define MX23_PAD_AUART1_RX__AUART1_RX 0x01c0 -#define MX23_PAD_AUART1_TX__AUART1_TX 0x01d0 -#define MX23_PAD_I2C_SCL__I2C_SCL 0x01e0 -#define MX23_PAD_I2C_SDA__I2C_SDA 0x01f0 -#define MX23_PAD_LCD_D00__LCD_D00 0x1000 -#define MX23_PAD_LCD_D01__LCD_D01 0x1010 -#define MX23_PAD_LCD_D02__LCD_D02 0x1020 -#define MX23_PAD_LCD_D03__LCD_D03 0x1030 -#define MX23_PAD_LCD_D04__LCD_D04 0x1040 -#define MX23_PAD_LCD_D05__LCD_D05 0x1050 -#define MX23_PAD_LCD_D06__LCD_D06 0x1060 -#define MX23_PAD_LCD_D07__LCD_D07 0x1070 -#define MX23_PAD_LCD_D08__LCD_D08 0x1080 -#define MX23_PAD_LCD_D09__LCD_D09 0x1090 -#define MX23_PAD_LCD_D10__LCD_D10 0x10a0 -#define MX23_PAD_LCD_D11__LCD_D11 0x10b0 -#define MX23_PAD_LCD_D12__LCD_D12 0x10c0 -#define MX23_PAD_LCD_D13__LCD_D13 0x10d0 -#define MX23_PAD_LCD_D14__LCD_D14 0x10e0 -#define MX23_PAD_LCD_D15__LCD_D15 0x10f0 -#define MX23_PAD_LCD_D16__LCD_D16 0x1100 -#define MX23_PAD_LCD_D17__LCD_D17 0x1110 -#define MX23_PAD_LCD_RESET__LCD_RESET 0x1120 -#define MX23_PAD_LCD_RS__LCD_RS 0x1130 -#define MX23_PAD_LCD_WR__LCD_WR 0x1140 -#define MX23_PAD_LCD_CS__LCD_CS 0x1150 -#define MX23_PAD_LCD_DOTCK__LCD_DOTCK 0x1160 -#define MX23_PAD_LCD_ENABLE__LCD_ENABLE 0x1170 -#define MX23_PAD_LCD_HSYNC__LCD_HSYNC 0x1180 -#define MX23_PAD_LCD_VSYNC__LCD_VSYNC 0x1190 -#define MX23_PAD_PWM0__PWM0 0x11a0 -#define MX23_PAD_PWM1__PWM1 0x11b0 -#define MX23_PAD_PWM2__PWM2 0x11c0 -#define MX23_PAD_PWM3__PWM3 0x11d0 -#define MX23_PAD_PWM4__PWM4 0x11e0 -#define MX23_PAD_SSP1_CMD__SSP1_CMD 0x2000 -#define MX23_PAD_SSP1_DETECT__SSP1_DETECT 0x2010 -#define MX23_PAD_SSP1_DATA0__SSP1_DATA0 0x2020 -#define MX23_PAD_SSP1_DATA1__SSP1_DATA1 0x2030 -#define MX23_PAD_SSP1_DATA2__SSP1_DATA2 0x2040 -#define MX23_PAD_SSP1_DATA3__SSP1_DATA3 0x2050 -#define MX23_PAD_SSP1_SCK__SSP1_SCK 0x2060 -#define MX23_PAD_ROTARYA__ROTARYA 0x2070 -#define MX23_PAD_ROTARYB__ROTARYB 0x2080 -#define MX23_PAD_EMI_A00__EMI_A00 0x2090 -#define MX23_PAD_EMI_A01__EMI_A01 0x20a0 -#define MX23_PAD_EMI_A02__EMI_A02 0x20b0 -#define MX23_PAD_EMI_A03__EMI_A03 0x20c0 -#define MX23_PAD_EMI_A04__EMI_A04 0x20d0 -#define MX23_PAD_EMI_A05__EMI_A05 0x20e0 -#define MX23_PAD_EMI_A06__EMI_A06 0x20f0 -#define MX23_PAD_EMI_A07__EMI_A07 0x2100 -#define MX23_PAD_EMI_A08__EMI_A08 0x2110 -#define MX23_PAD_EMI_A09__EMI_A09 0x2120 -#define MX23_PAD_EMI_A10__EMI_A10 0x2130 -#define MX23_PAD_EMI_A11__EMI_A11 0x2140 -#define MX23_PAD_EMI_A12__EMI_A12 0x2150 -#define MX23_PAD_EMI_BA0__EMI_BA0 0x2160 -#define MX23_PAD_EMI_BA1__EMI_BA1 0x2170 -#define MX23_PAD_EMI_CASN__EMI_CASN 0x2180 -#define MX23_PAD_EMI_CE0N__EMI_CE0N 0x2190 -#define MX23_PAD_EMI_CE1N__EMI_CE1N 0x21a0 -#define MX23_PAD_GPMI_CE1N__GPMI_CE1N 0x21b0 -#define MX23_PAD_GPMI_CE0N__GPMI_CE0N 0x21c0 -#define MX23_PAD_EMI_CKE__EMI_CKE 0x21d0 -#define MX23_PAD_EMI_RASN__EMI_RASN 0x21e0 -#define MX23_PAD_EMI_WEN__EMI_WEN 0x21f0 -#define MX23_PAD_EMI_D00__EMI_D00 0x3000 -#define MX23_PAD_EMI_D01__EMI_D01 0x3010 -#define MX23_PAD_EMI_D02__EMI_D02 0x3020 -#define MX23_PAD_EMI_D03__EMI_D03 0x3030 -#define MX23_PAD_EMI_D04__EMI_D04 0x3040 -#define MX23_PAD_EMI_D05__EMI_D05 0x3050 -#define MX23_PAD_EMI_D06__EMI_D06 0x3060 -#define MX23_PAD_EMI_D07__EMI_D07 0x3070 -#define MX23_PAD_EMI_D08__EMI_D08 0x3080 -#define MX23_PAD_EMI_D09__EMI_D09 0x3090 -#define MX23_PAD_EMI_D10__EMI_D10 0x30a0 -#define MX23_PAD_EMI_D11__EMI_D11 0x30b0 -#define MX23_PAD_EMI_D12__EMI_D12 0x30c0 -#define MX23_PAD_EMI_D13__EMI_D13 0x30d0 -#define MX23_PAD_EMI_D14__EMI_D14 0x30e0 -#define MX23_PAD_EMI_D15__EMI_D15 0x30f0 -#define MX23_PAD_EMI_DQM0__EMI_DQM0 0x3100 -#define MX23_PAD_EMI_DQM1__EMI_DQM1 0x3110 -#define MX23_PAD_EMI_DQS0__EMI_DQS0 0x3120 -#define MX23_PAD_EMI_DQS1__EMI_DQS1 0x3130 -#define MX23_PAD_EMI_CLK__EMI_CLK 0x3140 -#define MX23_PAD_EMI_CLKN__EMI_CLKN 0x3150 -#define MX23_PAD_GPMI_D00__LCD_D8 0x0001 -#define MX23_PAD_GPMI_D01__LCD_D9 0x0011 -#define MX23_PAD_GPMI_D02__LCD_D10 0x0021 -#define MX23_PAD_GPMI_D03__LCD_D11 0x0031 -#define MX23_PAD_GPMI_D04__LCD_D12 0x0041 -#define MX23_PAD_GPMI_D05__LCD_D13 0x0051 -#define MX23_PAD_GPMI_D06__LCD_D14 0x0061 -#define MX23_PAD_GPMI_D07__LCD_D15 0x0071 -#define MX23_PAD_GPMI_D08__LCD_D18 0x0081 -#define MX23_PAD_GPMI_D09__LCD_D19 0x0091 -#define MX23_PAD_GPMI_D10__LCD_D20 0x00a1 -#define MX23_PAD_GPMI_D11__LCD_D21 0x00b1 -#define MX23_PAD_GPMI_D12__LCD_D22 0x00c1 -#define MX23_PAD_GPMI_D13__LCD_D23 0x00d1 -#define MX23_PAD_GPMI_D14__AUART2_RX 0x00e1 -#define MX23_PAD_GPMI_D15__AUART2_TX 0x00f1 -#define MX23_PAD_GPMI_CLE__LCD_D16 0x0101 -#define MX23_PAD_GPMI_ALE__LCD_D17 0x0111 -#define MX23_PAD_GPMI_CE2N__ATA_A2 0x0121 -#define MX23_PAD_AUART1_RTS__IR_CLK 0x01b1 -#define MX23_PAD_AUART1_RX__IR_RX 0x01c1 -#define MX23_PAD_AUART1_TX__IR_TX 0x01d1 -#define MX23_PAD_I2C_SCL__GPMI_RDY2 0x01e1 -#define MX23_PAD_I2C_SDA__GPMI_CE2N 0x01f1 -#define MX23_PAD_LCD_D00__ETM_DA8 0x1001 -#define MX23_PAD_LCD_D01__ETM_DA9 0x1011 -#define MX23_PAD_LCD_D02__ETM_DA10 0x1021 -#define MX23_PAD_LCD_D03__ETM_DA11 0x1031 -#define MX23_PAD_LCD_D04__ETM_DA12 0x1041 -#define MX23_PAD_LCD_D05__ETM_DA13 0x1051 -#define MX23_PAD_LCD_D06__ETM_DA14 0x1061 -#define MX23_PAD_LCD_D07__ETM_DA15 0x1071 -#define MX23_PAD_LCD_D08__ETM_DA0 0x1081 -#define MX23_PAD_LCD_D09__ETM_DA1 0x1091 -#define MX23_PAD_LCD_D10__ETM_DA2 0x10a1 -#define MX23_PAD_LCD_D11__ETM_DA3 0x10b1 -#define MX23_PAD_LCD_D12__ETM_DA4 0x10c1 -#define MX23_PAD_LCD_D13__ETM_DA5 0x10d1 -#define MX23_PAD_LCD_D14__ETM_DA6 0x10e1 -#define MX23_PAD_LCD_D15__ETM_DA7 0x10f1 -#define MX23_PAD_LCD_RESET__ETM_TCTL 0x1121 -#define MX23_PAD_LCD_RS__ETM_TCLK 0x1131 -#define MX23_PAD_LCD_DOTCK__GPMI_RDY3 0x1161 -#define MX23_PAD_LCD_ENABLE__I2C_SCL 0x1171 -#define MX23_PAD_LCD_HSYNC__I2C_SDA 0x1181 -#define MX23_PAD_LCD_VSYNC__LCD_BUSY 0x1191 -#define MX23_PAD_PWM0__ROTARYA 0x11a1 -#define MX23_PAD_PWM1__ROTARYB 0x11b1 -#define MX23_PAD_PWM2__GPMI_RDY3 0x11c1 -#define MX23_PAD_PWM3__ETM_TCTL 0x11d1 -#define MX23_PAD_PWM4__ETM_TCLK 0x11e1 -#define MX23_PAD_SSP1_DETECT__GPMI_CE3N 0x2011 -#define MX23_PAD_SSP1_DATA1__I2C_SCL 0x2031 -#define MX23_PAD_SSP1_DATA2__I2C_SDA 0x2041 -#define MX23_PAD_ROTARYA__AUART2_RTS 0x2071 -#define MX23_PAD_ROTARYB__AUART2_CTS 0x2081 -#define MX23_PAD_GPMI_D00__SSP2_DATA0 0x0002 -#define MX23_PAD_GPMI_D01__SSP2_DATA1 0x0012 -#define MX23_PAD_GPMI_D02__SSP2_DATA2 0x0022 -#define MX23_PAD_GPMI_D03__SSP2_DATA3 0x0032 -#define MX23_PAD_GPMI_D04__SSP2_DATA4 0x0042 -#define MX23_PAD_GPMI_D05__SSP2_DATA5 0x0052 -#define MX23_PAD_GPMI_D06__SSP2_DATA6 0x0062 -#define MX23_PAD_GPMI_D07__SSP2_DATA7 0x0072 -#define MX23_PAD_GPMI_D08__SSP1_DATA4 0x0082 -#define MX23_PAD_GPMI_D09__SSP1_DATA5 0x0092 -#define MX23_PAD_GPMI_D10__SSP1_DATA6 0x00a2 -#define MX23_PAD_GPMI_D11__SSP1_DATA7 0x00b2 -#define MX23_PAD_GPMI_D15__GPMI_CE3N 0x00f2 -#define MX23_PAD_GPMI_RDY0__SSP2_DETECT 0x0132 -#define MX23_PAD_GPMI_RDY1__SSP2_CMD 0x0142 -#define MX23_PAD_GPMI_WRN__SSP2_SCK 0x0182 -#define MX23_PAD_AUART1_CTS__SSP1_DATA4 0x01a2 -#define MX23_PAD_AUART1_RTS__SSP1_DATA5 0x01b2 -#define MX23_PAD_AUART1_RX__SSP1_DATA6 0x01c2 -#define MX23_PAD_AUART1_TX__SSP1_DATA7 0x01d2 -#define MX23_PAD_I2C_SCL__AUART1_TX 0x01e2 -#define MX23_PAD_I2C_SDA__AUART1_RX 0x01f2 -#define MX23_PAD_LCD_D08__SAIF2_SDATA0 0x1082 -#define MX23_PAD_LCD_D09__SAIF1_SDATA0 0x1092 -#define MX23_PAD_LCD_D10__SAIF_MCLK_BITCLK 0x10a2 -#define MX23_PAD_LCD_D11__SAIF_LRCLK 0x10b2 -#define MX23_PAD_LCD_D12__SAIF2_SDATA1 0x10c2 -#define MX23_PAD_LCD_D13__SAIF2_SDATA2 0x10d2 -#define MX23_PAD_LCD_D14__SAIF1_SDATA2 0x10e2 -#define MX23_PAD_LCD_D15__SAIF1_SDATA1 0x10f2 -#define MX23_PAD_LCD_D16__SAIF_ALT_BITCLK 0x1102 -#define MX23_PAD_LCD_RESET__GPMI_CE3N 0x1122 -#define MX23_PAD_PWM0__DUART_RX 0x11a2 -#define MX23_PAD_PWM1__DUART_TX 0x11b2 -#define MX23_PAD_PWM3__AUART1_CTS 0x11d2 -#define MX23_PAD_PWM4__AUART1_RTS 0x11e2 -#define MX23_PAD_SSP1_CMD__JTAG_TDO 0x2002 -#define MX23_PAD_SSP1_DETECT__USB_OTG_ID 0x2012 -#define MX23_PAD_SSP1_DATA0__JTAG_TDI 0x2022 -#define MX23_PAD_SSP1_DATA1__JTAG_TCLK 0x2032 -#define MX23_PAD_SSP1_DATA2__JTAG_RTCK 0x2042 -#define MX23_PAD_SSP1_DATA3__JTAG_TMS 0x2052 -#define MX23_PAD_SSP1_SCK__JTAG_TRST 0x2062 -#define MX23_PAD_ROTARYA__SPDIF 0x2072 -#define MX23_PAD_ROTARYB__GPMI_CE3N 0x2082 -#define MX23_PAD_GPMI_D00__GPIO_0_0 0x0003 -#define MX23_PAD_GPMI_D01__GPIO_0_1 0x0013 -#define MX23_PAD_GPMI_D02__GPIO_0_2 0x0023 -#define MX23_PAD_GPMI_D03__GPIO_0_3 0x0033 -#define MX23_PAD_GPMI_D04__GPIO_0_4 0x0043 -#define MX23_PAD_GPMI_D05__GPIO_0_5 0x0053 -#define MX23_PAD_GPMI_D06__GPIO_0_6 0x0063 -#define MX23_PAD_GPMI_D07__GPIO_0_7 0x0073 -#define MX23_PAD_GPMI_D08__GPIO_0_8 0x0083 -#define MX23_PAD_GPMI_D09__GPIO_0_9 0x0093 -#define MX23_PAD_GPMI_D10__GPIO_0_10 0x00a3 -#define MX23_PAD_GPMI_D11__GPIO_0_11 0x00b3 -#define MX23_PAD_GPMI_D12__GPIO_0_12 0x00c3 -#define MX23_PAD_GPMI_D13__GPIO_0_13 0x00d3 -#define MX23_PAD_GPMI_D14__GPIO_0_14 0x00e3 -#define MX23_PAD_GPMI_D15__GPIO_0_15 0x00f3 -#define MX23_PAD_GPMI_CLE__GPIO_0_16 0x0103 -#define MX23_PAD_GPMI_ALE__GPIO_0_17 0x0113 -#define MX23_PAD_GPMI_CE2N__GPIO_0_18 0x0123 -#define MX23_PAD_GPMI_RDY0__GPIO_0_19 0x0133 -#define MX23_PAD_GPMI_RDY1__GPIO_0_20 0x0143 -#define MX23_PAD_GPMI_RDY2__GPIO_0_21 0x0153 -#define MX23_PAD_GPMI_RDY3__GPIO_0_22 0x0163 -#define MX23_PAD_GPMI_WPN__GPIO_0_23 0x0173 -#define MX23_PAD_GPMI_WRN__GPIO_0_24 0x0183 -#define MX23_PAD_GPMI_RDN__GPIO_0_25 0x0193 -#define MX23_PAD_AUART1_CTS__GPIO_0_26 0x01a3 -#define MX23_PAD_AUART1_RTS__GPIO_0_27 0x01b3 -#define MX23_PAD_AUART1_RX__GPIO_0_28 0x01c3 -#define MX23_PAD_AUART1_TX__GPIO_0_29 0x01d3 -#define MX23_PAD_I2C_SCL__GPIO_0_30 0x01e3 -#define MX23_PAD_I2C_SDA__GPIO_0_31 0x01f3 -#define MX23_PAD_LCD_D00__GPIO_1_0 0x1003 -#define MX23_PAD_LCD_D01__GPIO_1_1 0x1013 -#define MX23_PAD_LCD_D02__GPIO_1_2 0x1023 -#define MX23_PAD_LCD_D03__GPIO_1_3 0x1033 -#define MX23_PAD_LCD_D04__GPIO_1_4 0x1043 -#define MX23_PAD_LCD_D05__GPIO_1_5 0x1053 -#define MX23_PAD_LCD_D06__GPIO_1_6 0x1063 -#define MX23_PAD_LCD_D07__GPIO_1_7 0x1073 -#define MX23_PAD_LCD_D08__GPIO_1_8 0x1083 -#define MX23_PAD_LCD_D09__GPIO_1_9 0x1093 -#define MX23_PAD_LCD_D10__GPIO_1_10 0x10a3 -#define MX23_PAD_LCD_D11__GPIO_1_11 0x10b3 -#define MX23_PAD_LCD_D12__GPIO_1_12 0x10c3 -#define MX23_PAD_LCD_D13__GPIO_1_13 0x10d3 -#define MX23_PAD_LCD_D14__GPIO_1_14 0x10e3 -#define MX23_PAD_LCD_D15__GPIO_1_15 0x10f3 -#define MX23_PAD_LCD_D16__GPIO_1_16 0x1103 -#define MX23_PAD_LCD_D17__GPIO_1_17 0x1113 -#define MX23_PAD_LCD_RESET__GPIO_1_18 0x1123 -#define MX23_PAD_LCD_RS__GPIO_1_19 0x1133 -#define MX23_PAD_LCD_WR__GPIO_1_20 0x1143 -#define MX23_PAD_LCD_CS__GPIO_1_21 0x1153 -#define MX23_PAD_LCD_DOTCK__GPIO_1_22 0x1163 -#define MX23_PAD_LCD_ENABLE__GPIO_1_23 0x1173 -#define MX23_PAD_LCD_HSYNC__GPIO_1_24 0x1183 -#define MX23_PAD_LCD_VSYNC__GPIO_1_25 0x1193 -#define MX23_PAD_PWM0__GPIO_1_26 0x11a3 -#define MX23_PAD_PWM1__GPIO_1_27 0x11b3 -#define MX23_PAD_PWM2__GPIO_1_28 0x11c3 -#define MX23_PAD_PWM3__GPIO_1_29 0x11d3 -#define MX23_PAD_PWM4__GPIO_1_30 0x11e3 -#define MX23_PAD_SSP1_CMD__GPIO_2_0 0x2003 -#define MX23_PAD_SSP1_DETECT__GPIO_2_1 0x2013 -#define MX23_PAD_SSP1_DATA0__GPIO_2_2 0x2023 -#define MX23_PAD_SSP1_DATA1__GPIO_2_3 0x2033 -#define MX23_PAD_SSP1_DATA2__GPIO_2_4 0x2043 -#define MX23_PAD_SSP1_DATA3__GPIO_2_5 0x2053 -#define MX23_PAD_SSP1_SCK__GPIO_2_6 0x2063 -#define MX23_PAD_ROTARYA__GPIO_2_7 0x2073 -#define MX23_PAD_ROTARYB__GPIO_2_8 0x2083 -#define MX23_PAD_EMI_A00__GPIO_2_9 0x2093 -#define MX23_PAD_EMI_A01__GPIO_2_10 0x20a3 -#define MX23_PAD_EMI_A02__GPIO_2_11 0x20b3 -#define MX23_PAD_EMI_A03__GPIO_2_12 0x20c3 -#define MX23_PAD_EMI_A04__GPIO_2_13 0x20d3 -#define MX23_PAD_EMI_A05__GPIO_2_14 0x20e3 -#define MX23_PAD_EMI_A06__GPIO_2_15 0x20f3 -#define MX23_PAD_EMI_A07__GPIO_2_16 0x2103 -#define MX23_PAD_EMI_A08__GPIO_2_17 0x2113 -#define MX23_PAD_EMI_A09__GPIO_2_18 0x2123 -#define MX23_PAD_EMI_A10__GPIO_2_19 0x2133 -#define MX23_PAD_EMI_A11__GPIO_2_20 0x2143 -#define MX23_PAD_EMI_A12__GPIO_2_21 0x2153 -#define MX23_PAD_EMI_BA0__GPIO_2_22 0x2163 -#define MX23_PAD_EMI_BA1__GPIO_2_23 0x2173 -#define MX23_PAD_EMI_CASN__GPIO_2_24 0x2183 -#define MX23_PAD_EMI_CE0N__GPIO_2_25 0x2193 -#define MX23_PAD_EMI_CE1N__GPIO_2_26 0x21a3 -#define MX23_PAD_GPMI_CE1N__GPIO_2_27 0x21b3 -#define MX23_PAD_GPMI_CE0N__GPIO_2_28 0x21c3 -#define MX23_PAD_EMI_CKE__GPIO_2_29 0x21d3 -#define MX23_PAD_EMI_RASN__GPIO_2_30 0x21e3 -#define MX23_PAD_EMI_WEN__GPIO_2_31 0x21f3 - -#endif /* __DT_BINDINGS_MX23_PINCTRL_H__ */ diff --git a/arch/arm/boot/dts/imx23-stmp378x_devb.dts b/arch/arm/boot/dts/imx23-stmp378x_devb.dts index cb64e2b..85c3864 100644 --- a/arch/arm/boot/dts/imx23-stmp378x_devb.dts +++ b/arch/arm/boot/dts/imx23-stmp378x_devb.dts @@ -10,7 +10,7 @@ */ /dts-v1/; -#include "imx23.dtsi" +/include/ "imx23.dtsi" / { model = "Freescale STMP378x Development Board"; @@ -39,12 +39,12 @@ hog_pins_a: hog@0 { reg = <0>; fsl,pinmux-ids = < - MX23_PAD_PWM3__GPIO_1_29 - MX23_PAD_PWM4__GPIO_1_30 + 0x11d3 /* MX23_PAD_PWM3__GPIO_1_29 */ + 0x11e3 /* MX23_PAD_PWM4__GPIO_1_30 */ >; - fsl,drive-strength = <MXS_DRIVE_4mA>; - fsl,voltage = <MXS_VOLTAGE_HIGH>; - fsl,pull-up = <MXS_PULL_DISABLE>; + fsl,drive-strength = <0>; + fsl,voltage = <1>; + fsl,pull-up = <0>; }; }; }; diff --git a/arch/arm/boot/dts/imx23.dtsi b/arch/arm/boot/dts/imx23.dtsi index c96ceae..28b5ce2 100644 --- a/arch/arm/boot/dts/imx23.dtsi +++ b/arch/arm/boot/dts/imx23.dtsi @@ -9,8 +9,7 @@ * http://www.gnu.org/copyleft/gpl.html */ -#include "skeleton.dtsi" -#include "imx23-pinfunc.h" +/include/ "skeleton.dtsi" / { interrupt-parent = <&icoll>; @@ -138,174 +137,174 @@ duart_pins_a: duart@0 { reg = <0>; fsl,pinmux-ids = < - MX23_PAD_PWM0__DUART_RX - MX23_PAD_PWM1__DUART_TX + 0x11a2 /* MX23_PAD_PWM0__DUART_RX */ + 0x11b2 /* MX23_PAD_PWM1__DUART_TX */ >; - fsl,drive-strength = <MXS_DRIVE_4mA>; - fsl,voltage = <MXS_VOLTAGE_HIGH>; - fsl,pull-up = <MXS_PULL_DISABLE>; + fsl,drive-strength = <0>; + fsl,voltage = <1>; + fsl,pull-up = <0>; }; auart0_pins_a: auart0@0 { reg = <0>; fsl,pinmux-ids = < - MX23_PAD_AUART1_RX__AUART1_RX - MX23_PAD_AUART1_TX__AUART1_TX - MX23_PAD_AUART1_CTS__AUART1_CTS - MX23_PAD_AUART1_RTS__AUART1_RTS + 0x01c0 /* MX23_PAD_AUART1_RX__AUART1_RX */ + 0x01d0 /* MX23_PAD_AUART1_TX__AUART1_TX */ + 0x01a0 /* MX23_PAD_AUART1_CTS__AUART1_CTS */ + 0x01b0 /* MX23_PAD_AUART1_RTS__AUART1_RTS */ >; - fsl,drive-strength = <MXS_DRIVE_4mA>; - fsl,voltage = <MXS_VOLTAGE_HIGH>; - fsl,pull-up = <MXS_PULL_DISABLE>; + fsl,drive-strength = <0>; + fsl,voltage = <1>; + fsl,pull-up = <0>; }; auart0_2pins_a: auart0-2pins@0 { reg = <0>; fsl,pinmux-ids = < - MX23_PAD_I2C_SCL__AUART1_TX - MX23_PAD_I2C_SDA__AUART1_RX + 0x01e2 /* MX23_PAD_I2C_SCL__AUART1_TX */ + 0x01f2 /* MX23_PAD_I2C_SDA__AUART1_RX */ >; - fsl,drive-strength = <MXS_DRIVE_4mA>; - fsl,voltage = <MXS_VOLTAGE_HIGH>; - fsl,pull-up = <MXS_PULL_DISABLE>; + fsl,drive-strength = <0>; + fsl,voltage = <1>; + fsl,pull-up = <0>; }; gpmi_pins_a: gpmi-nand@0 { reg = <0>; fsl,pinmux-ids = < - MX23_PAD_GPMI_D00__GPMI_D00 - MX23_PAD_GPMI_D01__GPMI_D01 - MX23_PAD_GPMI_D02__GPMI_D02 - MX23_PAD_GPMI_D03__GPMI_D03 - MX23_PAD_GPMI_D04__GPMI_D04 - MX23_PAD_GPMI_D05__GPMI_D05 - MX23_PAD_GPMI_D06__GPMI_D06 - MX23_PAD_GPMI_D07__GPMI_D07 - MX23_PAD_GPMI_CLE__GPMI_CLE - MX23_PAD_GPMI_ALE__GPMI_ALE - MX23_PAD_GPMI_RDY0__GPMI_RDY0 - MX23_PAD_GPMI_RDY1__GPMI_RDY1 - MX23_PAD_GPMI_WPN__GPMI_WPN - MX23_PAD_GPMI_WRN__GPMI_WRN - MX23_PAD_GPMI_RDN__GPMI_RDN - MX23_PAD_GPMI_CE1N__GPMI_CE1N - MX23_PAD_GPMI_CE0N__GPMI_CE0N + 0x0000 /* MX23_PAD_GPMI_D00__GPMI_D00 */ + 0x0010 /* MX23_PAD_GPMI_D01__GPMI_D01 */ + 0x0020 /* MX23_PAD_GPMI_D02__GPMI_D02 */ + 0x0030 /* MX23_PAD_GPMI_D03__GPMI_D03 */ + 0x0040 /* MX23_PAD_GPMI_D04__GPMI_D04 */ + 0x0050 /* MX23_PAD_GPMI_D05__GPMI_D05 */ + 0x0060 /* MX23_PAD_GPMI_D06__GPMI_D06 */ + 0x0070 /* MX23_PAD_GPMI_D07__GPMI_D07 */ + 0x0100 /* MX23_PAD_GPMI_CLE__GPMI_CLE */ + 0x0110 /* MX23_PAD_GPMI_ALE__GPMI_ALE */ + 0x0130 /* MX23_PAD_GPMI_RDY0__GPMI_RDY0 */ + 0x0140 /* MX23_PAD_GPMI_RDY1__GPMI_RDY1 */ + 0x0170 /* MX23_PAD_GPMI_WPN__GPMI_WPN */ + 0x0180 /* MX23_PAD_GPMI_WRN__GPMI_WRN */ + 0x0190 /* MX23_PAD_GPMI_RDN__GPMI_RDN */ + 0x21b0 /* MX23_PAD_GPMI_CE1N__GPMI_CE1N */ + 0x21c0 /* MX23_PAD_GPMI_CE0N__GPMI_CE0N */ >; - fsl,drive-strength = <MXS_DRIVE_4mA>; - fsl,voltage = <MXS_VOLTAGE_HIGH>; - fsl,pull-up = <MXS_PULL_DISABLE>; + fsl,drive-strength = <0>; + fsl,voltage = <1>; + fsl,pull-up = <0>; }; gpmi_pins_fixup: gpmi-pins-fixup { fsl,pinmux-ids = < - MX23_PAD_GPMI_WPN__GPMI_WPN - MX23_PAD_GPMI_WRN__GPMI_WRN - MX23_PAD_GPMI_RDN__GPMI_RDN + 0x0170 /* MX23_PAD_GPMI_WPN__GPMI_WPN */ + 0x0180 /* MX23_PAD_GPMI_WRN__GPMI_WRN */ + 0x0190 /* MX23_PAD_GPMI_RDN__GPMI_RDN */ >; - fsl,drive-strength = <MXS_DRIVE_12mA>; + fsl,drive-strength = <2>; }; mmc0_4bit_pins_a: mmc0-4bit@0 { reg = <0>; fsl,pinmux-ids = < - MX23_PAD_SSP1_DATA0__SSP1_DATA0 - MX23_PAD_SSP1_DATA1__SSP1_DATA1 - MX23_PAD_SSP1_DATA2__SSP1_DATA2 - MX23_PAD_SSP1_DATA3__SSP1_DATA3 - MX23_PAD_SSP1_CMD__SSP1_CMD - MX23_PAD_SSP1_SCK__SSP1_SCK + 0x2020 /* MX23_PAD_SSP1_DATA0__SSP1_DATA0 */ + 0x2030 /* MX23_PAD_SSP1_DATA1__SSP1_DATA1 */ + 0x2040 /* MX23_PAD_SSP1_DATA2__SSP1_DATA2 */ + 0x2050 /* MX23_PAD_SSP1_DATA3__SSP1_DATA3 */ + 0x2000 /* MX23_PAD_SSP1_CMD__SSP1_CMD */ + 0x2060 /* MX23_PAD_SSP1_SCK__SSP1_SCK */ >; - fsl,drive-strength = <MXS_DRIVE_8mA>; - fsl,voltage = <MXS_VOLTAGE_HIGH>; - fsl,pull-up = <MXS_PULL_ENABLE>; + fsl,drive-strength = <1>; + fsl,voltage = <1>; + fsl,pull-up = <1>; }; mmc0_8bit_pins_a: mmc0-8bit@0 { reg = <0>; fsl,pinmux-ids = < - MX23_PAD_SSP1_DATA0__SSP1_DATA0 - MX23_PAD_SSP1_DATA1__SSP1_DATA1 - MX23_PAD_SSP1_DATA2__SSP1_DATA2 - MX23_PAD_SSP1_DATA3__SSP1_DATA3 - MX23_PAD_GPMI_D08__SSP1_DATA4 - MX23_PAD_GPMI_D09__SSP1_DATA5 - MX23_PAD_GPMI_D10__SSP1_DATA6 - MX23_PAD_GPMI_D11__SSP1_DATA7 - MX23_PAD_SSP1_CMD__SSP1_CMD - MX23_PAD_SSP1_DETECT__SSP1_DETECT - MX23_PAD_SSP1_SCK__SSP1_SCK + 0x2020 /* MX23_PAD_SSP1_DATA0__SSP1_DATA0 */ + 0x2030 /* MX23_PAD_SSP1_DATA1__SSP1_DATA1 */ + 0x2040 /* MX23_PAD_SSP1_DATA2__SSP1_DATA2 */ + 0x2050 /* MX23_PAD_SSP1_DATA3__SSP1_DATA3 */ + 0x0082 /* MX23_PAD_GPMI_D08__SSP1_DATA4 */ + 0x0092 /* MX23_PAD_GPMI_D09__SSP1_DATA5 */ + 0x00a2 /* MX23_PAD_GPMI_D10__SSP1_DATA6 */ + 0x00b2 /* MX23_PAD_GPMI_D11__SSP1_DATA7 */ + 0x2000 /* MX23_PAD_SSP1_CMD__SSP1_CMD */ + 0x2010 /* MX23_PAD_SSP1_DETECT__SSP1_DETECT */ + 0x2060 /* MX23_PAD_SSP1_SCK__SSP1_SCK */ >; - fsl,drive-strength = <MXS_DRIVE_8mA>; - fsl,voltage = <MXS_VOLTAGE_HIGH>; - fsl,pull-up = <MXS_PULL_ENABLE>; + fsl,drive-strength = <1>; + fsl,voltage = <1>; + fsl,pull-up = <1>; }; mmc0_pins_fixup: mmc0-pins-fixup { fsl,pinmux-ids = < - MX23_PAD_SSP1_DETECT__SSP1_DETECT - MX23_PAD_SSP1_SCK__SSP1_SCK + 0x2010 /* MX23_PAD_SSP1_DETECT__SSP1_DETECT */ + 0x2060 /* MX23_PAD_SSP1_SCK__SSP1_SCK */ >; - fsl,pull-up = <MXS_PULL_DISABLE>; + fsl,pull-up = <0>; }; pwm2_pins_a: pwm2@0 { reg = <0>; fsl,pinmux-ids = < - MX23_PAD_PWM2__PWM2 + 0x11c0 /* MX23_PAD_PWM2__PWM2 */ >; - fsl,drive-strength = <MXS_DRIVE_4mA>; - fsl,voltage = <MXS_VOLTAGE_HIGH>; - fsl,pull-up = <MXS_PULL_DISABLE>; + fsl,drive-strength = <0>; + fsl,voltage = <1>; + fsl,pull-up = <0>; }; lcdif_24bit_pins_a: lcdif-24bit@0 { reg = <0>; fsl,pinmux-ids = < - MX23_PAD_LCD_D00__LCD_D00 - MX23_PAD_LCD_D01__LCD_D01 - MX23_PAD_LCD_D02__LCD_D02 - MX23_PAD_LCD_D03__LCD_D03 - MX23_PAD_LCD_D04__LCD_D04 - MX23_PAD_LCD_D05__LCD_D05 - MX23_PAD_LCD_D06__LCD_D06 - MX23_PAD_LCD_D07__LCD_D07 - MX23_PAD_LCD_D08__LCD_D08 - MX23_PAD_LCD_D09__LCD_D09 - MX23_PAD_LCD_D10__LCD_D10 - MX23_PAD_LCD_D11__LCD_D11 - MX23_PAD_LCD_D12__LCD_D12 - MX23_PAD_LCD_D13__LCD_D13 - MX23_PAD_LCD_D14__LCD_D14 - MX23_PAD_LCD_D15__LCD_D15 - MX23_PAD_LCD_D16__LCD_D16 - MX23_PAD_LCD_D17__LCD_D17 - MX23_PAD_GPMI_D08__LCD_D18 - MX23_PAD_GPMI_D09__LCD_D19 - MX23_PAD_GPMI_D10__LCD_D20 - MX23_PAD_GPMI_D11__LCD_D21 - MX23_PAD_GPMI_D12__LCD_D22 - MX23_PAD_GPMI_D13__LCD_D23 - MX23_PAD_LCD_DOTCK__LCD_DOTCK - MX23_PAD_LCD_ENABLE__LCD_ENABLE - MX23_PAD_LCD_HSYNC__LCD_HSYNC - MX23_PAD_LCD_VSYNC__LCD_VSYNC + 0x1000 /* MX23_PAD_LCD_D00__LCD_D0 */ + 0x1010 /* MX23_PAD_LCD_D01__LCD_D1 */ + 0x1020 /* MX23_PAD_LCD_D02__LCD_D2 */ + 0x1030 /* MX23_PAD_LCD_D03__LCD_D3 */ + 0x1040 /* MX23_PAD_LCD_D04__LCD_D4 */ + 0x1050 /* MX23_PAD_LCD_D05__LCD_D5 */ + 0x1060 /* MX23_PAD_LCD_D06__LCD_D6 */ + 0x1070 /* MX23_PAD_LCD_D07__LCD_D7 */ + 0x1080 /* MX23_PAD_LCD_D08__LCD_D8 */ + 0x1090 /* MX23_PAD_LCD_D09__LCD_D9 */ + 0x10a0 /* MX23_PAD_LCD_D10__LCD_D10 */ + 0x10b0 /* MX23_PAD_LCD_D11__LCD_D11 */ + 0x10c0 /* MX23_PAD_LCD_D12__LCD_D12 */ + 0x10d0 /* MX23_PAD_LCD_D13__LCD_D13 */ + 0x10e0 /* MX23_PAD_LCD_D14__LCD_D14 */ + 0x10f0 /* MX23_PAD_LCD_D15__LCD_D15 */ + 0x1100 /* MX23_PAD_LCD_D16__LCD_D16 */ + 0x1110 /* MX23_PAD_LCD_D17__LCD_D17 */ + 0x0081 /* MX23_PAD_GPMI_D08__LCD_D18 */ + 0x0091 /* MX23_PAD_GPMI_D09__LCD_D19 */ + 0x00a1 /* MX23_PAD_GPMI_D10__LCD_D20 */ + 0x00b1 /* MX23_PAD_GPMI_D11__LCD_D21 */ + 0x00c1 /* MX23_PAD_GPMI_D12__LCD_D22 */ + 0x00d1 /* MX23_PAD_GPMI_D13__LCD_D23 */ + 0x1160 /* MX23_PAD_LCD_DOTCK__LCD_DOTCK */ + 0x1170 /* MX23_PAD_LCD_ENABLE__LCD_ENABLE */ + 0x1180 /* MX23_PAD_LCD_HSYNC__LCD_HSYNC */ + 0x1190 /* MX23_PAD_LCD_VSYNC__LCD_VSYNC */ >; - fsl,drive-strength = <MXS_DRIVE_4mA>; - fsl,voltage = <MXS_VOLTAGE_HIGH>; - fsl,pull-up = <MXS_PULL_DISABLE>; + fsl,drive-strength = <0>; + fsl,voltage = <1>; + fsl,pull-up = <0>; }; spi2_pins_a: spi2@0 { reg = <0>; fsl,pinmux-ids = < - MX23_PAD_GPMI_WRN__SSP2_SCK - MX23_PAD_GPMI_RDY1__SSP2_CMD - MX23_PAD_GPMI_D00__SSP2_DATA0 - MX23_PAD_GPMI_D03__SSP2_DATA3 + 0x0182 /* MX23_PAD_GPMI_WRN__SSP2_SCK */ + 0x0142 /* MX23_PAD_GPMI_RDY1__SSP2_CMD */ + 0x0002 /* MX23_PAD_GPMI_D00__SSP2_DATA0 */ + 0x0032 /* MX23_PAD_GPMI_D03__SSP2_DATA3 */ >; - fsl,drive-strength = <MXS_DRIVE_8mA>; - fsl,voltage = <MXS_VOLTAGE_HIGH>; - fsl,pull-up = <MXS_PULL_ENABLE>; + fsl,drive-strength = <1>; + fsl,voltage = <1>; + fsl,pull-up = <1>; }; }; @@ -431,7 +430,6 @@ reg = <0x80050000 0x2000>; interrupts = <36 37 38 39 40 41 42 43 44>; status = "disabled"; - clocks = <&clks 26>; }; spdif@80054000 { diff --git a/arch/arm/boot/dts/imx27-apf27dev.dts b/arch/arm/boot/dts/imx27-apf27dev.dts index 47c8c26..2a377ca 100644 --- a/arch/arm/boot/dts/imx27-apf27dev.dts +++ b/arch/arm/boot/dts/imx27-apf27dev.dts @@ -16,26 +16,6 @@ model = "Armadeus Systems APF27Dev docking/development board"; compatible = "armadeus,imx27-apf27dev", "armadeus,imx27-apf27", "fsl,imx27"; - display: display { - model = "Chimei-LW700AT9003"; - native-mode = <&timing0>; - bits-per-pixel = <16>; /* non-standard but required */ - fsl,pcr = <0xfae80083>; /* non-standard but required */ - display-timings { - timing0: 640x480 { - clock-frequency = <33000033>; - hactive = <800>; - vactive = <640>; - hback-porch = <96>; - hfront-porch = <96>; - vback-porch = <20>; - vfront-porch = <21>; - hsync-len = <64>; - vsync-len = <4>; - }; - }; - }; - gpio-keys { compatible = "gpio-keys"; @@ -70,12 +50,6 @@ status = "okay"; }; -&fb { - display = <&display>; - fsl,dmacr = <0x00020010>; - status = "okay"; -}; - &i2c1 { clock-frequency = <400000>; status = "okay"; diff --git a/arch/arm/boot/dts/imx27.dtsi b/arch/arm/boot/dts/imx27.dtsi index 826231e..b7a1c6d 100644 --- a/arch/arm/boot/dts/imx27.dtsi +++ b/arch/arm/boot/dts/imx27.dtsi @@ -123,7 +123,6 @@ }; pwm: pwm@10006000 { - #pwm-cells = <2>; compatible = "fsl,imx27-pwm"; reg = <0x10006000 0x1000>; interrupts = <23>; diff --git a/arch/arm/boot/dts/imx28-apf28.dts b/arch/arm/boot/dts/imx28-apf28.dts index 7198fe3..7eb0758 100644 --- a/arch/arm/boot/dts/imx28-apf28.dts +++ b/arch/arm/boot/dts/imx28-apf28.dts @@ -10,7 +10,7 @@ */ /dts-v1/; -#include "imx28.dtsi" +/include/ "imx28.dtsi" / { model = "Armadeus Systems APF28 module"; diff --git a/arch/arm/boot/dts/imx28-apf28dev.dts b/arch/arm/boot/dts/imx28-apf28dev.dts index e2efd8d..b602494 100644 --- a/arch/arm/boot/dts/imx28-apf28dev.dts +++ b/arch/arm/boot/dts/imx28-apf28dev.dts @@ -10,7 +10,7 @@ */ /* APF28Dev is a docking board for the APF28 SOM */ -#include "imx28-apf28.dts" +/include/ "imx28-apf28.dts" / { model = "Armadeus Systems APF28Dev docking/development board"; @@ -41,30 +41,30 @@ hog_pins_apf28dev: hog@0 { reg = <0>; fsl,pinmux-ids = < - MX28_PAD_LCD_D16__GPIO_1_16 - MX28_PAD_LCD_D17__GPIO_1_17 - MX28_PAD_LCD_D18__GPIO_1_18 - MX28_PAD_LCD_D19__GPIO_1_19 - MX28_PAD_LCD_D20__GPIO_1_20 - MX28_PAD_LCD_D21__GPIO_1_21 - MX28_PAD_LCD_D22__GPIO_1_22 + 0x1103 /* MX28_PAD_LCD_D16__GPIO_1_16 */ + 0x1113 /* MX28_PAD_LCD_D17__GPIO_1_17 */ + 0x1123 /* MX28_PAD_LCD_D18__GPIO_1_18 */ + 0x1133 /* MX28_PAD_LCD_D19__GPIO_1_19 */ + 0x1143 /* MX28_PAD_LCD_D20__GPIO_1_20 */ + 0x1153 /* MX28_PAD_LCD_D21__GPIO_1_21 */ + 0x1163 /* MX28_PAD_LCD_D22__GPIO_1_22 */ >; - fsl,drive-strength = <MXS_DRIVE_4mA>; - fsl,voltage = <MXS_VOLTAGE_HIGH>; - fsl,pull-up = <MXS_PULL_DISABLE>; + fsl,drive-strength = <0>; + fsl,voltage = <1>; + fsl,pull-up = <0>; }; lcdif_pins_apf28dev: lcdif-apf28dev@0 { reg = <0>; fsl,pinmux-ids = < - MX28_PAD_LCD_RD_E__LCD_VSYNC - MX28_PAD_LCD_WR_RWN__LCD_HSYNC - MX28_PAD_LCD_RS__LCD_DOTCLK - MX28_PAD_LCD_CS__LCD_ENABLE + 0x1181 /* MX28_PAD_LCD_RD_E__LCD_VSYNC */ + 0x1191 /* MX28_PAD_LCD_WR_RWN__LCD_HSYNC */ + 0x11a1 /* MX28_PAD_LCD_RS__LCD_DOTCLK */ + 0x11b1 /* MX28_PAD_LCD_CS__LCD_ENABLE */ >; - fsl,drive-strength = <MXS_DRIVE_4mA>; - fsl,voltage = <MXS_VOLTAGE_HIGH>; - fsl,pull-up = <MXS_PULL_DISABLE>; + fsl,drive-strength = <0>; + fsl,voltage = <1>; + fsl,pull-up = <0>; }; }; diff --git a/arch/arm/boot/dts/imx28-apx4devkit.dts b/arch/arm/boot/dts/imx28-apx4devkit.dts index 6f254ca..0e7fed4 100644 --- a/arch/arm/boot/dts/imx28-apx4devkit.dts +++ b/arch/arm/boot/dts/imx28-apx4devkit.dts @@ -1,5 +1,5 @@ /dts-v1/; -#include "imx28.dtsi" +/include/ "imx28.dtsi" / { model = "Bluegiga APX4 Development Kit"; @@ -40,53 +40,53 @@ hog_pins_a: hog@0 { reg = <0>; fsl,pinmux-ids = < - MX28_PAD_GPMI_CE1N__GPIO_0_17 - MX28_PAD_GPMI_RDY1__GPIO_0_21 - MX28_PAD_SSP2_MISO__GPIO_2_18 - MX28_PAD_SSP2_SS0__AUART3_TX /* was: 0x2131 - MX28_PAD_SSP2_SS0__GPIO_2_19 */ - MX28_PAD_PWM3__GPIO_3_28 - MX28_PAD_LCD_RESET__GPIO_3_30 - MX28_PAD_JTAG_RTCK__GPIO_4_20 + 0x0113 /* MX28_PAD_GPMI_CE1N__GPIO_0_17 */ + 0x0153 /* MX28_PAD_GPMI_RDY1__GPIO_0_21 */ + 0x2123 /* MX28_PAD_SSP2_MISO__GPIO_2_18 */ + 0x2131 /* MX28_PAD_SSP2_SS0__GPIO_2_19 */ + 0x31c3 /* MX28_PAD_PWM3__GPIO_3_28 */ + 0x31e3 /* MX28_PAD_LCD_RESET__GPIO_3_30 */ + 0x4143 /* MX28_PAD_JTAG_RTCK__GPIO_4_20 */ >; - fsl,drive-strength = <MXS_DRIVE_4mA>; - fsl,voltage = <MXS_VOLTAGE_HIGH>; - fsl,pull-up = <MXS_PULL_DISABLE>; + fsl,drive-strength = <0>; + fsl,voltage = <1>; + fsl,pull-up = <0>; }; lcdif_pins_apx4: lcdif-apx4@0 { reg = <0>; fsl,pinmux-ids = < - MX28_PAD_LCD_RD_E__LCD_VSYNC - MX28_PAD_LCD_WR_RWN__LCD_HSYNC - MX28_PAD_LCD_RS__LCD_DOTCLK - MX28_PAD_LCD_CS__LCD_ENABLE + 0x1181 /* MX28_PAD_LCD_RD_E__LCD_VSYNC */ + 0x1191 /* MX28_PAD_LCD_WR_RWN__LCD_HSYNC */ + 0x11a1 /* MX28_PAD_LCD_RS__LCD_DOTCLK */ + 0x11b1 /* MX28_PAD_LCD_CS__LCD_ENABLE */ >; - fsl,drive-strength = <MXS_DRIVE_4mA>; - fsl,voltage = <MXS_VOLTAGE_HIGH>; - fsl,pull-up = <MXS_PULL_DISABLE>; + fsl,drive-strength = <0>; + fsl,voltage = <1>; + fsl,pull-up = <0>; }; mmc2_4bit_pins_apx4: mmc2-4bit-apx4@0 { reg = <0>; fsl,pinmux-ids = < - MX28_PAD_SSP0_DATA4__SSP2_D0 - MX28_PAD_SSP0_DATA5__SSP2_D3 - MX28_PAD_SSP0_DATA6__SSP2_CMD - MX28_PAD_SSP0_DATA7__SSP2_SCK - MX28_PAD_SSP2_SS1__SSP2_D1 - MX28_PAD_SSP2_SS2__SSP2_D2 + 0x2041 /* MX28_PAD_SSP0_DATA4__SSP2_D0 */ + 0x2051 /* MX28_PAD_SSP0_DATA5__SSP2_D3 */ + 0x2061 /* MX28_PAD_SSP0_DATA6__SSP2_CMD */ + 0x2071 /* MX28_PAD_SSP0_DATA7__SSP2_SCK */ + 0x2141 /* MX28_PAD_SSP2_SS1__SSP2_D1 */ + 0x2151 /* MX28_PAD_SSP2_SS2__SSP2_D2 */ >; - fsl,drive-strength = <MXS_DRIVE_8mA>; - fsl,voltage = <MXS_VOLTAGE_HIGH>; - fsl,pull-up = <MXS_PULL_ENABLE>; + fsl,drive-strength = <1>; + fsl,voltage = <1>; + fsl,pull-up = <1>; }; mmc2_sck_cfg_apx4: mmc2-sck-cfg-apx4 { fsl,pinmux-ids = < - MX28_PAD_SSP0_DATA7__SSP2_SCK + 0x2071 /* MX28_PAD_SSP0_DATA7__SSP2_SCK */ >; - fsl,drive-strength = <MXS_DRIVE_12mA>; - fsl,pull-up = <MXS_PULL_DISABLE>; + fsl,drive-strength = <2>; + fsl,pull-up = <0>; }; }; diff --git a/arch/arm/boot/dts/imx28-cfa10036.dts b/arch/arm/boot/dts/imx28-cfa10036.dts index cabb617..1ec8c94 100644 --- a/arch/arm/boot/dts/imx28-cfa10036.dts +++ b/arch/arm/boot/dts/imx28-cfa10036.dts @@ -10,7 +10,7 @@ */ /dts-v1/; -#include "imx28.dtsi" +/include/ "imx28.dtsi" / { model = "Crystalfontz CFA-10036 Board"; @@ -26,31 +26,31 @@ ssd1306_cfa10036: ssd1306-10036@0 { reg = <0>; fsl,pinmux-ids = < - MX28_PAD_SSP0_DATA7__GPIO_2_7 + 0x2073 /* MX28_PAD_SSP0_D7__GPIO_2_7 */ >; - fsl,drive-strength = <MXS_DRIVE_4mA>; - fsl,voltage = <MXS_VOLTAGE_HIGH>; - fsl,pull-up = <MXS_PULL_DISABLE>; + fsl,drive-strength = <0>; + fsl,voltage = <1>; + fsl,pull-up = <0>; }; led_pins_cfa10036: leds-10036@0 { reg = <0>; fsl,pinmux-ids = < - MX28_PAD_AUART1_RX__GPIO_3_4 + 0x3043 /* MX28_PAD_AUART1_RX__GPIO_3_4 */ >; - fsl,drive-strength = <MXS_DRIVE_4mA>; - fsl,voltage = <MXS_VOLTAGE_HIGH>; - fsl,pull-up = <MXS_PULL_DISABLE>; + fsl,drive-strength = <0>; + fsl,voltage = <1>; + fsl,pull-up = <0>; }; usb0_otg_cfa10036: otg-10036@0 { reg = <0>; fsl,pinmux-ids = < - MX28_PAD_GPMI_RDY0__USB0_ID + 0x0142 /* MX28_PAD_GPMI_READY0__USB0_ID */ >; - fsl,drive-strength = <MXS_DRIVE_4mA>; - fsl,voltage = <MXS_VOLTAGE_HIGH>; - fsl,pull-up = <MXS_PULL_DISABLE>; + fsl,drive-strength = <0>; + fsl,voltage = <1>; + fsl,pull-up = <0>; }; }; diff --git a/arch/arm/boot/dts/imx28-cfa10037.dts b/arch/arm/boot/dts/imx28-cfa10037.dts index f93e9a7..182b99f 100644 --- a/arch/arm/boot/dts/imx28-cfa10037.dts +++ b/arch/arm/boot/dts/imx28-cfa10037.dts @@ -13,7 +13,7 @@ * The CFA-10049 is an expansion board for the CFA-10036 module, thus we * need to include the CFA-10036 DTS. */ -#include "imx28-cfa10036.dts" +/include/ "imx28-cfa10036.dts" / { model = "Crystalfontz CFA-10037 Board"; @@ -25,21 +25,21 @@ usb_pins_cfa10037: usb-10037@0 { reg = <0>; fsl,pinmux-ids = < - MX28_PAD_GPMI_D07__GPIO_0_7 + 0x0073 /* MX28_PAD_GPMI_D7__GPIO_0_7 */ >; - fsl,drive-strength = <MXS_DRIVE_4mA>; - fsl,voltage = <MXS_VOLTAGE_HIGH>; - fsl,pull-up = <MXS_PULL_DISABLE>; + fsl,drive-strength = <0>; + fsl,voltage = <1>; + fsl,pull-up = <0>; }; mac0_pins_cfa10037: mac0-10037@0 { reg = <0>; fsl,pinmux-ids = < - MX28_PAD_SSP2_SS2__GPIO_2_21 + 0x2153 /* MX28_PAD_SSP2_D5__GPIO_2_21 */ >; - fsl,drive-strength = <MXS_DRIVE_4mA>; - fsl,voltage = <MXS_VOLTAGE_HIGH>; - fsl,pull-up = <MXS_PULL_DISABLE>; + fsl,drive-strength = <0>; + fsl,voltage = <1>; + fsl,pull-up = <0>; }; }; }; diff --git a/arch/arm/boot/dts/imx28-cfa10049.dts b/arch/arm/boot/dts/imx28-cfa10049.dts index 7087b4b..06e4cfa 100644 --- a/arch/arm/boot/dts/imx28-cfa10049.dts +++ b/arch/arm/boot/dts/imx28-cfa10049.dts @@ -13,7 +13,7 @@ * The CFA-10049 is an expansion board for the CFA-10036 module, thus we * need to include the CFA-10036 DTS. */ -#include "imx28-cfa10036.dts" +/include/ "imx28-cfa10036.dts" / { model = "Crystalfontz CFA-10049 Board"; @@ -25,150 +25,150 @@ usb_pins_cfa10049: usb-10049@0 { reg = <0>; fsl,pinmux-ids = < - MX28_PAD_GPMI_D07__GPIO_0_7 + 0x0073 /* MX28_PAD_GPMI_D7__GPIO_0_7 */ >; - fsl,drive-strength = <MXS_DRIVE_4mA>; - fsl,voltage = <MXS_VOLTAGE_HIGH>; - fsl,pull-up = <MXS_PULL_DISABLE>; + fsl,drive-strength = <0>; + fsl,voltage = <1>; + fsl,pull-up = <0>; }; i2cmux_pins_cfa10049: i2cmux-10049@0 { reg = <0>; fsl,pinmux-ids = < - MX28_PAD_LCD_D22__GPIO_1_22 - MX28_PAD_LCD_D23__GPIO_1_23 + 0x1163 /* MX28_PAD_LCD_D22__GPIO_1_22 */ + 0x1173 /* MX28_PAD_LCD_D22__GPIO_1_23 */ >; - fsl,drive-strength = <MXS_DRIVE_4mA>; - fsl,voltage = <MXS_VOLTAGE_HIGH>; - fsl,pull-up = <MXS_PULL_DISABLE>; + fsl,drive-strength = <0>; + fsl,voltage = <1>; + fsl,pull-up = <0>; }; mac0_pins_cfa10049: mac0-10049@0 { reg = <0>; fsl,pinmux-ids = < - MX28_PAD_SSP2_SS2__GPIO_2_21 + 0x2153 /* MX28_PAD_SSP2_D5__GPIO_2_21 */ >; - fsl,drive-strength = <MXS_DRIVE_4mA>; - fsl,voltage = <MXS_VOLTAGE_HIGH>; - fsl,pull-up = <MXS_PULL_DISABLE>; + fsl,drive-strength = <0>; + fsl,voltage = <1>; + fsl,pull-up = <0>; }; pca_pins_cfa10049: pca-10049@0 { reg = <0>; fsl,pinmux-ids = < - MX28_PAD_SSP2_SS0__GPIO_2_19 + 0x2133 /* MX28_PAD_SSP2_D3__GPIO_2_19 */ >; - fsl,drive-strength = <MXS_DRIVE_4mA>; - fsl,voltage = <MXS_VOLTAGE_HIGH>; - fsl,pull-up = <MXS_PULL_ENABLE>; + fsl,drive-strength = <0>; + fsl,voltage = <1>; + fsl,pull-up = <1>; }; rotary_pins_cfa10049: rotary-10049@0 { reg = <0>; fsl,pinmux-ids = < - MX28_PAD_I2C0_SCL__GPIO_3_24 - MX28_PAD_I2C0_SDA__GPIO_3_25 + 0x3183 /* MX28_PAD_I2C0_SCL__GPIO_3_24 */ + 0x3193 /* MX28_PAD_I2C0_SDA__GPIO_3_25 */ >; - fsl,drive-strength = <MXS_DRIVE_4mA>; - fsl,voltage = <MXS_VOLTAGE_HIGH>; - fsl,pull-up = <MXS_PULL_ENABLE>; + fsl,drive-strength = <0>; + fsl,voltage = <1>; + fsl,pull-up = <1>; }; rotary_btn_pins_cfa10049: rotary-btn-10049@0 { reg = <0>; fsl,pinmux-ids = < - MX28_PAD_SAIF1_SDATA0__GPIO_3_26 + 0x31a3 /* MX28_PAD_SAIF_SDATA0__GPIO_3_26 */ >; - fsl,drive-strength = <MXS_DRIVE_4mA>; - fsl,voltage = <MXS_VOLTAGE_HIGH>; - fsl,pull-up = <MXS_PULL_ENABLE>; + fsl,drive-strength = <0>; + fsl,voltage = <1>; + fsl,pull-up = <1>; }; spi2_pins_cfa10049: spi2-cfa10049@0 { reg = <0>; fsl,pinmux-ids = < - MX28_PAD_SSP2_SCK__GPIO_2_16 - MX28_PAD_SSP2_MOSI__GPIO_2_17 - MX28_PAD_SSP2_MISO__GPIO_2_18 - MX28_PAD_AUART1_TX__GPIO_3_5 + 0x2103 /* MX28_PAD_SSP2_SCK__GPIO_2_16 */ + 0x2113 /* MX28_PAD_SSP2_CMD__GPIO_2_17 */ + 0x2123 /* MX28_PAD_SSP2_D0__GPIO_2_18 */ + 0x3053 /* MX28_PAD_AUART1_TX__GPIO_3_5 */ >; - fsl,drive-strength = <MXS_DRIVE_8mA>; - fsl,voltage = <MXS_VOLTAGE_HIGH>; - fsl,pull-up = <MXS_PULL_ENABLE>; + fsl,drive-strength = <1>; + fsl,voltage = <1>; + fsl,pull-up = <1>; }; spi3_pins_cfa10049: spi3-cfa10049@0 { reg = <0>; fsl,pinmux-ids = < - MX28_PAD_GPMI_RDN__GPIO_0_24 - MX28_PAD_GPMI_RESETN__GPIO_0_28 - MX28_PAD_GPMI_CE1N__GPIO_0_17 - MX28_PAD_GPMI_ALE__GPIO_0_26 - MX28_PAD_GPMI_CLE__GPIO_0_27 + 0x0183 /* MX28_PAD_GPMI_RDN__GPIO_0_24 */ + 0x01c3 /* MX28_PAD_GPMI_RESETN__GPIO_0_28 */ + 0x0113 /* MX28_PAD_GPMI_CE1N__GPIO_0_17 */ + 0x01a3 /* MX28_PAD_GPMI_ALE__GPIO_0_26 */ + 0x01b3 /* MX28_PAD_GPMI_CLE__GPIO_0_27 */ >; - fsl,drive-strength = <MXS_DRIVE_8mA>; - fsl,voltage = <MXS_VOLTAGE_HIGH>; - fsl,pull-up = <MXS_PULL_ENABLE>; + fsl,drive-strength = <1>; + fsl,voltage = <1>; + fsl,pull-up = <1>; }; lcdif_18bit_pins_cfa10049: lcdif-18bit@0 { reg = <0>; fsl,pinmux-ids = < - MX28_PAD_LCD_D00__LCD_D0 - MX28_PAD_LCD_D01__LCD_D1 - MX28_PAD_LCD_D02__LCD_D2 - MX28_PAD_LCD_D03__LCD_D3 - MX28_PAD_LCD_D04__LCD_D4 - MX28_PAD_LCD_D05__LCD_D5 - MX28_PAD_LCD_D06__LCD_D6 - MX28_PAD_LCD_D07__LCD_D7 - MX28_PAD_LCD_D08__LCD_D8 - MX28_PAD_LCD_D09__LCD_D9 - MX28_PAD_LCD_D10__LCD_D10 - MX28_PAD_LCD_D11__LCD_D11 - MX28_PAD_LCD_D12__LCD_D12 - MX28_PAD_LCD_D13__LCD_D13 - MX28_PAD_LCD_D14__LCD_D14 - MX28_PAD_LCD_D15__LCD_D15 - MX28_PAD_LCD_D16__LCD_D16 - MX28_PAD_LCD_D17__LCD_D17 + 0x1000 /* MX28_PAD_LCD_D00__LCD_D0 */ + 0x1010 /* MX28_PAD_LCD_D01__LCD_D1 */ + 0x1020 /* MX28_PAD_LCD_D02__LCD_D2 */ + 0x1030 /* MX28_PAD_LCD_D03__LCD_D3 */ + 0x1040 /* MX28_PAD_LCD_D04__LCD_D4 */ + 0x1050 /* MX28_PAD_LCD_D05__LCD_D5 */ + 0x1060 /* MX28_PAD_LCD_D06__LCD_D6 */ + 0x1070 /* MX28_PAD_LCD_D07__LCD_D7 */ + 0x1080 /* MX28_PAD_LCD_D08__LCD_D8 */ + 0x1090 /* MX28_PAD_LCD_D09__LCD_D9 */ + 0x10a0 /* MX28_PAD_LCD_D10__LCD_D10 */ + 0x10b0 /* MX28_PAD_LCD_D11__LCD_D11 */ + 0x10c0 /* MX28_PAD_LCD_D12__LCD_D12 */ + 0x10d0 /* MX28_PAD_LCD_D13__LCD_D13 */ + 0x10e0 /* MX28_PAD_LCD_D14__LCD_D14 */ + 0x10f0 /* MX28_PAD_LCD_D15__LCD_D15 */ + 0x1100 /* MX28_PAD_LCD_D16__LCD_D16 */ + 0x1110 /* MX28_PAD_LCD_D17__LCD_D17 */ >; - fsl,drive-strength = <MXS_DRIVE_4mA>; - fsl,voltage = <MXS_VOLTAGE_HIGH>; - fsl,pull-up = <MXS_PULL_DISABLE>; + fsl,drive-strength = <0>; + fsl,voltage = <1>; + fsl,pull-up = <0>; }; lcdif_pins_cfa10049: lcdif-evk@0 { reg = <0>; fsl,pinmux-ids = < - MX28_PAD_LCD_RD_E__LCD_VSYNC - MX28_PAD_LCD_WR_RWN__LCD_HSYNC - MX28_PAD_LCD_RS__LCD_DOTCLK - MX28_PAD_LCD_CS__LCD_ENABLE + 0x1181 /* MX28_PAD_LCD_RD_E__LCD_VSYNC */ + 0x1191 /* MX28_PAD_LCD_WR_RWN__LCD_HSYNC */ + 0x11a1 /* MX28_PAD_LCD_RS__LCD_DOTCLK */ + 0x11b1 /* MX28_PAD_LCD_CS__LCD_ENABLE */ >; - fsl,drive-strength = <MXS_DRIVE_4mA>; - fsl,voltage = <MXS_VOLTAGE_HIGH>; - fsl,pull-up = <MXS_PULL_DISABLE>; + fsl,drive-strength = <0>; + fsl,voltage = <1>; + fsl,pull-up = <0>; }; lcdif_pins_cfa10049_pullup: lcdif-10049-pullup@0 { reg = <0>; fsl,pinmux-ids = < - MX28_PAD_LCD_RESET__GPIO_3_30 + 0x31e3 /* MX28_PAD_LCD_RESET__GPIO_3_30 */ >; - fsl,drive-strength = <MXS_DRIVE_4mA>; - fsl,voltage = <MXS_VOLTAGE_HIGH>; - fsl,pull-up = <MXS_PULL_ENABLE>; + fsl,drive-strength = <0>; + fsl,voltage = <1>; + fsl,pull-up = <1>; }; w1_gpio_pins: w1-gpio@0 { reg = <0>; fsl,pinmux-ids = < - MX28_PAD_LCD_D21__GPIO_1_21 + 0x1153 /* MX28_PAD_LCD_D21__GPIO_1_21 */ >; - fsl,drive-strength = <MXS_DRIVE_8mA>; - fsl,voltage = <MXS_VOLTAGE_HIGH>; - fsl,pull-up = <MXS_PULL_DISABLE>; /* 0 will enable the keeper */ + fsl,drive-strength = <1>; + fsl,voltage = <1>; + fsl,pull-up = <0>; /* 0 will enable the keeper */ }; }; diff --git a/arch/arm/boot/dts/imx28-cfa10055.dts b/arch/arm/boot/dts/imx28-cfa10055.dts index c3900e7..171bcbe 100644 --- a/arch/arm/boot/dts/imx28-cfa10055.dts +++ b/arch/arm/boot/dts/imx28-cfa10055.dts @@ -14,7 +14,7 @@ * The CFA-10055 is an expansion board for the CFA-10036 module and * CFA-10037, thus we need to include the CFA-10037 DTS. */ -#include "imx28-cfa10037.dts" +/include/ "imx28-cfa10037.dts" / { model = "Crystalfontz CFA-10055 Board"; @@ -26,64 +26,64 @@ spi2_pins_cfa10055: spi2-cfa10055@0 { reg = <0>; fsl,pinmux-ids = < - MX28_PAD_SSP2_SCK__GPIO_2_16 - MX28_PAD_SSP2_MOSI__GPIO_2_17 - MX28_PAD_SSP2_MISO__GPIO_2_18 - MX28_PAD_AUART1_TX__GPIO_3_5 + 0x2103 /* MX28_PAD_SSP2_SCK__GPIO_2_16 */ + 0x2113 /* MX28_PAD_SSP2_CMD__GPIO_2_17 */ + 0x2123 /* MX28_PAD_SSP2_D0__GPIO_2_18 */ + 0x3053 /* MX28_PAD_AUART1_TX__GPIO_3_5 */ >; - fsl,drive-strength = <MXS_DRIVE_8mA>; - fsl,voltage = <MXS_VOLTAGE_HIGH>; - fsl,pull-up = <MXS_PULL_ENABLE>; + fsl,drive-strength = <1>; + fsl,voltage = <1>; + fsl,pull-up = <1>; }; lcdif_18bit_pins_cfa10055: lcdif-18bit@0 { reg = <0>; fsl,pinmux-ids = < - MX28_PAD_LCD_D00__LCD_D0 - MX28_PAD_LCD_D01__LCD_D1 - MX28_PAD_LCD_D02__LCD_D2 - MX28_PAD_LCD_D03__LCD_D3 - MX28_PAD_LCD_D04__LCD_D4 - MX28_PAD_LCD_D05__LCD_D5 - MX28_PAD_LCD_D06__LCD_D6 - MX28_PAD_LCD_D07__LCD_D7 - MX28_PAD_LCD_D08__LCD_D8 - MX28_PAD_LCD_D09__LCD_D9 - MX28_PAD_LCD_D10__LCD_D10 - MX28_PAD_LCD_D11__LCD_D11 - MX28_PAD_LCD_D12__LCD_D12 - MX28_PAD_LCD_D13__LCD_D13 - MX28_PAD_LCD_D14__LCD_D14 - MX28_PAD_LCD_D15__LCD_D15 - MX28_PAD_LCD_D16__LCD_D16 - MX28_PAD_LCD_D17__LCD_D17 + 0x1000 /* MX28_PAD_LCD_D00__LCD_D0 */ + 0x1010 /* MX28_PAD_LCD_D01__LCD_D1 */ + 0x1020 /* MX28_PAD_LCD_D02__LCD_D2 */ + 0x1030 /* MX28_PAD_LCD_D03__LCD_D3 */ + 0x1040 /* MX28_PAD_LCD_D04__LCD_D4 */ + 0x1050 /* MX28_PAD_LCD_D05__LCD_D5 */ + 0x1060 /* MX28_PAD_LCD_D06__LCD_D6 */ + 0x1070 /* MX28_PAD_LCD_D07__LCD_D7 */ + 0x1080 /* MX28_PAD_LCD_D08__LCD_D8 */ + 0x1090 /* MX28_PAD_LCD_D09__LCD_D9 */ + 0x10a0 /* MX28_PAD_LCD_D10__LCD_D10 */ + 0x10b0 /* MX28_PAD_LCD_D11__LCD_D11 */ + 0x10c0 /* MX28_PAD_LCD_D12__LCD_D12 */ + 0x10d0 /* MX28_PAD_LCD_D13__LCD_D13 */ + 0x10e0 /* MX28_PAD_LCD_D14__LCD_D14 */ + 0x10f0 /* MX28_PAD_LCD_D15__LCD_D15 */ + 0x1100 /* MX28_PAD_LCD_D16__LCD_D16 */ + 0x1110 /* MX28_PAD_LCD_D17__LCD_D17 */ >; - fsl,drive-strength = <MXS_DRIVE_4mA>; - fsl,voltage = <MXS_VOLTAGE_HIGH>; - fsl,pull-up = <MXS_PULL_DISABLE>; + fsl,drive-strength = <0>; + fsl,voltage = <1>; + fsl,pull-up = <0>; }; lcdif_pins_cfa10055: lcdif-evk@0 { reg = <0>; fsl,pinmux-ids = < - MX28_PAD_LCD_RD_E__LCD_VSYNC - MX28_PAD_LCD_WR_RWN__LCD_HSYNC - MX28_PAD_LCD_RS__LCD_DOTCLK - MX28_PAD_LCD_CS__LCD_ENABLE + 0x1181 /* MX28_PAD_LCD_RD_E__LCD_VSYNC */ + 0x1191 /* MX28_PAD_LCD_WR_RWN__LCD_HSYNC */ + 0x11a1 /* MX28_PAD_LCD_RS__LCD_DOTCLK */ + 0x11b1 /* MX28_PAD_LCD_CS__LCD_ENABLE */ >; - fsl,drive-strength = <MXS_DRIVE_4mA>; - fsl,voltage = <MXS_VOLTAGE_HIGH>; - fsl,pull-up = <MXS_PULL_DISABLE>; + fsl,drive-strength = <0>; + fsl,voltage = <1>; + fsl,pull-up = <0>; }; lcdif_pins_cfa10055_pullup: lcdif-10055-pullup@0 { reg = <0>; fsl,pinmux-ids = < - MX28_PAD_LCD_RESET__GPIO_3_30 + 0x31e3 /* MX28_PAD_LCD_RESET__GPIO_3_30 */ >; - fsl,drive-strength = <MXS_DRIVE_4mA>; - fsl,voltage = <MXS_VOLTAGE_HIGH>; - fsl,pull-up = <MXS_PULL_ENABLE>; + fsl,drive-strength = <0>; + fsl,voltage = <1>; + fsl,pull-up = <1>; }; }; diff --git a/arch/arm/boot/dts/imx28-cfa10056.dts b/arch/arm/boot/dts/imx28-cfa10056.dts index cef959a..b45dd0e 100644 --- a/arch/arm/boot/dts/imx28-cfa10056.dts +++ b/arch/arm/boot/dts/imx28-cfa10056.dts @@ -13,7 +13,7 @@ * The CFA-10055 is an expansion board for the CFA-10036 module and * CFA-10037, thus we need to include the CFA-10037 DTS. */ -#include "imx28-cfa10037.dts" +/include/ "imx28-cfa10037.dts" / { model = "Crystalfontz CFA-10056 Board"; @@ -25,37 +25,37 @@ spi2_pins_cfa10056: spi2-cfa10056@0 { reg = <0>; fsl,pinmux-ids = < - MX28_PAD_SSP2_SCK__GPIO_2_16 - MX28_PAD_SSP2_MOSI__GPIO_2_17 - MX28_PAD_SSP2_MISO__GPIO_2_18 - MX28_PAD_AUART1_TX__GPIO_3_5 + 0x2103 /* MX28_PAD_SSP2_SCK__GPIO_2_16 */ + 0x2113 /* MX28_PAD_SSP2_CMD__GPIO_2_17 */ + 0x2123 /* MX28_PAD_SSP2_D0__GPIO_2_18 */ + 0x3053 /* MX28_PAD_AUART1_TX__GPIO_3_5 */ >; - fsl,drive-strength = <MXS_DRIVE_8mA>; - fsl,voltage = <MXS_VOLTAGE_HIGH>; - fsl,pull-up = <MXS_PULL_ENABLE>; + fsl,drive-strength = <1>; + fsl,voltage = <1>; + fsl,pull-up = <1>; }; lcdif_pins_cfa10056: lcdif-10056@0 { reg = <0>; fsl,pinmux-ids = < - MX28_PAD_LCD_RD_E__LCD_VSYNC - MX28_PAD_LCD_WR_RWN__LCD_HSYNC - MX28_PAD_LCD_RS__LCD_DOTCLK - MX28_PAD_LCD_CS__LCD_ENABLE + 0x1181 /* MX28_PAD_LCD_RD_E__LCD_VSYNC */ + 0x1191 /* MX28_PAD_LCD_WR_RWN__LCD_HSYNC */ + 0x11a1 /* MX28_PAD_LCD_RS__LCD_DOTCLK */ + 0x11b1 /* MX28_PAD_LCD_CS__LCD_ENABLE */ >; - fsl,drive-strength = <MXS_DRIVE_4mA>; - fsl,voltage = <MXS_VOLTAGE_HIGH>; - fsl,pull-up = <MXS_PULL_DISABLE>; + fsl,drive-strength = <0>; + fsl,voltage = <1>; + fsl,pull-up = <0>; }; lcdif_pins_cfa10056_pullup: lcdif-10056-pullup@0 { reg = <0>; fsl,pinmux-ids = < - MX28_PAD_LCD_RESET__GPIO_3_30 + 0x31e3 /* MX28_PAD_LCD_RESET__GPIO_3_30 */ >; - fsl,drive-strength = <MXS_DRIVE_4mA>; - fsl,voltage = <MXS_VOLTAGE_HIGH>; - fsl,pull-up = <MXS_PULL_ENABLE>; + fsl,drive-strength = <0>; + fsl,voltage = <1>; + fsl,pull-up = <1>; }; }; diff --git a/arch/arm/boot/dts/imx28-cfa10057.dts b/arch/arm/boot/dts/imx28-cfa10057.dts index 3c13128..0333c05 100644 --- a/arch/arm/boot/dts/imx28-cfa10057.dts +++ b/arch/arm/boot/dts/imx28-cfa10057.dts @@ -14,7 +14,7 @@ * The CFA-10057 is an expansion board for the CFA-10036 module, thus we * need to include the CFA-10036 DTS. */ -#include "imx28-cfa10036.dts" +/include/ "imx28-cfa10036.dts" / { model = "Crystalfontz CFA-10057 Board"; @@ -26,51 +26,51 @@ usb_pins_cfa10057: usb-10057@0 { reg = <0>; fsl,pinmux-ids = < - MX28_PAD_GPMI_D07__GPIO_0_7 + 0x0073 /* MX28_PAD_GPMI_D7__GPIO_0_7 */ >; - fsl,drive-strength = <MXS_DRIVE_4mA>; - fsl,voltage = <MXS_VOLTAGE_HIGH>; - fsl,pull-up = <MXS_PULL_DISABLE>; + fsl,drive-strength = <0>; + fsl,voltage = <1>; + fsl,pull-up = <0>; }; lcdif_18bit_pins_cfa10057: lcdif-18bit@0 { reg = <0>; fsl,pinmux-ids = < - MX28_PAD_LCD_D00__LCD_D0 - MX28_PAD_LCD_D01__LCD_D1 - MX28_PAD_LCD_D02__LCD_D2 - MX28_PAD_LCD_D03__LCD_D3 - MX28_PAD_LCD_D04__LCD_D4 - MX28_PAD_LCD_D05__LCD_D5 - MX28_PAD_LCD_D06__LCD_D6 - MX28_PAD_LCD_D07__LCD_D7 - MX28_PAD_LCD_D08__LCD_D8 - MX28_PAD_LCD_D09__LCD_D9 - MX28_PAD_LCD_D10__LCD_D10 - MX28_PAD_LCD_D11__LCD_D11 - MX28_PAD_LCD_D12__LCD_D12 - MX28_PAD_LCD_D13__LCD_D13 - MX28_PAD_LCD_D14__LCD_D14 - MX28_PAD_LCD_D15__LCD_D15 - MX28_PAD_LCD_D16__LCD_D16 - MX28_PAD_LCD_D17__LCD_D17 + 0x1000 /* MX28_PAD_LCD_D00__LCD_D0 */ + 0x1010 /* MX28_PAD_LCD_D01__LCD_D1 */ + 0x1020 /* MX28_PAD_LCD_D02__LCD_D2 */ + 0x1030 /* MX28_PAD_LCD_D03__LCD_D3 */ + 0x1040 /* MX28_PAD_LCD_D04__LCD_D4 */ + 0x1050 /* MX28_PAD_LCD_D05__LCD_D5 */ + 0x1060 /* MX28_PAD_LCD_D06__LCD_D6 */ + 0x1070 /* MX28_PAD_LCD_D07__LCD_D7 */ + 0x1080 /* MX28_PAD_LCD_D08__LCD_D8 */ + 0x1090 /* MX28_PAD_LCD_D09__LCD_D9 */ + 0x10a0 /* MX28_PAD_LCD_D10__LCD_D10 */ + 0x10b0 /* MX28_PAD_LCD_D11__LCD_D11 */ + 0x10c0 /* MX28_PAD_LCD_D12__LCD_D12 */ + 0x10d0 /* MX28_PAD_LCD_D13__LCD_D13 */ + 0x10e0 /* MX28_PAD_LCD_D14__LCD_D14 */ + 0x10f0 /* MX28_PAD_LCD_D15__LCD_D15 */ + 0x1100 /* MX28_PAD_LCD_D16__LCD_D16 */ + 0x1110 /* MX28_PAD_LCD_D17__LCD_D17 */ >; - fsl,drive-strength = <MXS_DRIVE_4mA>; - fsl,voltage = <MXS_VOLTAGE_HIGH>; - fsl,pull-up = <MXS_PULL_DISABLE>; + fsl,drive-strength = <0>; + fsl,voltage = <1>; + fsl,pull-up = <0>; }; lcdif_pins_cfa10057: lcdif-evk@0 { reg = <0>; fsl,pinmux-ids = < - MX28_PAD_LCD_RD_E__LCD_VSYNC - MX28_PAD_LCD_WR_RWN__LCD_HSYNC - MX28_PAD_LCD_RS__LCD_DOTCLK - MX28_PAD_LCD_CS__LCD_ENABLE + 0x1181 /* MX28_PAD_LCD_RD_E__LCD_VSYNC */ + 0x1191 /* MX28_PAD_LCD_WR_RWN__LCD_HSYNC */ + 0x11a1 /* MX28_PAD_LCD_RS__LCD_DOTCLK */ + 0x11b1 /* MX28_PAD_LCD_CS__LCD_ENABLE */ >; - fsl,drive-strength = <MXS_DRIVE_4mA>; - fsl,voltage = <MXS_VOLTAGE_HIGH>; - fsl,pull-up = <MXS_PULL_DISABLE>; + fsl,drive-strength = <0>; + fsl,voltage = <1>; + fsl,pull-up = <0>; }; }; diff --git a/arch/arm/boot/dts/imx28-cfa10058.dts b/arch/arm/boot/dts/imx28-cfa10058.dts index 2469d34..64c64c5 100644 --- a/arch/arm/boot/dts/imx28-cfa10058.dts +++ b/arch/arm/boot/dts/imx28-cfa10058.dts @@ -14,7 +14,7 @@ * The CFA-10058 is an expansion board for the CFA-10036 module, thus we * need to include the CFA-10036 DTS. */ -#include "imx28-cfa10036.dts" +/include/ "imx28-cfa10036.dts" / { model = "Crystalfontz CFA-10058 Board"; @@ -26,24 +26,24 @@ usb_pins_cfa10058: usb-10058@0 { reg = <0>; fsl,pinmux-ids = < - MX28_PAD_GPMI_D07__GPIO_0_7 + 0x0073 /* MX28_PAD_GPMI_D7__GPIO_0_7 */ >; - fsl,drive-strength = <MXS_DRIVE_4mA>; - fsl,voltage = <MXS_VOLTAGE_HIGH>; - fsl,pull-up = <MXS_PULL_DISABLE>; + fsl,drive-strength = <0>; + fsl,voltage = <1>; + fsl,pull-up = <0>; }; lcdif_pins_cfa10058: lcdif-10058@0 { reg = <0>; fsl,pinmux-ids = < - MX28_PAD_LCD_RD_E__LCD_VSYNC - MX28_PAD_LCD_WR_RWN__LCD_HSYNC - MX28_PAD_LCD_RS__LCD_DOTCLK - MX28_PAD_LCD_CS__LCD_ENABLE + 0x1181 /* MX28_PAD_LCD_RD_E__LCD_VSYNC */ + 0x1191 /* MX28_PAD_LCD_WR_RWN__LCD_HSYNC */ + 0x11a1 /* MX28_PAD_LCD_RS__LCD_DOTCLK */ + 0x11b1 /* MX28_PAD_LCD_CS__LCD_ENABLE */ >; - fsl,drive-strength = <MXS_DRIVE_4mA>; - fsl,voltage = <MXS_VOLTAGE_HIGH>; - fsl,pull-up = <MXS_PULL_DISABLE>; + fsl,drive-strength = <0>; + fsl,voltage = <1>; + fsl,pull-up = <0>; }; }; diff --git a/arch/arm/boot/dts/imx28-evk.dts b/arch/arm/boot/dts/imx28-evk.dts index 4267c2b..15715d9 100644 --- a/arch/arm/boot/dts/imx28-evk.dts +++ b/arch/arm/boot/dts/imx28-evk.dts @@ -10,7 +10,7 @@ */ /dts-v1/; -#include "imx28.dtsi" +/include/ "imx28.dtsi" / { model = "Freescale i.MX28 Evaluation Kit"; @@ -70,52 +70,52 @@ hog_pins_a: hog@0 { reg = <0>; fsl,pinmux-ids = < - MX28_PAD_SSP1_CMD__GPIO_2_13 - MX28_PAD_SSP1_DATA3__GPIO_2_15 - MX28_PAD_ENET0_RX_CLK__GPIO_4_13 - MX28_PAD_SSP1_SCK__GPIO_2_12 - MX28_PAD_PWM3__GPIO_3_28 - MX28_PAD_LCD_RESET__GPIO_3_30 - MX28_PAD_AUART2_RX__GPIO_3_8 - MX28_PAD_AUART2_TX__GPIO_3_9 + 0x20d3 /* MX28_PAD_SSP1_CMD__GPIO_2_13 */ + 0x20f3 /* MX28_PAD_SSP1_DATA3__GPIO_2_15 */ + 0x40d3 /* MX28_PAD_ENET0_RX_CLK__GPIO_4_13 */ + 0x20c3 /* MX28_PAD_SSP1_SCK__GPIO_2_12 */ + 0x31c3 /* MX28_PAD_PWM3__GPIO_3_28 */ + 0x31e3 /* MX28_PAD_LCD_RESET__GPIO_3_30 */ + 0x3083 /* MX28_PAD_AUART2_RX__GPIO_3_8 */ + 0x3093 /* MX28_PAD_AUART2_TX__GPIO_3_9 */ >; - fsl,drive-strength = <MXS_DRIVE_4mA>; - fsl,voltage = <MXS_VOLTAGE_HIGH>; - fsl,pull-up = <MXS_PULL_DISABLE>; + fsl,drive-strength = <0>; + fsl,voltage = <1>; + fsl,pull-up = <0>; }; led_pin_gpio3_5: led_gpio3_5@0 { reg = <0>; fsl,pinmux-ids = < - MX28_PAD_AUART1_TX__GPIO_3_5 + 0x3053 /* MX28_PAD_AUART1_TX__GPIO_3_5 */ >; - fsl,drive-strength = <MXS_DRIVE_4mA>; - fsl,voltage = <MXS_VOLTAGE_HIGH>; - fsl,pull-up = <MXS_PULL_DISABLE>; + fsl,drive-strength = <0>; + fsl,voltage = <1>; + fsl,pull-up = <0>; }; gpmi_pins_evk: gpmi-nand-evk@0 { reg = <0>; fsl,pinmux-ids = < - MX28_PAD_GPMI_CE1N__GPMI_CE1N - MX28_PAD_GPMI_RDY1__GPMI_READY1 + 0x0110 /* MX28_PAD_GPMI_CE1N__GPMI_CE1N */ + 0x0150 /* MX28_PAD_GPMI_RDY1__GPMI_READY1 */ >; - fsl,drive-strength = <MXS_DRIVE_4mA>; - fsl,voltage = <MXS_VOLTAGE_HIGH>; - fsl,pull-up = <MXS_PULL_DISABLE>; + fsl,drive-strength = <0>; + fsl,voltage = <1>; + fsl,pull-up = <0>; }; lcdif_pins_evk: lcdif-evk@0 { reg = <0>; fsl,pinmux-ids = < - MX28_PAD_LCD_RD_E__LCD_VSYNC - MX28_PAD_LCD_WR_RWN__LCD_HSYNC - MX28_PAD_LCD_RS__LCD_DOTCLK - MX28_PAD_LCD_CS__LCD_ENABLE + 0x1181 /* MX28_PAD_LCD_RD_E__LCD_VSYNC */ + 0x1191 /* MX28_PAD_LCD_WR_RWN__LCD_HSYNC */ + 0x11a1 /* MX28_PAD_LCD_RS__LCD_DOTCLK */ + 0x11b1 /* MX28_PAD_LCD_CS__LCD_ENABLE */ >; - fsl,drive-strength = <MXS_DRIVE_4mA>; - fsl,voltage = <MXS_VOLTAGE_HIGH>; - fsl,pull-up = <MXS_PULL_DISABLE>; + fsl,drive-strength = <0>; + fsl,voltage = <1>; + fsl,pull-up = <0>; }; }; @@ -182,12 +182,7 @@ }; lradc@80050000 { - fsl,lradc-touchscreen-wires = <4>; status = "okay"; - fsl,lradc-touchscreen-wires = <4>; - fsl,ave-ctrl = <4>; - fsl,ave-delay = <2>; - fsl,settling = <10>; }; i2c0: i2c@80058000 { @@ -247,8 +242,6 @@ ahb@80080000 { usb0: usb@80080000 { - pinctrl-names = "default"; - pinctrl-0 = <&usb0_id_pins_a>; vbus-supply = <®_usb0_vbus>; status = "okay"; }; diff --git a/arch/arm/boot/dts/imx28-m28cu3.dts b/arch/arm/boot/dts/imx28-m28cu3.dts deleted file mode 100644 index d3958da..0000000 --- a/arch/arm/boot/dts/imx28-m28cu3.dts +++ /dev/null @@ -1,266 +0,0 @@ -/* - * Copyright (C) 2013 Marek Vasut <marex@denx.de> - * - * The code contained herein is licensed under the GNU General Public - * License. You may obtain a copy of the GNU General Public License - * Version 2 or later at the following locations: - * - * http://www.opensource.org/licenses/gpl-license.html - * http://www.gnu.org/copyleft/gpl.html - */ - -/dts-v1/; -#include "imx28.dtsi" - -/ { - model = "MSR M28CU3"; - compatible = "msr,m28cu3", "fsl,imx28"; - - memory { - reg = <0x40000000 0x08000000>; - }; - - apb@80000000 { - apbh@80000000 { - gpmi-nand@8000c000 { - #address-cells = <1>; - #size-cells = <1>; - pinctrl-names = "default"; - pinctrl-0 = <&gpmi_pins_a &gpmi_status_cfg>; - status = "okay"; - - partition@0 { - label = "gpmi-nfc-0-boot"; - reg = <0x00000000 0x01400000>; - read-only; - }; - - partition@1 { - label = "gpmi-nfc-general-use"; - reg = <0x01400000 0x0ec00000>; - }; - }; - - ssp0: ssp@80010000 { - compatible = "fsl,imx28-mmc"; - pinctrl-names = "default"; - pinctrl-0 = <&mmc0_4bit_pins_a - &mmc0_cd_cfg - &mmc0_sck_cfg>; - bus-width = <4>; - vmmc-supply = <®_vddio_sd0>; - status = "okay"; - }; - - ssp2: ssp@80014000 { - compatible = "fsl,imx28-mmc"; - pinctrl-names = "default"; - pinctrl-0 = <&mmc2_4bit_pins_a - &mmc2_cd_cfg - &mmc2_sck_cfg>; - bus-width = <4>; - vmmc-supply = <®_vddio_sd1>; - status = "okay"; - }; - - pinctrl@80018000 { - pinctrl-names = "default"; - pinctrl-0 = <&hog_pins_a>; - - hog_pins_a: hog@0 { - reg = <0>; - fsl,pinmux-ids = < - MX28_PAD_SSP2_SS0__GPIO_2_19 - MX28_PAD_PWM4__GPIO_3_29 - MX28_PAD_AUART2_RX__GPIO_3_8 - MX28_PAD_ENET0_RX_CLK__GPIO_4_13 - >; - fsl,drive-strength = <MXS_DRIVE_4mA>; - fsl,voltage = <MXS_VOLTAGE_HIGH>; - fsl,pull-up = <MXS_PULL_DISABLE>; - }; - - lcdif_pins_m28: lcdif-m28@0 { - reg = <0>; - fsl,pinmux-ids = < - MX28_PAD_LCD_VSYNC__LCD_VSYNC - MX28_PAD_LCD_HSYNC__LCD_HSYNC - MX28_PAD_LCD_DOTCLK__LCD_DOTCLK - MX28_PAD_LCD_RESET__LCD_RESET - MX28_PAD_LCD_CS__LCD_ENABLE - MX28_PAD_AUART1_TX__GPIO_3_5 - >; - fsl,drive-strength = <MXS_DRIVE_4mA>; - fsl,voltage = <MXS_VOLTAGE_HIGH>; - fsl,pull-up = <MXS_PULL_DISABLE>; - }; - - led_pins_gpio: leds-m28@0 { - reg = <0>; - fsl,pinmux-ids = < - MX28_PAD_SSP3_MISO__GPIO_2_26 - MX28_PAD_SSP3_SCK__GPIO_2_24 - >; - fsl,drive-strength = <MXS_DRIVE_4mA>; - fsl,voltage = <MXS_VOLTAGE_HIGH>; - fsl,pull-up = <MXS_PULL_DISABLE>; - }; - }; - - ocotp@8002c000 { - status = "okay"; - }; - - lcdif@80030000 { - pinctrl-names = "default"; - pinctrl-0 = <&lcdif_24bit_pins_a - &lcdif_pins_m28>; - display = <&display>; - reset-active-high; - status = "okay"; - - display: display0 { - bits-per-pixel = <32>; - bus-width = <24>; - - display-timings { - native-mode = <&timing0>; - timing0: timing0 { - clock-frequency = <6410256>; - hactive = <320>; - vactive = <240>; - hback-porch = <38>; - hfront-porch = <20>; - vback-porch = <15>; - vfront-porch = <5>; - hsync-len = <30>; - vsync-len = <3>; - hsync-active = <0>; - vsync-active = <0>; - de-active = <1>; - pixelclk-active = <1>; - }; - }; - }; - }; - }; - - apbx@80040000 { - duart: serial@80074000 { - pinctrl-names = "default"; - pinctrl-0 = <&duart_pins_b>; - status = "okay"; - }; - - usbphy1: usbphy@8007e000 { - status = "okay"; - }; - - auart0: serial@8006a000 { - pinctrl-names = "default"; - pinctrl-0 = <&auart0_2pins_a>; - status = "okay"; - }; - - auart3: serial@80070000 { - pinctrl-names = "default"; - pinctrl-0 = <&auart3_2pins_b>; - status = "okay"; - }; - - pwm: pwm@80064000 { - pinctrl-names = "default"; - pinctrl-0 = <&pwm3_pins_a>; - status = "okay"; - }; - }; - }; - - ahb@80080000 { - usb1: usb@80090000 { - vbus-supply = <®_usb1_vbus>; - pinctrl-names = "default"; - pinctrl-0 = <&usbphy1_pins_a>; - disable-over-current; - status = "okay"; - }; - - mac0: ethernet@800f0000 { - phy-mode = "rmii"; - pinctrl-names = "default"; - pinctrl-0 = <&mac0_pins_a>; - phy-reset-gpios = <&gpio4 13 0>; - phy-reset-duration = <100>; - status = "okay"; - }; - - mac1: ethernet@800f4000 { - phy-mode = "rmii"; - pinctrl-names = "default"; - pinctrl-0 = <&mac1_pins_a>; - status = "okay"; - }; - }; - - backlight { - compatible = "pwm-backlight"; - pwms = <&pwm 3 5000000>; - brightness-levels = <0 4 8 16 32 64 128 255>; - default-brightness-level = <6>; - }; - - leds { - compatible = "gpio-leds"; - pinctrl-names = "default"; - pinctrl-0 = <&led_pins_gpio>; - - user1 { - label = "sd0-led"; - gpios = <&gpio2 26 0>; - linux,default-trigger = "mmc0"; - }; - - user2 { - label = "sd1-led"; - gpios = <&gpio2 24 0>; - linux,default-trigger = "mmc2"; - }; - }; - - regulators { - compatible = "simple-bus"; - - reg_3p3v: 3p3v { - compatible = "regulator-fixed"; - regulator-name = "3P3V"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - }; - - reg_vddio_sd0: vddio-sd0 { - compatible = "regulator-fixed"; - regulator-name = "vddio-sd0"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - gpio = <&gpio3 29 0>; - }; - - reg_vddio_sd1: vddio-sd1 { - compatible = "regulator-fixed"; - regulator-name = "vddio-sd1"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - gpio = <&gpio2 19 0>; - }; - - reg_usb1_vbus: usb1_vbus { - compatible = "regulator-fixed"; - regulator-name = "usb1_vbus"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - gpio = <&gpio3 8 0>; - enable-active-high; - }; - }; -}; diff --git a/arch/arm/boot/dts/imx28-m28evk.dts b/arch/arm/boot/dts/imx28-m28evk.dts index 8e2477f..0d322a2 100644 --- a/arch/arm/boot/dts/imx28-m28evk.dts +++ b/arch/arm/boot/dts/imx28-m28evk.dts @@ -10,7 +10,7 @@ */ /dts-v1/; -#include "imx28.dtsi" +/include/ "imx28.dtsi" / { model = "DENX M28EVK"; @@ -92,26 +92,26 @@ hog_pins_a: hog@0 { reg = <0>; fsl,pinmux-ids = < - MX28_PAD_PWM3__GPIO_3_28 - MX28_PAD_AUART2_CTS__GPIO_3_10 - MX28_PAD_AUART2_RTS__GPIO_3_11 - MX28_PAD_AUART3_RX__GPIO_3_12 - MX28_PAD_AUART3_TX__GPIO_3_13 + 0x31c3 /* MX28_PAD_PWM3__GPIO_3_28 */ + 0x30a3 /* MX28_PAD_AUART2_CTS__GPIO_3_10 */ + 0x30b3 /* MX28_PAD_AUART2_RTS__GPIO_3_11 */ + 0x30c3 /* MX28_PAD_AUART3_RX__GPIO_3_12 */ + 0x30d3 /* MX28_PAD_AUART3_TX__GPIO_3_13 */ >; - fsl,drive-strength = <MXS_DRIVE_4mA>; - fsl,voltage = <MXS_VOLTAGE_HIGH>; - fsl,pull-up = <MXS_PULL_DISABLE>; + fsl,drive-strength = <0>; + fsl,voltage = <1>; + fsl,pull-up = <0>; }; lcdif_pins_m28: lcdif-m28@0 { reg = <0>; fsl,pinmux-ids = < - MX28_PAD_LCD_DOTCLK__LCD_DOTCLK - MX28_PAD_LCD_ENABLE__LCD_ENABLE + 0x11e0 /* MX28_PAD_LCD_DOTCLK__LCD_DOTCLK */ + 0x11f0 /* MX28_PAD_LCD_ENABLE__LCD_ENABLE */ >; - fsl,drive-strength = <MXS_DRIVE_4mA>; - fsl,voltage = <MXS_VOLTAGE_HIGH>; - fsl,pull-up = <MXS_PULL_DISABLE>; + fsl,drive-strength = <0>; + fsl,voltage = <1>; + fsl,pull-up = <0>; }; }; diff --git a/arch/arm/boot/dts/imx28-pinfunc.h b/arch/arm/boot/dts/imx28-pinfunc.h deleted file mode 100644 index e11f69b..0000000 --- a/arch/arm/boot/dts/imx28-pinfunc.h +++ /dev/null @@ -1,506 +0,0 @@ -/* - * Header providing constants for i.MX28 pinctrl bindings. - * - * Copyright (C) 2013 Lothar Waßmann <LW@KARO-electronics.de> - * - * The code contained herein is licensed under the GNU General Public - * License. You may obtain a copy of the GNU General Public License - * Version 2 at the following locations: - * - * http://www.opensource.org/licenses/gpl-license.html - * http://www.gnu.org/copyleft/gpl.html - */ - -#ifndef __DT_BINDINGS_MX28_PINCTRL_H__ -#define __DT_BINDINGS_MX28_PINCTRL_H__ - -#include "mxs-pinfunc.h" - -#define MX28_PAD_GPMI_D00__GPMI_D0 0x0000 -#define MX28_PAD_GPMI_D01__GPMI_D1 0x0010 -#define MX28_PAD_GPMI_D02__GPMI_D2 0x0020 -#define MX28_PAD_GPMI_D03__GPMI_D3 0x0030 -#define MX28_PAD_GPMI_D04__GPMI_D4 0x0040 -#define MX28_PAD_GPMI_D05__GPMI_D5 0x0050 -#define MX28_PAD_GPMI_D06__GPMI_D6 0x0060 -#define MX28_PAD_GPMI_D07__GPMI_D7 0x0070 -#define MX28_PAD_GPMI_CE0N__GPMI_CE0N 0x0100 -#define MX28_PAD_GPMI_CE1N__GPMI_CE1N 0x0110 -#define MX28_PAD_GPMI_CE2N__GPMI_CE2N 0x0120 -#define MX28_PAD_GPMI_CE3N__GPMI_CE3N 0x0130 -#define MX28_PAD_GPMI_RDY0__GPMI_READY0 0x0140 -#define MX28_PAD_GPMI_RDY1__GPMI_READY1 0x0150 -#define MX28_PAD_GPMI_RDY2__GPMI_READY2 0x0160 -#define MX28_PAD_GPMI_RDY3__GPMI_READY3 0x0170 -#define MX28_PAD_GPMI_RDN__GPMI_RDN 0x0180 -#define MX28_PAD_GPMI_WRN__GPMI_WRN 0x0190 -#define MX28_PAD_GPMI_ALE__GPMI_ALE 0x01a0 -#define MX28_PAD_GPMI_CLE__GPMI_CLE 0x01b0 -#define MX28_PAD_GPMI_RESETN__GPMI_RESETN 0x01c0 -#define MX28_PAD_LCD_D00__LCD_D0 0x1000 -#define MX28_PAD_LCD_D01__LCD_D1 0x1010 -#define MX28_PAD_LCD_D02__LCD_D2 0x1020 -#define MX28_PAD_LCD_D03__LCD_D3 0x1030 -#define MX28_PAD_LCD_D04__LCD_D4 0x1040 -#define MX28_PAD_LCD_D05__LCD_D5 0x1050 -#define MX28_PAD_LCD_D06__LCD_D6 0x1060 -#define MX28_PAD_LCD_D07__LCD_D7 0x1070 -#define MX28_PAD_LCD_D08__LCD_D8 0x1080 -#define MX28_PAD_LCD_D09__LCD_D9 0x1090 -#define MX28_PAD_LCD_D10__LCD_D10 0x10a0 -#define MX28_PAD_LCD_D11__LCD_D11 0x10b0 -#define MX28_PAD_LCD_D12__LCD_D12 0x10c0 -#define MX28_PAD_LCD_D13__LCD_D13 0x10d0 -#define MX28_PAD_LCD_D14__LCD_D14 0x10e0 -#define MX28_PAD_LCD_D15__LCD_D15 0x10f0 -#define MX28_PAD_LCD_D16__LCD_D16 0x1100 -#define MX28_PAD_LCD_D17__LCD_D17 0x1110 -#define MX28_PAD_LCD_D18__LCD_D18 0x1120 -#define MX28_PAD_LCD_D19__LCD_D19 0x1130 -#define MX28_PAD_LCD_D20__LCD_D20 0x1140 -#define MX28_PAD_LCD_D21__LCD_D21 0x1150 -#define MX28_PAD_LCD_D22__LCD_D22 0x1160 -#define MX28_PAD_LCD_D23__LCD_D23 0x1170 -#define MX28_PAD_LCD_RD_E__LCD_RD_E 0x1180 -#define MX28_PAD_LCD_WR_RWN__LCD_WR_RWN 0x1190 -#define MX28_PAD_LCD_RS__LCD_RS 0x11a0 -#define MX28_PAD_LCD_CS__LCD_CS 0x11b0 -#define MX28_PAD_LCD_VSYNC__LCD_VSYNC 0x11c0 -#define MX28_PAD_LCD_HSYNC__LCD_HSYNC 0x11d0 -#define MX28_PAD_LCD_DOTCLK__LCD_DOTCLK 0x11e0 -#define MX28_PAD_LCD_ENABLE__LCD_ENABLE 0x11f0 -#define MX28_PAD_SSP0_DATA0__SSP0_D0 0x2000 -#define MX28_PAD_SSP0_DATA1__SSP0_D1 0x2010 -#define MX28_PAD_SSP0_DATA2__SSP0_D2 0x2020 -#define MX28_PAD_SSP0_DATA3__SSP0_D3 0x2030 -#define MX28_PAD_SSP0_DATA4__SSP0_D4 0x2040 -#define MX28_PAD_SSP0_DATA5__SSP0_D5 0x2050 -#define MX28_PAD_SSP0_DATA6__SSP0_D6 0x2060 -#define MX28_PAD_SSP0_DATA7__SSP0_D7 0x2070 -#define MX28_PAD_SSP0_CMD__SSP0_CMD 0x2080 -#define MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT 0x2090 -#define MX28_PAD_SSP0_SCK__SSP0_SCK 0x20a0 -#define MX28_PAD_SSP1_SCK__SSP1_SCK 0x20c0 -#define MX28_PAD_SSP1_CMD__SSP1_CMD 0x20d0 -#define MX28_PAD_SSP1_DATA0__SSP1_D0 0x20e0 -#define MX28_PAD_SSP1_DATA3__SSP1_D3 0x20f0 -#define MX28_PAD_SSP2_SCK__SSP2_SCK 0x2100 -#define MX28_PAD_SSP2_MOSI__SSP2_CMD 0x2110 -#define MX28_PAD_SSP2_MISO__SSP2_D0 0x2120 -#define MX28_PAD_SSP2_SS0__SSP2_D3 0x2130 -#define MX28_PAD_SSP2_SS1__SSP2_D4 0x2140 -#define MX28_PAD_SSP2_SS2__SSP2_D5 0x2150 -#define MX28_PAD_SSP3_SCK__SSP3_SCK 0x2180 -#define MX28_PAD_SSP3_MOSI__SSP3_CMD 0x2190 -#define MX28_PAD_SSP3_MISO__SSP3_D0 0x21a0 -#define MX28_PAD_SSP3_SS0__SSP3_D3 0x21b0 -#define MX28_PAD_AUART0_RX__AUART0_RX 0x3000 -#define MX28_PAD_AUART0_TX__AUART0_TX 0x3010 -#define MX28_PAD_AUART0_CTS__AUART0_CTS 0x3020 -#define MX28_PAD_AUART0_RTS__AUART0_RTS 0x3030 -#define MX28_PAD_AUART1_RX__AUART1_RX 0x3040 -#define MX28_PAD_AUART1_TX__AUART1_TX 0x3050 -#define MX28_PAD_AUART1_CTS__AUART1_CTS 0x3060 -#define MX28_PAD_AUART1_RTS__AUART1_RTS 0x3070 -#define MX28_PAD_AUART2_RX__AUART2_RX 0x3080 -#define MX28_PAD_AUART2_TX__AUART2_TX 0x3090 -#define MX28_PAD_AUART2_CTS__AUART2_CTS 0x30a0 -#define MX28_PAD_AUART2_RTS__AUART2_RTS 0x30b0 -#define MX28_PAD_AUART3_RX__AUART3_RX 0x30c0 -#define MX28_PAD_AUART3_TX__AUART3_TX 0x30d0 -#define MX28_PAD_AUART3_CTS__AUART3_CTS 0x30e0 -#define MX28_PAD_AUART3_RTS__AUART3_RTS 0x30f0 -#define MX28_PAD_PWM0__PWM_0 0x3100 -#define MX28_PAD_PWM1__PWM_1 0x3110 -#define MX28_PAD_PWM2__PWM_2 0x3120 -#define MX28_PAD_SAIF0_MCLK__SAIF0_MCLK 0x3140 -#define MX28_PAD_SAIF0_LRCLK__SAIF0_LRCLK 0x3150 -#define MX28_PAD_SAIF0_BITCLK__SAIF0_BITCLK 0x3160 -#define MX28_PAD_SAIF0_SDATA0__SAIF0_SDATA0 0x3170 -#define MX28_PAD_I2C0_SCL__I2C0_SCL 0x3180 -#define MX28_PAD_I2C0_SDA__I2C0_SDA 0x3190 -#define MX28_PAD_SAIF1_SDATA0__SAIF1_SDATA0 0x31a0 -#define MX28_PAD_SPDIF__SPDIF_TX 0x31b0 -#define MX28_PAD_PWM3__PWM_3 0x31c0 -#define MX28_PAD_PWM4__PWM_4 0x31d0 -#define MX28_PAD_LCD_RESET__LCD_RESET 0x31e0 -#define MX28_PAD_ENET0_MDC__ENET0_MDC 0x4000 -#define MX28_PAD_ENET0_MDIO__ENET0_MDIO 0x4010 -#define MX28_PAD_ENET0_RX_EN__ENET0_RX_EN 0x4020 -#define MX28_PAD_ENET0_RXD0__ENET0_RXD0 0x4030 -#define MX28_PAD_ENET0_RXD1__ENET0_RXD1 0x4040 -#define MX28_PAD_ENET0_TX_CLK__ENET0_TX_CLK 0x4050 -#define MX28_PAD_ENET0_TX_EN__ENET0_TX_EN 0x4060 -#define MX28_PAD_ENET0_TXD0__ENET0_TXD0 0x4070 -#define MX28_PAD_ENET0_TXD1__ENET0_TXD1 0x4080 -#define MX28_PAD_ENET0_RXD2__ENET0_RXD2 0x4090 -#define MX28_PAD_ENET0_RXD3__ENET0_RXD3 0x40a0 -#define MX28_PAD_ENET0_TXD2__ENET0_TXD2 0x40b0 -#define MX28_PAD_ENET0_TXD3__ENET0_TXD3 0x40c0 -#define MX28_PAD_ENET0_RX_CLK__ENET0_RX_CLK 0x40d0 -#define MX28_PAD_ENET0_COL__ENET0_COL 0x40e0 -#define MX28_PAD_ENET0_CRS__ENET0_CRS 0x40f0 -#define MX28_PAD_ENET_CLK__CLKCTRL_ENET 0x4100 -#define MX28_PAD_JTAG_RTCK__JTAG_RTCK 0x4140 -#define MX28_PAD_EMI_D00__EMI_DATA0 0x5000 -#define MX28_PAD_EMI_D01__EMI_DATA1 0x5010 -#define MX28_PAD_EMI_D02__EMI_DATA2 0x5020 -#define MX28_PAD_EMI_D03__EMI_DATA3 0x5030 -#define MX28_PAD_EMI_D04__EMI_DATA4 0x5040 -#define MX28_PAD_EMI_D05__EMI_DATA5 0x5050 -#define MX28_PAD_EMI_D06__EMI_DATA6 0x5060 -#define MX28_PAD_EMI_D07__EMI_DATA7 0x5070 -#define MX28_PAD_EMI_D08__EMI_DATA8 0x5080 -#define MX28_PAD_EMI_D09__EMI_DATA9 0x5090 -#define MX28_PAD_EMI_D10__EMI_DATA10 0x50a0 -#define MX28_PAD_EMI_D11__EMI_DATA11 0x50b0 -#define MX28_PAD_EMI_D12__EMI_DATA12 0x50c0 -#define MX28_PAD_EMI_D13__EMI_DATA13 0x50d0 -#define MX28_PAD_EMI_D14__EMI_DATA14 0x50e0 -#define MX28_PAD_EMI_D15__EMI_DATA15 0x50f0 -#define MX28_PAD_EMI_ODT0__EMI_ODT0 0x5100 -#define MX28_PAD_EMI_DQM0__EMI_DQM0 0x5110 -#define MX28_PAD_EMI_ODT1__EMI_ODT1 0x5120 -#define MX28_PAD_EMI_DQM1__EMI_DQM1 0x5130 -#define MX28_PAD_EMI_DDR_OPEN_FB__EMI_DDR_OPEN_FEEDBACK 0x5140 -#define MX28_PAD_EMI_CLK__EMI_CLK 0x5150 -#define MX28_PAD_EMI_DQS0__EMI_DQS0 0x5160 -#define MX28_PAD_EMI_DQS1__EMI_DQS1 0x5170 -#define MX28_PAD_EMI_DDR_OPEN__EMI_DDR_OPEN 0x51a0 -#define MX28_PAD_EMI_A00__EMI_ADDR0 0x6000 -#define MX28_PAD_EMI_A01__EMI_ADDR1 0x6010 -#define MX28_PAD_EMI_A02__EMI_ADDR2 0x6020 -#define MX28_PAD_EMI_A03__EMI_ADDR3 0x6030 -#define MX28_PAD_EMI_A04__EMI_ADDR4 0x6040 -#define MX28_PAD_EMI_A05__EMI_ADDR5 0x6050 -#define MX28_PAD_EMI_A06__EMI_ADDR6 0x6060 -#define MX28_PAD_EMI_A07__EMI_ADDR7 0x6070 -#define MX28_PAD_EMI_A08__EMI_ADDR8 0x6080 -#define MX28_PAD_EMI_A09__EMI_ADDR9 0x6090 -#define MX28_PAD_EMI_A10__EMI_ADDR10 0x60a0 -#define MX28_PAD_EMI_A11__EMI_ADDR11 0x60b0 -#define MX28_PAD_EMI_A12__EMI_ADDR12 0x60c0 -#define MX28_PAD_EMI_A13__EMI_ADDR13 0x60d0 -#define MX28_PAD_EMI_A14__EMI_ADDR14 0x60e0 -#define MX28_PAD_EMI_BA0__EMI_BA0 0x6100 -#define MX28_PAD_EMI_BA1__EMI_BA1 0x6110 -#define MX28_PAD_EMI_BA2__EMI_BA2 0x6120 -#define MX28_PAD_EMI_CASN__EMI_CASN 0x6130 -#define MX28_PAD_EMI_RASN__EMI_RASN 0x6140 -#define MX28_PAD_EMI_WEN__EMI_WEN 0x6150 -#define MX28_PAD_EMI_CE0N__EMI_CE0N 0x6160 -#define MX28_PAD_EMI_CE1N__EMI_CE1N 0x6170 -#define MX28_PAD_EMI_CKE__EMI_CKE 0x6180 -#define MX28_PAD_GPMI_D00__SSP1_D0 0x0001 -#define MX28_PAD_GPMI_D01__SSP1_D1 0x0011 -#define MX28_PAD_GPMI_D02__SSP1_D2 0x0021 -#define MX28_PAD_GPMI_D03__SSP1_D3 0x0031 -#define MX28_PAD_GPMI_D04__SSP1_D4 0x0041 -#define MX28_PAD_GPMI_D05__SSP1_D5 0x0051 -#define MX28_PAD_GPMI_D06__SSP1_D6 0x0061 -#define MX28_PAD_GPMI_D07__SSP1_D7 0x0071 -#define MX28_PAD_GPMI_CE0N__SSP3_D0 0x0101 -#define MX28_PAD_GPMI_CE1N__SSP3_D3 0x0111 -#define MX28_PAD_GPMI_CE2N__CAN1_TX 0x0121 -#define MX28_PAD_GPMI_CE3N__CAN1_RX 0x0131 -#define MX28_PAD_GPMI_RDY0__SSP1_CARD_DETECT 0x0141 -#define MX28_PAD_GPMI_RDY1__SSP1_CMD 0x0151 -#define MX28_PAD_GPMI_RDY2__CAN0_TX 0x0161 -#define MX28_PAD_GPMI_RDY3__CAN0_RX 0x0171 -#define MX28_PAD_GPMI_RDN__SSP3_SCK 0x0181 -#define MX28_PAD_GPMI_WRN__SSP1_SCK 0x0191 -#define MX28_PAD_GPMI_ALE__SSP3_D1 0x01a1 -#define MX28_PAD_GPMI_CLE__SSP3_D2 0x01b1 -#define MX28_PAD_GPMI_RESETN__SSP3_CMD 0x01c1 -#define MX28_PAD_LCD_D03__ETM_DA8 0x1031 -#define MX28_PAD_LCD_D04__ETM_DA9 0x1041 -#define MX28_PAD_LCD_D08__ETM_DA3 0x1081 -#define MX28_PAD_LCD_D09__ETM_DA4 0x1091 -#define MX28_PAD_LCD_D20__ENET1_1588_EVENT2_OUT 0x1141 -#define MX28_PAD_LCD_D21__ENET1_1588_EVENT2_IN 0x1151 -#define MX28_PAD_LCD_D22__ENET1_1588_EVENT3_OUT 0x1161 -#define MX28_PAD_LCD_D23__ENET1_1588_EVENT3_IN 0x1171 -#define MX28_PAD_LCD_RD_E__LCD_VSYNC 0x1181 -#define MX28_PAD_LCD_WR_RWN__LCD_HSYNC 0x1191 -#define MX28_PAD_LCD_RS__LCD_DOTCLK 0x11a1 -#define MX28_PAD_LCD_CS__LCD_ENABLE 0x11b1 -#define MX28_PAD_LCD_VSYNC__SAIF1_SDATA0 0x11c1 -#define MX28_PAD_LCD_HSYNC__SAIF1_SDATA1 0x11d1 -#define MX28_PAD_LCD_DOTCLK__SAIF1_MCLK 0x11e1 -#define MX28_PAD_SSP0_DATA4__SSP2_D0 0x2041 -#define MX28_PAD_SSP0_DATA5__SSP2_D3 0x2051 -#define MX28_PAD_SSP0_DATA6__SSP2_CMD 0x2061 -#define MX28_PAD_SSP0_DATA7__SSP2_SCK 0x2071 -#define MX28_PAD_SSP1_SCK__SSP2_D1 0x20c1 -#define MX28_PAD_SSP1_CMD__SSP2_D2 0x20d1 -#define MX28_PAD_SSP1_DATA0__SSP2_D6 0x20e1 -#define MX28_PAD_SSP1_DATA3__SSP2_D7 0x20f1 -#define MX28_PAD_SSP2_SCK__AUART2_RX 0x2101 -#define MX28_PAD_SSP2_MOSI__AUART2_TX 0x2111 -#define MX28_PAD_SSP2_MISO__AUART3_RX 0x2121 -#define MX28_PAD_SSP2_SS0__AUART3_TX 0x2131 -#define MX28_PAD_SSP2_SS1__SSP2_D1 0x2141 -#define MX28_PAD_SSP2_SS2__SSP2_D2 0x2151 -#define MX28_PAD_SSP3_SCK__AUART4_TX 0x2181 -#define MX28_PAD_SSP3_MOSI__AUART4_RX 0x2191 -#define MX28_PAD_SSP3_MISO__AUART4_RTS 0x21a1 -#define MX28_PAD_SSP3_SS0__AUART4_CTS 0x21b1 -#define MX28_PAD_AUART0_RX__I2C0_SCL 0x3001 -#define MX28_PAD_AUART0_TX__I2C0_SDA 0x3011 -#define MX28_PAD_AUART0_CTS__AUART4_RX 0x3021 -#define MX28_PAD_AUART0_RTS__AUART4_TX 0x3031 -#define MX28_PAD_AUART1_RX__SSP2_CARD_DETECT 0x3041 -#define MX28_PAD_AUART1_TX__SSP3_CARD_DETECT 0x3051 -#define MX28_PAD_AUART1_CTS__USB0_OVERCURRENT 0x3061 -#define MX28_PAD_AUART1_RTS__USB0_ID 0x3071 -#define MX28_PAD_AUART2_RX__SSP3_D1 0x3081 -#define MX28_PAD_AUART2_TX__SSP3_D2 0x3091 -#define MX28_PAD_AUART2_CTS__I2C1_SCL 0x30a1 -#define MX28_PAD_AUART2_RTS__I2C1_SDA 0x30b1 -#define MX28_PAD_AUART3_RX__CAN0_TX 0x30c1 -#define MX28_PAD_AUART3_TX__CAN0_RX 0x30d1 -#define MX28_PAD_AUART3_CTS__CAN1_TX 0x30e1 -#define MX28_PAD_AUART3_RTS__CAN1_RX 0x30f1 -#define MX28_PAD_PWM0__I2C1_SCL 0x3101 -#define MX28_PAD_PWM1__I2C1_SDA 0x3111 -#define MX28_PAD_PWM2__USB0_ID 0x3121 -#define MX28_PAD_SAIF0_MCLK__PWM_3 0x3141 -#define MX28_PAD_SAIF0_LRCLK__PWM_4 0x3151 -#define MX28_PAD_SAIF0_BITCLK__PWM_5 0x3161 -#define MX28_PAD_SAIF0_SDATA0__PWM_6 0x3171 -#define MX28_PAD_I2C0_SCL__TIMROT_ROTARYA 0x3181 -#define MX28_PAD_I2C0_SDA__TIMROT_ROTARYB 0x3191 -#define MX28_PAD_SAIF1_SDATA0__PWM_7 0x31a1 -#define MX28_PAD_LCD_RESET__LCD_VSYNC 0x31e1 -#define MX28_PAD_ENET0_MDC__GPMI_CE4N 0x4001 -#define MX28_PAD_ENET0_MDIO__GPMI_CE5N 0x4011 -#define MX28_PAD_ENET0_RX_EN__GPMI_CE6N 0x4021 -#define MX28_PAD_ENET0_RXD0__GPMI_CE7N 0x4031 -#define MX28_PAD_ENET0_RXD1__GPMI_READY4 0x4041 -#define MX28_PAD_ENET0_TX_CLK__HSADC_TRIGGER 0x4051 -#define MX28_PAD_ENET0_TX_EN__GPMI_READY5 0x4061 -#define MX28_PAD_ENET0_TXD0__GPMI_READY6 0x4071 -#define MX28_PAD_ENET0_TXD1__GPMI_READY7 0x4081 -#define MX28_PAD_ENET0_RXD2__ENET1_RXD0 0x4091 -#define MX28_PAD_ENET0_RXD3__ENET1_RXD1 0x40a1 -#define MX28_PAD_ENET0_TXD2__ENET1_TXD0 0x40b1 -#define MX28_PAD_ENET0_TXD3__ENET1_TXD1 0x40c1 -#define MX28_PAD_ENET0_RX_CLK__ENET0_RX_ER 0x40d1 -#define MX28_PAD_ENET0_COL__ENET1_TX_EN 0x40e1 -#define MX28_PAD_ENET0_CRS__ENET1_RX_EN 0x40f1 -#define MX28_PAD_GPMI_CE2N__ENET0_RX_ER 0x0122 -#define MX28_PAD_GPMI_CE3N__SAIF1_MCLK 0x0132 -#define MX28_PAD_GPMI_RDY0__USB0_ID 0x0142 -#define MX28_PAD_GPMI_RDY2__ENET0_TX_ER 0x0162 -#define MX28_PAD_GPMI_RDY3__HSADC_TRIGGER 0x0172 -#define MX28_PAD_GPMI_ALE__SSP3_D4 0x01a2 -#define MX28_PAD_GPMI_CLE__SSP3_D5 0x01b2 -#define MX28_PAD_LCD_D00__ETM_DA0 0x1002 -#define MX28_PAD_LCD_D01__ETM_DA1 0x1012 -#define MX28_PAD_LCD_D02__ETM_DA2 0x1022 -#define MX28_PAD_LCD_D03__ETM_DA3 0x1032 -#define MX28_PAD_LCD_D04__ETM_DA4 0x1042 -#define MX28_PAD_LCD_D05__ETM_DA5 0x1052 -#define MX28_PAD_LCD_D06__ETM_DA6 0x1062 -#define MX28_PAD_LCD_D07__ETM_DA7 0x1072 -#define MX28_PAD_LCD_D08__ETM_DA8 0x1082 -#define MX28_PAD_LCD_D09__ETM_DA9 0x1092 -#define MX28_PAD_LCD_D10__ETM_DA10 0x10a2 -#define MX28_PAD_LCD_D11__ETM_DA11 0x10b2 -#define MX28_PAD_LCD_D12__ETM_DA12 0x10c2 -#define MX28_PAD_LCD_D13__ETM_DA13 0x10d2 -#define MX28_PAD_LCD_D14__ETM_DA14 0x10e2 -#define MX28_PAD_LCD_D15__ETM_DA15 0x10f2 -#define MX28_PAD_LCD_D16__ETM_DA7 0x1102 -#define MX28_PAD_LCD_D17__ETM_DA6 0x1112 -#define MX28_PAD_LCD_D18__ETM_DA5 0x1122 -#define MX28_PAD_LCD_D19__ETM_DA4 0x1132 -#define MX28_PAD_LCD_D20__ETM_DA3 0x1142 -#define MX28_PAD_LCD_D21__ETM_DA2 0x1152 -#define MX28_PAD_LCD_D22__ETM_DA1 0x1162 -#define MX28_PAD_LCD_D23__ETM_DA0 0x1172 -#define MX28_PAD_LCD_RD_E__ETM_TCTL 0x1182 -#define MX28_PAD_LCD_WR_RWN__ETM_TCLK 0x1192 -#define MX28_PAD_LCD_HSYNC__ETM_TCTL 0x11d2 -#define MX28_PAD_LCD_DOTCLK__ETM_TCLK 0x11e2 -#define MX28_PAD_SSP1_SCK__ENET0_1588_EVENT2_OUT 0x20c2 -#define MX28_PAD_SSP1_CMD__ENET0_1588_EVENT2_IN 0x20d2 -#define MX28_PAD_SSP1_DATA0__ENET0_1588_EVENT3_OUT 0x20e2 -#define MX28_PAD_SSP1_DATA3__ENET0_1588_EVENT3_IN 0x20f2 -#define MX28_PAD_SSP2_SCK__SAIF0_SDATA1 0x2102 -#define MX28_PAD_SSP2_MOSI__SAIF0_SDATA2 0x2112 -#define MX28_PAD_SSP2_MISO__SAIF1_SDATA1 0x2122 -#define MX28_PAD_SSP2_SS0__SAIF1_SDATA2 0x2132 -#define MX28_PAD_SSP2_SS1__USB1_OVERCURRENT 0x2142 -#define MX28_PAD_SSP2_SS2__USB0_OVERCURRENT 0x2152 -#define MX28_PAD_SSP3_SCK__ENET1_1588_EVENT0_OUT 0x2182 -#define MX28_PAD_SSP3_MOSI__ENET1_1588_EVENT0_IN 0x2192 -#define MX28_PAD_SSP3_MISO__ENET1_1588_EVENT1_OUT 0x21a2 -#define MX28_PAD_SSP3_SS0__ENET1_1588_EVENT1_IN 0x21b2 -#define MX28_PAD_AUART0_RX__DUART_CTS 0x3002 -#define MX28_PAD_AUART0_TX__DUART_RTS 0x3012 -#define MX28_PAD_AUART0_CTS__DUART_RX 0x3022 -#define MX28_PAD_AUART0_RTS__DUART_TX 0x3032 -#define MX28_PAD_AUART1_RX__PWM_0 0x3042 -#define MX28_PAD_AUART1_TX__PWM_1 0x3052 -#define MX28_PAD_AUART1_CTS__TIMROT_ROTARYA 0x3062 -#define MX28_PAD_AUART1_RTS__TIMROT_ROTARYB 0x3072 -#define MX28_PAD_AUART2_RX__SSP3_D4 0x3082 -#define MX28_PAD_AUART2_TX__SSP3_D5 0x3092 -#define MX28_PAD_AUART2_CTS__SAIF1_BITCLK 0x30a2 -#define MX28_PAD_AUART2_RTS__SAIF1_LRCLK 0x30b2 -#define MX28_PAD_AUART3_RX__ENET0_1588_EVENT0_OUT 0x30c2 -#define MX28_PAD_AUART3_TX__ENET0_1588_EVENT0_IN 0x30d2 -#define MX28_PAD_AUART3_CTS__ENET0_1588_EVENT1_OUT 0x30e2 -#define MX28_PAD_AUART3_RTS__ENET0_1588_EVENT1_IN 0x30f2 -#define MX28_PAD_PWM0__DUART_RX 0x3102 -#define MX28_PAD_PWM1__DUART_TX 0x3112 -#define MX28_PAD_PWM2__USB1_OVERCURRENT 0x3122 -#define MX28_PAD_SAIF0_MCLK__AUART4_CTS 0x3142 -#define MX28_PAD_SAIF0_LRCLK__AUART4_RTS 0x3152 -#define MX28_PAD_SAIF0_BITCLK__AUART4_RX 0x3162 -#define MX28_PAD_SAIF0_SDATA0__AUART4_TX 0x3172 -#define MX28_PAD_I2C0_SCL__DUART_RX 0x3182 -#define MX28_PAD_I2C0_SDA__DUART_TX 0x3192 -#define MX28_PAD_SAIF1_SDATA0__SAIF0_SDATA1 0x31a2 -#define MX28_PAD_SPDIF__ENET1_RX_ER 0x31b2 -#define MX28_PAD_ENET0_MDC__SAIF0_SDATA1 0x4002 -#define MX28_PAD_ENET0_MDIO__SAIF0_SDATA2 0x4012 -#define MX28_PAD_ENET0_RX_EN__SAIF1_SDATA1 0x4022 -#define MX28_PAD_ENET0_RXD0__SAIF1_SDATA2 0x4032 -#define MX28_PAD_ENET0_TX_CLK__ENET0_1588_EVENT2_OUT 0x4052 -#define MX28_PAD_ENET0_RXD2__ENET0_1588_EVENT0_OUT 0x4092 -#define MX28_PAD_ENET0_RXD3__ENET0_1588_EVENT0_IN 0x40a2 -#define MX28_PAD_ENET0_TXD2__ENET0_1588_EVENT1_OUT 0x40b2 -#define MX28_PAD_ENET0_TXD3__ENET0_1588_EVENT1_IN 0x40c2 -#define MX28_PAD_ENET0_RX_CLK__ENET0_1588_EVENT2_IN 0x40d2 -#define MX28_PAD_ENET0_COL__ENET0_1588_EVENT3_OUT 0x40e2 -#define MX28_PAD_ENET0_CRS__ENET0_1588_EVENT3_IN 0x40f2 -#define MX28_PAD_GPMI_D00__GPIO_0_0 0x0003 -#define MX28_PAD_GPMI_D01__GPIO_0_1 0x0013 -#define MX28_PAD_GPMI_D02__GPIO_0_2 0x0023 -#define MX28_PAD_GPMI_D03__GPIO_0_3 0x0033 -#define MX28_PAD_GPMI_D04__GPIO_0_4 0x0043 -#define MX28_PAD_GPMI_D05__GPIO_0_5 0x0053 -#define MX28_PAD_GPMI_D06__GPIO_0_6 0x0063 -#define MX28_PAD_GPMI_D07__GPIO_0_7 0x0073 -#define MX28_PAD_GPMI_CE0N__GPIO_0_16 0x0103 -#define MX28_PAD_GPMI_CE1N__GPIO_0_17 0x0113 -#define MX28_PAD_GPMI_CE2N__GPIO_0_18 0x0123 -#define MX28_PAD_GPMI_CE3N__GPIO_0_19 0x0133 -#define MX28_PAD_GPMI_RDY0__GPIO_0_20 0x0143 -#define MX28_PAD_GPMI_RDY1__GPIO_0_21 0x0153 -#define MX28_PAD_GPMI_RDY2__GPIO_0_22 0x0163 -#define MX28_PAD_GPMI_RDY3__GPIO_0_23 0x0173 -#define MX28_PAD_GPMI_RDN__GPIO_0_24 0x0183 -#define MX28_PAD_GPMI_WRN__GPIO_0_25 0x0193 -#define MX28_PAD_GPMI_ALE__GPIO_0_26 0x01a3 -#define MX28_PAD_GPMI_CLE__GPIO_0_27 0x01b3 -#define MX28_PAD_GPMI_RESETN__GPIO_0_28 0x01c3 -#define MX28_PAD_LCD_D00__GPIO_1_0 0x1003 -#define MX28_PAD_LCD_D01__GPIO_1_1 0x1013 -#define MX28_PAD_LCD_D02__GPIO_1_2 0x1023 -#define MX28_PAD_LCD_D03__GPIO_1_3 0x1033 -#define MX28_PAD_LCD_D04__GPIO_1_4 0x1043 -#define MX28_PAD_LCD_D05__GPIO_1_5 0x1053 -#define MX28_PAD_LCD_D06__GPIO_1_6 0x1063 -#define MX28_PAD_LCD_D07__GPIO_1_7 0x1073 -#define MX28_PAD_LCD_D08__GPIO_1_8 0x1083 -#define MX28_PAD_LCD_D09__GPIO_1_9 0x1093 -#define MX28_PAD_LCD_D10__GPIO_1_10 0x10a3 -#define MX28_PAD_LCD_D11__GPIO_1_11 0x10b3 -#define MX28_PAD_LCD_D12__GPIO_1_12 0x10c3 -#define MX28_PAD_LCD_D13__GPIO_1_13 0x10d3 -#define MX28_PAD_LCD_D14__GPIO_1_14 0x10e3 -#define MX28_PAD_LCD_D15__GPIO_1_15 0x10f3 -#define MX28_PAD_LCD_D16__GPIO_1_16 0x1103 -#define MX28_PAD_LCD_D17__GPIO_1_17 0x1113 -#define MX28_PAD_LCD_D18__GPIO_1_18 0x1123 -#define MX28_PAD_LCD_D19__GPIO_1_19 0x1133 -#define MX28_PAD_LCD_D20__GPIO_1_20 0x1143 -#define MX28_PAD_LCD_D21__GPIO_1_21 0x1153 -#define MX28_PAD_LCD_D22__GPIO_1_22 0x1163 -#define MX28_PAD_LCD_D23__GPIO_1_23 0x1173 -#define MX28_PAD_LCD_RD_E__GPIO_1_24 0x1183 -#define MX28_PAD_LCD_WR_RWN__GPIO_1_25 0x1193 -#define MX28_PAD_LCD_RS__GPIO_1_26 0x11a3 -#define MX28_PAD_LCD_CS__GPIO_1_27 0x11b3 -#define MX28_PAD_LCD_VSYNC__GPIO_1_28 0x11c3 -#define MX28_PAD_LCD_HSYNC__GPIO_1_29 0x11d3 -#define MX28_PAD_LCD_DOTCLK__GPIO_1_30 0x11e3 -#define MX28_PAD_LCD_ENABLE__GPIO_1_31 0x11f3 -#define MX28_PAD_SSP0_DATA0__GPIO_2_0 0x2003 -#define MX28_PAD_SSP0_DATA1__GPIO_2_1 0x2013 -#define MX28_PAD_SSP0_DATA2__GPIO_2_2 0x2023 -#define MX28_PAD_SSP0_DATA3__GPIO_2_3 0x2033 -#define MX28_PAD_SSP0_DATA4__GPIO_2_4 0x2043 -#define MX28_PAD_SSP0_DATA5__GPIO_2_5 0x2053 -#define MX28_PAD_SSP0_DATA6__GPIO_2_6 0x2063 -#define MX28_PAD_SSP0_DATA7__GPIO_2_7 0x2073 -#define MX28_PAD_SSP0_CMD__GPIO_2_8 0x2083 -#define MX28_PAD_SSP0_DETECT__GPIO_2_9 0x2093 -#define MX28_PAD_SSP0_SCK__GPIO_2_10 0x20a3 -#define MX28_PAD_SSP1_SCK__GPIO_2_12 0x20c3 -#define MX28_PAD_SSP1_CMD__GPIO_2_13 0x20d3 -#define MX28_PAD_SSP1_DATA0__GPIO_2_14 0x20e3 -#define MX28_PAD_SSP1_DATA3__GPIO_2_15 0x20f3 -#define MX28_PAD_SSP2_SCK__GPIO_2_16 0x2103 -#define MX28_PAD_SSP2_MOSI__GPIO_2_17 0x2113 -#define MX28_PAD_SSP2_MISO__GPIO_2_18 0x2123 -#define MX28_PAD_SSP2_SS0__GPIO_2_19 0x2133 -#define MX28_PAD_SSP2_SS1__GPIO_2_20 0x2143 -#define MX28_PAD_SSP2_SS2__GPIO_2_21 0x2153 -#define MX28_PAD_SSP3_SCK__GPIO_2_24 0x2183 -#define MX28_PAD_SSP3_MOSI__GPIO_2_25 0x2193 -#define MX28_PAD_SSP3_MISO__GPIO_2_26 0x21a3 -#define MX28_PAD_SSP3_SS0__GPIO_2_27 0x21b3 -#define MX28_PAD_AUART0_RX__GPIO_3_0 0x3003 -#define MX28_PAD_AUART0_TX__GPIO_3_1 0x3013 -#define MX28_PAD_AUART0_CTS__GPIO_3_2 0x3023 -#define MX28_PAD_AUART0_RTS__GPIO_3_3 0x3033 -#define MX28_PAD_AUART1_RX__GPIO_3_4 0x3043 -#define MX28_PAD_AUART1_TX__GPIO_3_5 0x3053 -#define MX28_PAD_AUART1_CTS__GPIO_3_6 0x3063 -#define MX28_PAD_AUART1_RTS__GPIO_3_7 0x3073 -#define MX28_PAD_AUART2_RX__GPIO_3_8 0x3083 -#define MX28_PAD_AUART2_TX__GPIO_3_9 0x3093 -#define MX28_PAD_AUART2_CTS__GPIO_3_10 0x30a3 -#define MX28_PAD_AUART2_RTS__GPIO_3_11 0x30b3 -#define MX28_PAD_AUART3_RX__GPIO_3_12 0x30c3 -#define MX28_PAD_AUART3_TX__GPIO_3_13 0x30d3 -#define MX28_PAD_AUART3_CTS__GPIO_3_14 0x30e3 -#define MX28_PAD_AUART3_RTS__GPIO_3_15 0x30f3 -#define MX28_PAD_PWM0__GPIO_3_16 0x3103 -#define MX28_PAD_PWM1__GPIO_3_17 0x3113 -#define MX28_PAD_PWM2__GPIO_3_18 0x3123 -#define MX28_PAD_SAIF0_MCLK__GPIO_3_20 0x3143 -#define MX28_PAD_SAIF0_LRCLK__GPIO_3_21 0x3153 -#define MX28_PAD_SAIF0_BITCLK__GPIO_3_22 0x3163 -#define MX28_PAD_SAIF0_SDATA0__GPIO_3_23 0x3173 -#define MX28_PAD_I2C0_SCL__GPIO_3_24 0x3183 -#define MX28_PAD_I2C0_SDA__GPIO_3_25 0x3193 -#define MX28_PAD_SAIF1_SDATA0__GPIO_3_26 0x31a3 -#define MX28_PAD_SPDIF__GPIO_3_27 0x31b3 -#define MX28_PAD_PWM3__GPIO_3_28 0x31c3 -#define MX28_PAD_PWM4__GPIO_3_29 0x31d3 -#define MX28_PAD_LCD_RESET__GPIO_3_30 0x31e3 -#define MX28_PAD_ENET0_MDC__GPIO_4_0 0x4003 -#define MX28_PAD_ENET0_MDIO__GPIO_4_1 0x4013 -#define MX28_PAD_ENET0_RX_EN__GPIO_4_2 0x4023 -#define MX28_PAD_ENET0_RXD0__GPIO_4_3 0x4033 -#define MX28_PAD_ENET0_RXD1__GPIO_4_4 0x4043 -#define MX28_PAD_ENET0_TX_CLK__GPIO_4_5 0x4053 -#define MX28_PAD_ENET0_TX_EN__GPIO_4_6 0x4063 -#define MX28_PAD_ENET0_TXD0__GPIO_4_7 0x4073 -#define MX28_PAD_ENET0_TXD1__GPIO_4_8 0x4083 -#define MX28_PAD_ENET0_RXD2__GPIO_4_9 0x4093 -#define MX28_PAD_ENET0_RXD3__GPIO_4_10 0x40a3 -#define MX28_PAD_ENET0_TXD2__GPIO_4_11 0x40b3 -#define MX28_PAD_ENET0_TXD3__GPIO_4_12 0x40c3 -#define MX28_PAD_ENET0_RX_CLK__GPIO_4_13 0x40d3 -#define MX28_PAD_ENET0_COL__GPIO_4_14 0x40e3 -#define MX28_PAD_ENET0_CRS__GPIO_4_15 0x40f3 -#define MX28_PAD_ENET_CLK__GPIO_4_16 0x4103 -#define MX28_PAD_JTAG_RTCK__GPIO_4_20 0x4143 - -#endif /* __DT_BINDINGS_MX28_PINCTRL_H__ */ diff --git a/arch/arm/boot/dts/imx28-sps1.dts b/arch/arm/boot/dts/imx28-sps1.dts index 4870f07..6c6a544 100644 --- a/arch/arm/boot/dts/imx28-sps1.dts +++ b/arch/arm/boot/dts/imx28-sps1.dts @@ -10,7 +10,7 @@ */ /dts-v1/; -#include "imx28.dtsi" +/include/ "imx28.dtsi" / { model = "SchulerControl GmbH, SC SPS 1"; @@ -29,13 +29,13 @@ hog_pins_a: hog-gpios@0 { reg = <0>; fsl,pinmux-ids = < - MX28_PAD_GPMI_D00__GPIO_0_0 - MX28_PAD_GPMI_D03__GPIO_0_3 - MX28_PAD_GPMI_D06__GPIO_0_6 + 0x0003 /* MX28_PAD_GPMI_D00__GPIO_0_0 */ + 0x0033 /* MX28_PAD_GPMI_D03__GPIO_0_3 */ + 0x0063 /* MX28_PAD_GPMI_D06__GPIO_0_6 */ >; - fsl,drive-strength = <MXS_DRIVE_4mA>; - fsl,voltage = <MXS_VOLTAGE_HIGH>; - fsl,pull-up = <MXS_PULL_DISABLE>; + fsl,drive-strength = <0>; + fsl,voltage = <1>; + fsl,pull-up = <0>; }; }; diff --git a/arch/arm/boot/dts/imx28-tx28.dts b/arch/arm/boot/dts/imx28-tx28.dts index be5a055..37be532 100644 --- a/arch/arm/boot/dts/imx28-tx28.dts +++ b/arch/arm/boot/dts/imx28-tx28.dts @@ -1,139 +1,106 @@ -/* - * Copyright 2012 Shawn Guo <shawn.guo@linaro.org> - * Copyright 2013 Lothar Waßmann <LW@KARO-electronics.de> - * - * The code contained herein is licensed under the GNU General Public - * License. You may obtain a copy of the GNU General Public License - * Version 2 at the following locations: - * - * http://www.opensource.org/licenses/gpl-license.html - * http://www.gnu.org/copyleft/gpl.html - */ - /dts-v1/; -#include "imx28.dtsi" -#include <dt-bindings/gpio/gpio.h> +/include/ "imx28.dtsi" / { model = "Ka-Ro electronics TX28 module"; compatible = "karo,tx28", "fsl,imx28"; - aliases { - can0 = &can0; - can1 = &can1; - display = &display; - ds1339 = &ds1339; - gpio5 = &gpio5; - lcdif = &lcdif; - lcdif_23bit_pins = &tx28_lcdif_23bit_pins; - lcdif_24bit_pins = &lcdif_24bit_pins_a; - stk5led = &user_led; - usbotg = &usb0; - }; - memory { - reg = <0 0>; /* will be filled in by U-Boot */ - }; - - onewire { - compatible = "w1-gpio"; - gpios = <&gpio2 7 0>; - status = "disabled"; - }; - - regulators { - compatible = "simple-bus"; - - reg_usb0_vbus: usb0_vbus { - compatible = "regulator-fixed"; - regulator-name = "usb0_vbus"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - gpio = <&gpio0 18 0>; - enable-active-high; - }; + reg = <0x40000000 0x08000000>; + }; + + apb@80000000 { + apbh@80000000 { + ssp0: ssp@80010000 { + compatible = "fsl,imx28-mmc"; + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_4bit_pins_a + &mmc0_cd_cfg + &mmc0_sck_cfg>; + bus-width = <4>; + status = "okay"; + }; - reg_usb1_vbus: usb1_vbus { - compatible = "regulator-fixed"; - regulator-name = "usb1_vbus"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - gpio = <&gpio3 27 0>; - enable-active-high; + pinctrl@80018000 { + pinctrl-names = "default"; + pinctrl-0 = <&hog_pins_a>; + + hog_pins_a: hog@0 { + reg = <0>; + fsl,pinmux-ids = < + 0x40a3 /* MX28_PAD_ENET0_RXD3__GPIO_4_10 */ + >; + fsl,drive-strength = <0>; + fsl,voltage = <1>; + fsl,pull-up = <0>; + }; + + mac0_pins_gpio: mac0-gpio-mode@0 { + reg = <0>; + fsl,pinmux-ids = < + 0x4003 /* MX28_PAD_ENET0_MDC__GPIO_4_0 */ + 0x4013 /* MX28_PAD_ENET0_MDIO__GPIO_4_1 */ + 0x4023 /* MX28_PAD_ENET0_RX_EN__GPIO_4_2 */ + 0x4033 /* MX28_PAD_ENET0_RXD0__GPIO_4_3 */ + 0x4043 /* MX28_PAD_ENET0_RXD1__GPIO_4_4 */ + 0x4063 /* MX28_PAD_ENET0_TX_EN__GPIO_4_6 */ + 0x4073 /* MX28_PAD_ENET0_TXD0__GPIO_4_7 */ + 0x4083 /* MX28_PAD_ENET0_TXD1__GPIO_4_8 */ + 0x4103 /* MX28_PAD_ENET_CLK__GPIO_4_16 */ + >; + fsl,drive-strength = <0>; + fsl,voltage = <1>; + fsl,pull-up = <0>; + }; + }; }; - reg_2p5v: 2p5v { - compatible = "regulator-fixed"; - regulator-name = "2P5V"; - regulator-min-microvolt = <2500000>; - regulator-max-microvolt = <2500000>; - regulator-always-on; - }; + apbx@80040000 { + i2c0: i2c@80058000 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c0_pins_a>; + status = "okay"; - reg_3p3v: 3p3v { - compatible = "regulator-fixed"; - regulator-name = "3P3V"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - }; + ds1339: rtc@68 { + compatible = "mxim,ds1339"; + reg = <0x68>; + }; + }; - reg_can_xcvr: can-xcvr { - compatible = "regulator-fixed"; - regulator-name = "CAN XCVR"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - gpio = <&gpio1 0 0>; - enable-active-low; - pinctrl-names = "default"; - pinctrl-0 = <&tx28_flexcan_xcvr_pins>; - }; + pwm: pwm@80064000 { + pinctrl-names = "default"; + pinctrl-0 = <&pwm0_pins_a>; + status = "okay"; + }; - reg_lcd: lcd-power { - compatible = "regulator-fixed"; - regulator-name = "LCD POWER"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - gpio = <&gpio1 31 0>; - enable-active-high; - }; + duart: serial@80074000 { + pinctrl-names = "default"; + pinctrl-0 = <&duart_4pins_a>; + status = "okay"; + }; - reg_lcd_reset: lcd-reset { - compatible = "regulator-fixed"; - regulator-name = "LCD RESET"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - gpio = <&gpio3 30 0>; - startup-delay-us = <300000>; - enable-active-high; - regulator-always-on; - regulator-boot-on; + auart1: serial@8006c000 { + pinctrl-names = "default"; + pinctrl-0 = <&auart1_pins_a>; + status = "okay"; + }; }; }; - clocks { - #address-cells = <1>; - #size-cells = <0>; - mclk: clock@0 { - compatible = "fixed-clock"; - reg = <0>; - #clock-cells = <0>; - clock-frequency = <27000000>; + ahb@80080000 { + mac0: ethernet@800f0000 { + phy-mode = "rmii"; + pinctrl-names = "default", "gpio_mode"; + pinctrl-0 = <&mac0_pins_a>; + pinctrl-1 = <&mac0_pins_gpio>; + status = "okay"; }; }; - sound { - compatible = "fsl,imx28-tx28-sgtl5000", - "fsl,mxs-audio-sgtl5000"; - model = "imx28-tx28-sgtl5000"; - saif-controllers = <&saif0 &saif1>; - audio-codec = <&sgtl5000>; - }; - leds { compatible = "gpio-leds"; - user_led: user { + user { label = "Heartbeat"; gpios = <&gpio4 10 0>; linux,default-trigger = "heartbeat"; @@ -142,512 +109,8 @@ backlight { compatible = "pwm-backlight"; - pwms = <&pwm 0 500000>; - /* - * a silly way to create a 1:1 relationship between the - * PWM value and the actual duty cycle - */ - brightness-levels = < 0 1 2 3 4 5 6 7 8 9 - 10 11 12 13 14 15 16 17 18 19 - 20 21 22 23 24 25 26 27 28 29 - 30 31 32 33 34 35 36 37 38 39 - 40 41 42 43 44 45 46 47 48 49 - 50 51 52 53 54 55 56 57 58 59 - 60 61 62 63 64 65 66 67 68 69 - 70 71 72 73 74 75 76 77 78 79 - 80 81 82 83 84 85 86 87 88 89 - 90 91 92 93 94 95 96 97 98 99 - 100>; - default-brightness-level = <50>; - }; - - matrix_keypad: matrix-keypad@0 { - compatible = "gpio-matrix-keypad"; - col-gpios = < - &gpio5 0 0 - &gpio5 1 0 - &gpio5 2 0 - &gpio5 3 0 - >; - row-gpios = < - &gpio5 4 0 - &gpio5 5 0 - &gpio5 6 0 - &gpio5 7 0 - >; - /* sample keymap */ - linux,keymap = < - 0x00000074 /* row 0, col 0, KEY_POWER */ - 0x00010052 /* row 0, col 1, KEY_KP0 */ - 0x0002004f /* row 0, col 2, KEY_KP1 */ - 0x00030050 /* row 0, col 3, KEY_KP2 */ - 0x01000051 /* row 1, col 0, KEY_KP3 */ - 0x0101004b /* row 1, col 1, KEY_KP4 */ - 0x0102004c /* row 1, col 2, KEY_KP5 */ - 0x0103004d /* row 1, col 3, KEY_KP6 */ - 0x02000047 /* row 2, col 0, KEY_KP7 */ - 0x02010048 /* row 2, col 1, KEY_KP8 */ - 0x02020049 /* row 2, col 2, KEY_KP9 */ - >; - gpio-activelow; - linux,wakeup; - debounce-delay-ms = <100>; - col-scan-delay-us = <5000>; - linux,no-autorepeat; - }; -}; - -/* 2nd TX-Std UART - (A)UART1 */ -&auart1 { - pinctrl-names = "default"; - pinctrl-0 = <&auart1_pins_a>; - status = "okay"; -}; - -/* 3rd TX-Std UART - (A)UART3 */ -&auart3 { - pinctrl-names = "default"; - pinctrl-0 = <&auart3_pins_a>; - status = "okay"; -}; - -&can0 { - pinctrl-names = "default"; - pinctrl-0 = <&can0_pins_a>; - xceiver-supply = <®_can_xcvr>; - status = "okay"; -}; - -&can1 { - pinctrl-names = "default"; - pinctrl-0 = <&can1_pins_a>; - xceiver-supply = <®_can_xcvr>; - status = "okay"; -}; - -&digctl { - status = "okay"; -}; - -/* 1st TX-Std UART - (D)UART */ -&duart { - pinctrl-names = "default"; - pinctrl-0 = <&duart_4pins_a>; - status = "okay"; -}; - -&gpmi { - pinctrl-0 = <&gpmi_pins_a &gpmi_status_cfg>; - nand-on-flash-bbt; - status = "okay"; -}; - -&i2c0 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c0_pins_a>; - clock-frequency = <400000>; - status = "okay"; - - sgtl5000: sgtl5000@0a { - compatible = "fsl,sgtl5000"; - reg = <0x0a>; - VDDA-supply = <®_2p5v>; - VDDIO-supply = <®_3p3v>; - clocks = <&mclk>; - }; - - gpio5: pca953x@20 { - compatible = "nxp,pca9554"; - reg = <0x20>; - pinctrl-names = "default"; - pinctrl-0 = <&tx28_pca9554_pins>; - interrupt-parent = <&gpio3>; - interrupts = <28 0>; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - }; - - polytouch: edt-ft5x06@38 { - compatible = "edt,edt-ft5x06"; - reg = <0x38>; - pinctrl-names = "default"; - pinctrl-0 = <&tx28_edt_ft5x06_pins>; - interrupt-parent = <&gpio2>; - interrupts = <5 0>; - reset-gpios = <&gpio2 6 1>; - wake-gpios = <&gpio4 9 0>; - }; - - touchscreen: tsc2007@48 { - compatible = "ti,tsc2007"; - reg = <0x48>; - pinctrl-names = "default"; - pinctrl-0 = <&tx28_tsc2007_pins>; - interrupt-parent = <&gpio3>; - interrupts = <20 0>; - pendown-gpio = <&gpio3 20 1>; - ti,x-plate-ohms = /bits/ 16 <660>; - }; - - ds1339: rtc@68 { - compatible = "mxim,ds1339"; - reg = <0x68>; - }; -}; - -&lcdif { - pinctrl-names = "default"; - pinctrl-0 = <&lcdif_24bit_pins_a &lcdif_sync_pins_a &tx28_lcdif_ctrl_pins>; - lcd-supply = <®_lcd>; - display = <&display>; - status = "okay"; - - display: display@0 { - bits-per-pixel = <32>; - bus-width = <24>; - display-timings { - native-mode = <&timing5>; - timing0: timing0 { - panel-name = "VGA"; - clock-frequency = <25175000>; - hactive = <640>; - vactive = <480>; - hback-porch = <48>; - hsync-len = <96>; - hfront-porch = <16>; - vback-porch = <33>; - vsync-len = <2>; - vfront-porch = <10>; - hsync-active = <0>; - vsync-active = <0>; - de-active = <1>; - pixelclk-active = <1>; - }; - - timing1: timing1 { - panel-name = "ETV570"; - clock-frequency = <25175000>; - hactive = <640>; - vactive = <480>; - hback-porch = <114>; - hsync-len = <30>; - hfront-porch = <16>; - vback-porch = <32>; - vsync-len = <3>; - vfront-porch = <10>; - hsync-active = <0>; - vsync-active = <0>; - de-active = <1>; - pixelclk-active = <1>; - }; - - timing2: timing2 { - panel-name = "ET0350"; - clock-frequency = <6500000>; - hactive = <320>; - vactive = <240>; - hback-porch = <34>; - hsync-len = <34>; - hfront-porch = <20>; - vback-porch = <15>; - vsync-len = <3>; - vfront-porch = <4>; - hsync-active = <0>; - vsync-active = <0>; - de-active = <1>; - pixelclk-active = <1>; - }; - - timing3: timing3 { - panel-name = "ET0430"; - clock-frequency = <9000000>; - hactive = <480>; - vactive = <272>; - hback-porch = <2>; - hsync-len = <41>; - hfront-porch = <2>; - vback-porch = <2>; - vsync-len = <10>; - vfront-porch = <2>; - hsync-active = <0>; - vsync-active = <0>; - de-active = <1>; - pixelclk-active = <1>; - }; - - timing4: timing4 { - panel-name = "ET0500", "ET0700"; - clock-frequency = <33260000>; - hactive = <800>; - vactive = <480>; - hback-porch = <88>; - hsync-len = <128>; - hfront-porch = <40>; - vback-porch = <33>; - vsync-len = <2>; - vfront-porch = <10>; - hsync-active = <0>; - vsync-active = <0>; - de-active = <1>; - pixelclk-active = <1>; - }; - - timing5: timing5 { - panel-name = "ETQ570"; - clock-frequency = <6400000>; - hactive = <320>; - vactive = <240>; - hback-porch = <38>; - hsync-len = <30>; - hfront-porch = <30>; - vback-porch = <16>; - vsync-len = <3>; - vfront-porch = <4>; - hsync-active = <0>; - vsync-active = <0>; - de-active = <1>; - pixelclk-active = <1>; - }; - }; - }; -}; - -&lradc { - fsl,lradc-touchscreen-wires = <4>; - status = "okay"; -}; - -&mac0 { - phy-mode = "rmii"; - pinctrl-names = "default", "gpio_mode"; - pinctrl-0 = <&mac0_pins_a>; - pinctrl-1 = <&tx28_mac0_pins_gpio>; - status = "okay"; -}; - -&mac1 { - phy-mode = "rmii"; - pinctrl-names = "default"; - pinctrl-0 = <&mac1_pins_a>; - /* not enabled by default */ -}; - -&mxs_rtc { - status = "okay"; -}; - -&ocotp { - status = "okay"; -}; - -&pwm { - pinctrl-names = "default"; - pinctrl-0 = <&pwm0_pins_a>; - status = "okay"; -}; - -&pinctrl { - pinctrl-names = "default"; - pinctrl-0 = <&hog_pins_a>; - - hog_pins_a: hog@0 { - reg = <0>; - fsl,pinmux-ids = < - MX28_PAD_ENET0_RXD3__GPIO_4_10 /* module LED */ - >; - fsl,drive-strength = <MXS_DRIVE_4mA>; - fsl,voltage = <MXS_VOLTAGE_HIGH>; - fsl,pull-up = <MXS_PULL_DISABLE>; - }; - - tx28_edt_ft5x06_pins: tx28-edt-ft5x06-pins { - fsl,pinmux-ids = < - MX28_PAD_SSP0_DATA6__GPIO_2_6 /* RESET */ - MX28_PAD_SSP0_DATA5__GPIO_2_5 /* IRQ */ - MX28_PAD_ENET0_RXD2__GPIO_4_9 /* WAKE */ - >; - fsl,drive-strength = <MXS_DRIVE_4mA>; - fsl,voltage = <MXS_VOLTAGE_HIGH>; - fsl,pull-up = <MXS_PULL_DISABLE>; - }; - - tx28_flexcan_xcvr_pins: tx28-flexcan-xcvr-pins { - fsl,pinmux-ids = < - MX28_PAD_LCD_D00__GPIO_1_0 - >; - fsl,drive-strength = <MXS_DRIVE_4mA>; - fsl,voltage = <MXS_VOLTAGE_HIGH>; - fsl,pull-up = <MXS_PULL_DISABLE>; - }; - - tx28_lcdif_23bit_pins: tx28-lcdif-23bit { - fsl,pinmux-ids = < - /* LCD_D00 may be used as Flexcan Transceiver Enable on STK5-V5 */ - MX28_PAD_LCD_D01__LCD_D1 - MX28_PAD_LCD_D02__LCD_D2 - MX28_PAD_LCD_D03__LCD_D3 - MX28_PAD_LCD_D04__LCD_D4 - MX28_PAD_LCD_D05__LCD_D5 - MX28_PAD_LCD_D06__LCD_D6 - MX28_PAD_LCD_D07__LCD_D7 - MX28_PAD_LCD_D08__LCD_D8 - MX28_PAD_LCD_D09__LCD_D9 - MX28_PAD_LCD_D10__LCD_D10 - MX28_PAD_LCD_D11__LCD_D11 - MX28_PAD_LCD_D12__LCD_D12 - MX28_PAD_LCD_D13__LCD_D13 - MX28_PAD_LCD_D14__LCD_D14 - MX28_PAD_LCD_D15__LCD_D15 - MX28_PAD_LCD_D16__LCD_D16 - MX28_PAD_LCD_D17__LCD_D17 - MX28_PAD_LCD_D18__LCD_D18 - MX28_PAD_LCD_D19__LCD_D19 - MX28_PAD_LCD_D20__LCD_D20 - MX28_PAD_LCD_D21__LCD_D21 - MX28_PAD_LCD_D22__LCD_D22 - MX28_PAD_LCD_D23__LCD_D23 - >; - fsl,drive-strength = <MXS_DRIVE_4mA>; - fsl,voltage = <MXS_VOLTAGE_HIGH>; - fsl,pull-up = <MXS_PULL_DISABLE>; - }; - - tx28_lcdif_ctrl_pins: tx28-lcdif-ctrl { - fsl,pinmux-ids = < - MX28_PAD_LCD_ENABLE__GPIO_1_31 /* Enable */ - MX28_PAD_LCD_RESET__GPIO_3_30 /* Reset */ - >; - fsl,drive-strength = <MXS_DRIVE_4mA>; - fsl,voltage = <MXS_VOLTAGE_HIGH>; - fsl,pull-up = <MXS_PULL_DISABLE>; - }; - - tx28_mac0_pins_gpio: tx28-mac0-gpio-pins { - fsl,pinmux-ids = < - MX28_PAD_ENET0_MDC__GPIO_4_0 - MX28_PAD_ENET0_MDIO__GPIO_4_1 - MX28_PAD_ENET0_RX_EN__GPIO_4_2 - MX28_PAD_ENET0_RXD0__GPIO_4_3 - MX28_PAD_ENET0_RXD1__GPIO_4_4 - MX28_PAD_ENET0_TX_EN__GPIO_4_6 - MX28_PAD_ENET0_TXD0__GPIO_4_7 - MX28_PAD_ENET0_TXD1__GPIO_4_8 - MX28_PAD_ENET_CLK__GPIO_4_16 - >; - fsl,drive-strength = <MXS_DRIVE_4mA>; - fsl,voltage = <MXS_VOLTAGE_HIGH>; - fsl,pull-up = <MXS_PULL_DISABLE>; - }; - - tx28_pca9554_pins: tx28-pca9554-pins { - fsl,pinmux-ids = < - MX28_PAD_PWM3__GPIO_3_28 - >; - fsl,drive-strength = <MXS_DRIVE_4mA>; - fsl,voltage = <MXS_VOLTAGE_HIGH>; - fsl,pull-up = <MXS_PULL_DISABLE>; - }; - - tx28_tsc2007_pins: tx28-tsc2007-pins { - fsl,pinmux-ids = < - MX28_PAD_SAIF0_MCLK__GPIO_3_20 /* TSC2007 IRQ */ - >; - fsl,drive-strength = <MXS_DRIVE_4mA>; - fsl,voltage = <MXS_VOLTAGE_HIGH>; - fsl,pull-up = <MXS_PULL_DISABLE>; - }; - - - tx28_usbphy0_pins: tx28-usbphy0-pins { - fsl,pinmux-ids = < - MX28_PAD_GPMI_CE2N__GPIO_0_18 /* USBOTG_VBUSEN */ - MX28_PAD_GPMI_CE3N__GPIO_0_19 /* USBOTH_OC */ - >; - fsl,drive-strength = <MXS_DRIVE_12mA>; - fsl,voltage = <MXS_VOLTAGE_HIGH>; - fsl,pull-up = <MXS_PULL_DISABLE>; - }; - - tx28_usbphy1_pins: tx28-usbphy1-pins { - fsl,pinmux-ids = < - MX28_PAD_SPDIF__GPIO_3_27 /* USBH_VBUSEN */ - MX28_PAD_JTAG_RTCK__GPIO_4_20 /* USBH_OC */ - >; - fsl,drive-strength = <MXS_DRIVE_12mA>; - fsl,voltage = <MXS_VOLTAGE_HIGH>; - fsl,pull-up = <MXS_PULL_DISABLE>; - }; -}; - -&saif0 { - pinctrl-names = "default"; - pinctrl-0 = <&saif0_pins_b>; - fsl,saif-master; - status = "okay"; -}; - -&saif1 { - pinctrl-names = "default"; - pinctrl-0 = <&saif1_pins_a>; - status = "okay"; -}; - -&ssp0 { - compatible = "fsl,imx28-mmc"; - pinctrl-names = "default", "special"; - pinctrl-0 = <&mmc0_4bit_pins_a - &mmc0_cd_cfg - &mmc0_sck_cfg>; - bus-width = <4>; - status = "okay"; -}; - -&ssp3 { - compatible = "fsl,imx28-spi"; - pinctrl-names = "default"; - pinctrl-0 = <&spi3_pins_a>; - clock-frequency = <57600000>; - status = "okay"; - - spidev0: spi@0 { - compatible = "spidev"; - reg = <0>; - spi-max-frequency = <57600000>; - }; - - spidev1: spi@1 { - compatible = "spidev"; - reg = <1>; - spi-max-frequency = <57600000>; + pwms = <&pwm 0 5000000>; + brightness-levels = <0 4 8 16 32 64 128 255>; + default-brightness-level = <6>; }; }; - -&usb0 { - vbus-supply = <®_usb0_vbus>; - disable-over-current; - dr_mode = "peripheral"; - status = "okay"; -}; - -&usb1 { - vbus-supply = <®_usb1_vbus>; - disable-over-current; - dr_mode = "host"; - status = "okay"; -}; - -&usbphy0 { - pinctrl-names = "default"; - pinctrl-0 = <&tx28_usbphy0_pins>; - phy_type = "utmi"; - status = "okay"; -}; - -&usbphy1 { - pinctrl-names = "default"; - pinctrl-0 = <&tx28_usbphy1_pins>; - phy_type = "utmi"; - status = "okay"; -}; diff --git a/arch/arm/boot/dts/imx28.dtsi b/arch/arm/boot/dts/imx28.dtsi index cda19c8..7363fde 100644 --- a/arch/arm/boot/dts/imx28.dtsi +++ b/arch/arm/boot/dts/imx28.dtsi @@ -9,8 +9,7 @@ * http://www.gnu.org/copyleft/gpl.html */ -#include "skeleton.dtsi" -#include "imx28-pinfunc.h" +/include/ "skeleton.dtsi" / { interrupt-parent = <&icoll>; @@ -208,579 +207,538 @@ duart_pins_a: duart@0 { reg = <0>; fsl,pinmux-ids = < - MX28_PAD_PWM0__DUART_RX - MX28_PAD_PWM1__DUART_TX + 0x3102 /* MX28_PAD_PWM0__DUART_RX */ + 0x3112 /* MX28_PAD_PWM1__DUART_TX */ >; - fsl,drive-strength = <MXS_DRIVE_4mA>; - fsl,voltage = <MXS_VOLTAGE_HIGH>; - fsl,pull-up = <MXS_PULL_DISABLE>; + fsl,drive-strength = <0>; + fsl,voltage = <1>; + fsl,pull-up = <0>; }; duart_pins_b: duart@1 { reg = <1>; fsl,pinmux-ids = < - MX28_PAD_AUART0_CTS__DUART_RX - MX28_PAD_AUART0_RTS__DUART_TX + 0x3022 /* MX28_PAD_AUART0_CTS__DUART_RX */ + 0x3032 /* MX28_PAD_AUART0_RTS__DUART_TX */ >; - fsl,drive-strength = <MXS_DRIVE_4mA>; - fsl,voltage = <MXS_VOLTAGE_HIGH>; - fsl,pull-up = <MXS_PULL_DISABLE>; + fsl,drive-strength = <0>; + fsl,voltage = <1>; + fsl,pull-up = <0>; }; duart_4pins_a: duart-4pins@0 { reg = <0>; fsl,pinmux-ids = < - MX28_PAD_AUART0_CTS__DUART_RX - MX28_PAD_AUART0_RTS__DUART_TX - MX28_PAD_AUART0_RX__DUART_CTS - MX28_PAD_AUART0_TX__DUART_RTS + 0x3022 /* MX28_PAD_AUART0_CTS__DUART_RX */ + 0x3032 /* MX28_PAD_AUART0_RTS__DUART_TX */ + 0x3002 /* MX28_PAD_AUART0_RX__DUART_CTS */ + 0x3012 /* MX28_PAD_AUART0_TX__DUART_RTS */ >; - fsl,drive-strength = <MXS_DRIVE_4mA>; - fsl,voltage = <MXS_VOLTAGE_HIGH>; - fsl,pull-up = <MXS_PULL_DISABLE>; + fsl,drive-strength = <0>; + fsl,voltage = <1>; + fsl,pull-up = <0>; }; gpmi_pins_a: gpmi-nand@0 { reg = <0>; fsl,pinmux-ids = < - MX28_PAD_GPMI_D00__GPMI_D0 - MX28_PAD_GPMI_D01__GPMI_D1 - MX28_PAD_GPMI_D02__GPMI_D2 - MX28_PAD_GPMI_D03__GPMI_D3 - MX28_PAD_GPMI_D04__GPMI_D4 - MX28_PAD_GPMI_D05__GPMI_D5 - MX28_PAD_GPMI_D06__GPMI_D6 - MX28_PAD_GPMI_D07__GPMI_D7 - MX28_PAD_GPMI_CE0N__GPMI_CE0N - MX28_PAD_GPMI_RDY0__GPMI_READY0 - MX28_PAD_GPMI_RDN__GPMI_RDN - MX28_PAD_GPMI_WRN__GPMI_WRN - MX28_PAD_GPMI_ALE__GPMI_ALE - MX28_PAD_GPMI_CLE__GPMI_CLE - MX28_PAD_GPMI_RESETN__GPMI_RESETN + 0x0000 /* MX28_PAD_GPMI_D00__GPMI_D0 */ + 0x0010 /* MX28_PAD_GPMI_D01__GPMI_D1 */ + 0x0020 /* MX28_PAD_GPMI_D02__GPMI_D2 */ + 0x0030 /* MX28_PAD_GPMI_D03__GPMI_D3 */ + 0x0040 /* MX28_PAD_GPMI_D04__GPMI_D4 */ + 0x0050 /* MX28_PAD_GPMI_D05__GPMI_D5 */ + 0x0060 /* MX28_PAD_GPMI_D06__GPMI_D6 */ + 0x0070 /* MX28_PAD_GPMI_D07__GPMI_D7 */ + 0x0100 /* MX28_PAD_GPMI_CE0N__GPMI_CE0N */ + 0x0140 /* MX28_PAD_GPMI_RDY0__GPMI_READY0 */ + 0x0180 /* MX28_PAD_GPMI_RDN__GPMI_RDN */ + 0x0190 /* MX28_PAD_GPMI_WRN__GPMI_WRN */ + 0x01a0 /* MX28_PAD_GPMI_ALE__GPMI_ALE */ + 0x01b0 /* MX28_PAD_GPMI_CLE__GPMI_CLE */ + 0x01c0 /* MX28_PAD_GPMI_RESETN__GPMI_RESETN */ >; - fsl,drive-strength = <MXS_DRIVE_4mA>; - fsl,voltage = <MXS_VOLTAGE_HIGH>; - fsl,pull-up = <MXS_PULL_DISABLE>; + fsl,drive-strength = <0>; + fsl,voltage = <1>; + fsl,pull-up = <0>; }; gpmi_status_cfg: gpmi-status-cfg { fsl,pinmux-ids = < - MX28_PAD_GPMI_RDN__GPMI_RDN - MX28_PAD_GPMI_WRN__GPMI_WRN - MX28_PAD_GPMI_RESETN__GPMI_RESETN + 0x0180 /* MX28_PAD_GPMI_RDN__GPMI_RDN */ + 0x0190 /* MX28_PAD_GPMI_WRN__GPMI_WRN */ + 0x01c0 /* MX28_PAD_GPMI_RESETN__GPMI_RESETN */ >; - fsl,drive-strength = <MXS_DRIVE_12mA>; + fsl,drive-strength = <2>; }; auart0_pins_a: auart0@0 { reg = <0>; fsl,pinmux-ids = < - MX28_PAD_AUART0_RX__AUART0_RX - MX28_PAD_AUART0_TX__AUART0_TX - MX28_PAD_AUART0_CTS__AUART0_CTS - MX28_PAD_AUART0_RTS__AUART0_RTS + 0x3000 /* MX28_PAD_AUART0_RX__AUART0_RX */ + 0x3010 /* MX28_PAD_AUART0_TX__AUART0_TX */ + 0x3020 /* MX28_PAD_AUART0_CTS__AUART0_CTS */ + 0x3030 /* MX28_PAD_AUART0_RTS__AUART0_RTS */ >; - fsl,drive-strength = <MXS_DRIVE_4mA>; - fsl,voltage = <MXS_VOLTAGE_HIGH>; - fsl,pull-up = <MXS_PULL_DISABLE>; + fsl,drive-strength = <0>; + fsl,voltage = <1>; + fsl,pull-up = <0>; }; auart0_2pins_a: auart0-2pins@0 { reg = <0>; fsl,pinmux-ids = < - MX28_PAD_AUART0_RX__AUART0_RX - MX28_PAD_AUART0_TX__AUART0_TX + 0x3000 /* MX28_PAD_AUART0_RX__AUART0_RX */ + 0x3010 /* MX28_PAD_AUART0_TX__AUART0_TX */ >; - fsl,drive-strength = <MXS_DRIVE_4mA>; - fsl,voltage = <MXS_VOLTAGE_HIGH>; - fsl,pull-up = <MXS_PULL_DISABLE>; + fsl,drive-strength = <0>; + fsl,voltage = <1>; + fsl,pull-up = <0>; }; auart1_pins_a: auart1@0 { reg = <0>; fsl,pinmux-ids = < - MX28_PAD_AUART1_RX__AUART1_RX - MX28_PAD_AUART1_TX__AUART1_TX - MX28_PAD_AUART1_CTS__AUART1_CTS - MX28_PAD_AUART1_RTS__AUART1_RTS + 0x3040 /* MX28_PAD_AUART1_RX__AUART1_RX */ + 0x3050 /* MX28_PAD_AUART1_TX__AUART1_TX */ + 0x3060 /* MX28_PAD_AUART1_CTS__AUART1_CTS */ + 0x3070 /* MX28_PAD_AUART1_RTS__AUART1_RTS */ >; - fsl,drive-strength = <MXS_DRIVE_4mA>; - fsl,voltage = <MXS_VOLTAGE_HIGH>; - fsl,pull-up = <MXS_PULL_DISABLE>; + fsl,drive-strength = <0>; + fsl,voltage = <1>; + fsl,pull-up = <0>; }; auart1_2pins_a: auart1-2pins@0 { reg = <0>; fsl,pinmux-ids = < - MX28_PAD_AUART1_RX__AUART1_RX - MX28_PAD_AUART1_TX__AUART1_TX + 0x3040 /* MX28_PAD_AUART1_RX__AUART1_RX */ + 0x3050 /* MX28_PAD_AUART1_TX__AUART1_TX */ >; - fsl,drive-strength = <MXS_DRIVE_4mA>; - fsl,voltage = <MXS_VOLTAGE_HIGH>; - fsl,pull-up = <MXS_PULL_DISABLE>; + fsl,drive-strength = <0>; + fsl,voltage = <1>; + fsl,pull-up = <0>; }; auart2_2pins_a: auart2-2pins@0 { reg = <0>; fsl,pinmux-ids = < - MX28_PAD_SSP2_SCK__AUART2_RX - MX28_PAD_SSP2_MOSI__AUART2_TX + 0x2101 /* MX28_PAD_SSP2_SCK__AUART2_RX */ + 0x2111 /* MX28_PAD_SSP2_MOSI__AUART2_TX */ >; - fsl,drive-strength = <MXS_DRIVE_4mA>; - fsl,voltage = <MXS_VOLTAGE_HIGH>; - fsl,pull-up = <MXS_PULL_DISABLE>; + fsl,drive-strength = <0>; + fsl,voltage = <1>; + fsl,pull-up = <0>; }; auart2_2pins_b: auart2-2pins@1 { reg = <1>; fsl,pinmux-ids = < - MX28_PAD_AUART2_RX__AUART2_RX - MX28_PAD_AUART2_TX__AUART2_TX + 0x3080 /* MX28_PAD_AUART2_RX__AUART2_RX */ + 0x3090 /* MX28_PAD_AUART2_TX__AUART2_TX */ >; - fsl,drive-strength = <MXS_DRIVE_4mA>; - fsl,voltage = <MXS_VOLTAGE_HIGH>; - fsl,pull-up = <MXS_PULL_DISABLE>; + fsl,drive-strength = <0>; + fsl,voltage = <1>; + fsl,pull-up = <0>; }; auart3_pins_a: auart3@0 { reg = <0>; fsl,pinmux-ids = < - MX28_PAD_AUART3_RX__AUART3_RX - MX28_PAD_AUART3_TX__AUART3_TX - MX28_PAD_AUART3_CTS__AUART3_CTS - MX28_PAD_AUART3_RTS__AUART3_RTS + 0x30c0 /* MX28_PAD_AUART3_RX__AUART3_RX */ + 0x30d0 /* MX28_PAD_AUART3_TX__AUART3_TX */ + 0x30e0 /* MX28_PAD_AUART3_CTS__AUART3_CTS */ + 0x30f0 /* MX28_PAD_AUART3_RTS__AUART3_RTS */ >; - fsl,drive-strength = <MXS_DRIVE_4mA>; - fsl,voltage = <MXS_VOLTAGE_HIGH>; - fsl,pull-up = <MXS_PULL_DISABLE>; + fsl,drive-strength = <0>; + fsl,voltage = <1>; + fsl,pull-up = <0>; }; auart3_2pins_a: auart3-2pins@0 { reg = <0>; fsl,pinmux-ids = < - MX28_PAD_SSP2_MISO__AUART3_RX - MX28_PAD_SSP2_SS0__AUART3_TX + 0x2121 /* MX28_PAD_SSP2_MISO__AUART3_RX */ + 0x2131 /* MX28_PAD_SSP2_SS0__AUART3_TX */ >; - fsl,drive-strength = <MXS_DRIVE_4mA>; - fsl,voltage = <MXS_VOLTAGE_HIGH>; - fsl,pull-up = <MXS_PULL_DISABLE>; + fsl,drive-strength = <0>; + fsl,voltage = <1>; + fsl,pull-up = <0>; }; auart3_2pins_b: auart3-2pins@1 { reg = <1>; fsl,pinmux-ids = < - MX28_PAD_AUART3_RX__AUART3_RX - MX28_PAD_AUART3_TX__AUART3_TX + 0x30c0 /* MX28_PAD_AUART3_RX__AUART3_RX */ + 0x30d0 /* MX28_PAD_AUART3_TX__AUART3_TX */ >; - fsl,drive-strength = <MXS_DRIVE_4mA>; - fsl,voltage = <MXS_VOLTAGE_HIGH>; - fsl,pull-up = <MXS_PULL_DISABLE>; + fsl,drive-strength = <0>; + fsl,voltage = <1>; + fsl,pull-up = <0>; }; auart4_2pins_a: auart4@0 { reg = <0>; fsl,pinmux-ids = < - MX28_PAD_SSP3_SCK__AUART4_TX - MX28_PAD_SSP3_MOSI__AUART4_RX + 0x2181 /* MX28_PAD_SSP3_SCK__AUART4_TX */ + 0x2191 /* MX28_PAD_SSP3_MOSI__AUART4_RX */ >; - fsl,drive-strength = <MXS_DRIVE_4mA>; - fsl,voltage = <MXS_VOLTAGE_HIGH>; - fsl,pull-up = <MXS_PULL_DISABLE>; + fsl,drive-strength = <0>; + fsl,voltage = <1>; + fsl,pull-up = <0>; }; mac0_pins_a: mac0@0 { reg = <0>; fsl,pinmux-ids = < - MX28_PAD_ENET0_MDC__ENET0_MDC - MX28_PAD_ENET0_MDIO__ENET0_MDIO - MX28_PAD_ENET0_RX_EN__ENET0_RX_EN - MX28_PAD_ENET0_RXD0__ENET0_RXD0 - MX28_PAD_ENET0_RXD1__ENET0_RXD1 - MX28_PAD_ENET0_TX_EN__ENET0_TX_EN - MX28_PAD_ENET0_TXD0__ENET0_TXD0 - MX28_PAD_ENET0_TXD1__ENET0_TXD1 - MX28_PAD_ENET_CLK__CLKCTRL_ENET + 0x4000 /* MX28_PAD_ENET0_MDC__ENET0_MDC */ + 0x4010 /* MX28_PAD_ENET0_MDIO__ENET0_MDIO */ + 0x4020 /* MX28_PAD_ENET0_RX_EN__ENET0_RX_EN */ + 0x4030 /* MX28_PAD_ENET0_RXD0__ENET0_RXD0 */ + 0x4040 /* MX28_PAD_ENET0_RXD1__ENET0_RXD1 */ + 0x4060 /* MX28_PAD_ENET0_TX_EN__ENET0_TX_EN */ + 0x4070 /* MX28_PAD_ENET0_TXD0__ENET0_TXD0 */ + 0x4080 /* MX28_PAD_ENET0_TXD1__ENET0_TXD1 */ + 0x4100 /* MX28_PAD_ENET_CLK__CLKCTRL_ENET */ >; - fsl,drive-strength = <MXS_DRIVE_8mA>; - fsl,voltage = <MXS_VOLTAGE_HIGH>; - fsl,pull-up = <MXS_PULL_ENABLE>; + fsl,drive-strength = <1>; + fsl,voltage = <1>; + fsl,pull-up = <1>; }; mac1_pins_a: mac1@0 { reg = <0>; fsl,pinmux-ids = < - MX28_PAD_ENET0_CRS__ENET1_RX_EN - MX28_PAD_ENET0_RXD2__ENET1_RXD0 - MX28_PAD_ENET0_RXD3__ENET1_RXD1 - MX28_PAD_ENET0_COL__ENET1_TX_EN - MX28_PAD_ENET0_TXD2__ENET1_TXD0 - MX28_PAD_ENET0_TXD3__ENET1_TXD1 + 0x40f1 /* MX28_PAD_ENET0_CRS__ENET1_RX_EN */ + 0x4091 /* MX28_PAD_ENET0_RXD2__ENET1_RXD0 */ + 0x40a1 /* MX28_PAD_ENET0_RXD3__ENET1_RXD1 */ + 0x40e1 /* MX28_PAD_ENET0_COL__ENET1_TX_EN */ + 0x40b1 /* MX28_PAD_ENET0_TXD2__ENET1_TXD0 */ + 0x40c1 /* MX28_PAD_ENET0_TXD3__ENET1_TXD1 */ >; - fsl,drive-strength = <MXS_DRIVE_8mA>; - fsl,voltage = <MXS_VOLTAGE_HIGH>; - fsl,pull-up = <MXS_PULL_ENABLE>; + fsl,drive-strength = <1>; + fsl,voltage = <1>; + fsl,pull-up = <1>; }; mmc0_8bit_pins_a: mmc0-8bit@0 { reg = <0>; fsl,pinmux-ids = < - MX28_PAD_SSP0_DATA0__SSP0_D0 - MX28_PAD_SSP0_DATA1__SSP0_D1 - MX28_PAD_SSP0_DATA2__SSP0_D2 - MX28_PAD_SSP0_DATA3__SSP0_D3 - MX28_PAD_SSP0_DATA4__SSP0_D4 - MX28_PAD_SSP0_DATA5__SSP0_D5 - MX28_PAD_SSP0_DATA6__SSP0_D6 - MX28_PAD_SSP0_DATA7__SSP0_D7 - MX28_PAD_SSP0_CMD__SSP0_CMD - MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT - MX28_PAD_SSP0_SCK__SSP0_SCK + 0x2000 /* MX28_PAD_SSP0_DATA0__SSP0_D0 */ + 0x2010 /* MX28_PAD_SSP0_DATA1__SSP0_D1 */ + 0x2020 /* MX28_PAD_SSP0_DATA2__SSP0_D2 */ + 0x2030 /* MX28_PAD_SSP0_DATA3__SSP0_D3 */ + 0x2040 /* MX28_PAD_SSP0_DATA4__SSP0_D4 */ + 0x2050 /* MX28_PAD_SSP0_DATA5__SSP0_D5 */ + 0x2060 /* MX28_PAD_SSP0_DATA6__SSP0_D6 */ + 0x2070 /* MX28_PAD_SSP0_DATA7__SSP0_D7 */ + 0x2080 /* MX28_PAD_SSP0_CMD__SSP0_CMD */ + 0x2090 /* MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT */ + 0x20a0 /* MX28_PAD_SSP0_SCK__SSP0_SCK */ >; - fsl,drive-strength = <MXS_DRIVE_8mA>; - fsl,voltage = <MXS_VOLTAGE_HIGH>; - fsl,pull-up = <MXS_PULL_ENABLE>; + fsl,drive-strength = <1>; + fsl,voltage = <1>; + fsl,pull-up = <1>; }; mmc0_4bit_pins_a: mmc0-4bit@0 { reg = <0>; fsl,pinmux-ids = < - MX28_PAD_SSP0_DATA0__SSP0_D0 - MX28_PAD_SSP0_DATA1__SSP0_D1 - MX28_PAD_SSP0_DATA2__SSP0_D2 - MX28_PAD_SSP0_DATA3__SSP0_D3 - MX28_PAD_SSP0_CMD__SSP0_CMD - MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT - MX28_PAD_SSP0_SCK__SSP0_SCK + 0x2000 /* MX28_PAD_SSP0_DATA0__SSP0_D0 */ + 0x2010 /* MX28_PAD_SSP0_DATA1__SSP0_D1 */ + 0x2020 /* MX28_PAD_SSP0_DATA2__SSP0_D2 */ + 0x2030 /* MX28_PAD_SSP0_DATA3__SSP0_D3 */ + 0x2080 /* MX28_PAD_SSP0_CMD__SSP0_CMD */ + 0x2090 /* MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT */ + 0x20a0 /* MX28_PAD_SSP0_SCK__SSP0_SCK */ >; - fsl,drive-strength = <MXS_DRIVE_8mA>; - fsl,voltage = <MXS_VOLTAGE_HIGH>; - fsl,pull-up = <MXS_PULL_ENABLE>; + fsl,drive-strength = <1>; + fsl,voltage = <1>; + fsl,pull-up = <1>; }; mmc0_cd_cfg: mmc0-cd-cfg { fsl,pinmux-ids = < - MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT + 0x2090 /* MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT */ >; - fsl,pull-up = <MXS_PULL_DISABLE>; + fsl,pull-up = <0>; }; mmc0_sck_cfg: mmc0-sck-cfg { fsl,pinmux-ids = < - MX28_PAD_SSP0_SCK__SSP0_SCK + 0x20a0 /* MX28_PAD_SSP0_SCK__SSP0_SCK */ >; - fsl,drive-strength = <MXS_DRIVE_12mA>; - fsl,pull-up = <MXS_PULL_DISABLE>; - }; - - mmc2_4bit_pins_a: mmc2-4bit@0 { - reg = <0>; - fsl,pinmux-ids = < - MX28_PAD_SSP0_DATA4__SSP2_D0 - MX28_PAD_SSP1_SCK__SSP2_D1 - MX28_PAD_SSP1_CMD__SSP2_D2 - MX28_PAD_SSP0_DATA5__SSP2_D3 - MX28_PAD_SSP0_DATA6__SSP2_CMD - MX28_PAD_AUART1_RX__SSP2_CARD_DETECT - MX28_PAD_SSP0_DATA7__SSP2_SCK - >; - fsl,drive-strength = <MXS_DRIVE_8mA>; - fsl,voltage = <MXS_VOLTAGE_HIGH>; - fsl,pull-up = <MXS_PULL_ENABLE>; - }; - - mmc2_cd_cfg: mmc2-cd-cfg { - fsl,pinmux-ids = < - MX28_PAD_AUART1_RX__SSP2_CARD_DETECT - >; - fsl,pull-up = <MXS_PULL_DISABLE>; - }; - - mmc2_sck_cfg: mmc2-sck-cfg { - fsl,pinmux-ids = < - MX28_PAD_SSP0_DATA7__SSP2_SCK - >; - fsl,drive-strength = <MXS_DRIVE_12mA>; - fsl,pull-up = <MXS_PULL_DISABLE>; + fsl,drive-strength = <2>; + fsl,pull-up = <0>; }; i2c0_pins_a: i2c0@0 { reg = <0>; fsl,pinmux-ids = < - MX28_PAD_I2C0_SCL__I2C0_SCL - MX28_PAD_I2C0_SDA__I2C0_SDA + 0x3180 /* MX28_PAD_I2C0_SCL__I2C0_SCL */ + 0x3190 /* MX28_PAD_I2C0_SDA__I2C0_SDA */ >; - fsl,drive-strength = <MXS_DRIVE_8mA>; - fsl,voltage = <MXS_VOLTAGE_HIGH>; - fsl,pull-up = <MXS_PULL_ENABLE>; + fsl,drive-strength = <1>; + fsl,voltage = <1>; + fsl,pull-up = <1>; }; i2c0_pins_b: i2c0@1 { reg = <1>; fsl,pinmux-ids = < - MX28_PAD_AUART0_RX__I2C0_SCL - MX28_PAD_AUART0_TX__I2C0_SDA + 0x3001 /* MX28_PAD_AUART0_RX__I2C0_SCL */ + 0x3011 /* MX28_PAD_AUART0_TX__I2C0_SDA */ >; - fsl,drive-strength = <MXS_DRIVE_8mA>; - fsl,voltage = <MXS_VOLTAGE_HIGH>; - fsl,pull-up = <MXS_PULL_ENABLE>; + fsl,drive-strength = <1>; + fsl,voltage = <1>; + fsl,pull-up = <1>; }; i2c1_pins_a: i2c1@0 { reg = <0>; fsl,pinmux-ids = < - MX28_PAD_PWM0__I2C1_SCL - MX28_PAD_PWM1__I2C1_SDA + 0x3101 /* MX28_PAD_PWM0__I2C1_SCL */ + 0x3111 /* MX28_PAD_PWM1__I2C1_SDA */ >; - fsl,drive-strength = <MXS_DRIVE_8mA>; - fsl,voltage = <MXS_VOLTAGE_HIGH>; - fsl,pull-up = <MXS_PULL_ENABLE>; + fsl,drive-strength = <1>; + fsl,voltage = <1>; + fsl,pull-up = <1>; }; saif0_pins_a: saif0@0 { reg = <0>; fsl,pinmux-ids = < - MX28_PAD_SAIF0_MCLK__SAIF0_MCLK - MX28_PAD_SAIF0_LRCLK__SAIF0_LRCLK - MX28_PAD_SAIF0_BITCLK__SAIF0_BITCLK - MX28_PAD_SAIF0_SDATA0__SAIF0_SDATA0 + 0x3140 /* MX28_PAD_SAIF0_MCLK__SAIF0_MCLK */ + 0x3150 /* MX28_PAD_SAIF0_LRCLK__SAIF0_LRCLK */ + 0x3160 /* MX28_PAD_SAIF0_BITCLK__SAIF0_BITCLK */ + 0x3170 /* MX28_PAD_SAIF0_SDATA0__SAIF0_SDATA0 */ >; - fsl,drive-strength = <MXS_DRIVE_12mA>; - fsl,voltage = <MXS_VOLTAGE_HIGH>; - fsl,pull-up = <MXS_PULL_ENABLE>; + fsl,drive-strength = <2>; + fsl,voltage = <1>; + fsl,pull-up = <1>; }; saif0_pins_b: saif0@1 { reg = <1>; fsl,pinmux-ids = < - MX28_PAD_SAIF0_LRCLK__SAIF0_LRCLK - MX28_PAD_SAIF0_BITCLK__SAIF0_BITCLK - MX28_PAD_SAIF0_SDATA0__SAIF0_SDATA0 + 0x3150 /* MX28_PAD_SAIF0_LRCLK__SAIF0_LRCLK */ + 0x3160 /* MX28_PAD_SAIF0_BITCLK__SAIF0_BITCLK */ + 0x3170 /* MX28_PAD_SAIF0_SDATA0__SAIF0_SDATA0 */ >; - fsl,drive-strength = <MXS_DRIVE_12mA>; - fsl,voltage = <MXS_VOLTAGE_HIGH>; - fsl,pull-up = <MXS_PULL_ENABLE>; + fsl,drive-strength = <2>; + fsl,voltage = <1>; + fsl,pull-up = <1>; }; saif1_pins_a: saif1@0 { reg = <0>; fsl,pinmux-ids = < - MX28_PAD_SAIF1_SDATA0__SAIF1_SDATA0 + 0x31a0 /* MX28_PAD_SAIF1_SDATA0__SAIF1_SDATA0 */ >; - fsl,drive-strength = <MXS_DRIVE_12mA>; - fsl,voltage = <MXS_VOLTAGE_HIGH>; - fsl,pull-up = <MXS_PULL_ENABLE>; + fsl,drive-strength = <2>; + fsl,voltage = <1>; + fsl,pull-up = <1>; }; pwm0_pins_a: pwm0@0 { reg = <0>; fsl,pinmux-ids = < - MX28_PAD_PWM0__PWM_0 + 0x3100 /* MX28_PAD_PWM0__PWM_0 */ >; - fsl,drive-strength = <MXS_DRIVE_4mA>; - fsl,voltage = <MXS_VOLTAGE_HIGH>; - fsl,pull-up = <MXS_PULL_DISABLE>; + fsl,drive-strength = <0>; + fsl,voltage = <1>; + fsl,pull-up = <0>; }; pwm2_pins_a: pwm2@0 { reg = <0>; fsl,pinmux-ids = < - MX28_PAD_PWM2__PWM_2 + 0x3120 /* MX28_PAD_PWM2__PWM_2 */ >; - fsl,drive-strength = <MXS_DRIVE_4mA>; - fsl,voltage = <MXS_VOLTAGE_HIGH>; - fsl,pull-up = <MXS_PULL_DISABLE>; + fsl,drive-strength = <0>; + fsl,voltage = <1>; + fsl,pull-up = <0>; }; pwm3_pins_a: pwm3@0 { reg = <0>; fsl,pinmux-ids = < - MX28_PAD_PWM3__PWM_3 + 0x31c0 /* MX28_PAD_PWM3__PWM_3 */ >; - fsl,drive-strength = <MXS_DRIVE_4mA>; - fsl,voltage = <MXS_VOLTAGE_HIGH>; - fsl,pull-up = <MXS_PULL_DISABLE>; + fsl,drive-strength = <0>; + fsl,voltage = <1>; + fsl,pull-up = <0>; }; pwm3_pins_b: pwm3@1 { reg = <1>; fsl,pinmux-ids = < - MX28_PAD_SAIF0_MCLK__PWM_3 + 0x3141 /* MX28_PAD_SAIF0_MCLK__PWM3 */ >; - fsl,drive-strength = <MXS_DRIVE_4mA>; - fsl,voltage = <MXS_VOLTAGE_HIGH>; - fsl,pull-up = <MXS_PULL_DISABLE>; + fsl,drive-strength = <0>; + fsl,voltage = <1>; + fsl,pull-up = <0>; }; pwm4_pins_a: pwm4@0 { reg = <0>; fsl,pinmux-ids = < - MX28_PAD_PWM4__PWM_4 + 0x31d0 /* MX28_PAD_PWM4__PWM_4 */ >; - fsl,drive-strength = <MXS_DRIVE_4mA>; - fsl,voltage = <MXS_VOLTAGE_HIGH>; - fsl,pull-up = <MXS_PULL_DISABLE>; + fsl,drive-strength = <0>; + fsl,voltage = <1>; + fsl,pull-up = <0>; }; lcdif_24bit_pins_a: lcdif-24bit@0 { reg = <0>; fsl,pinmux-ids = < - MX28_PAD_LCD_D00__LCD_D0 - MX28_PAD_LCD_D01__LCD_D1 - MX28_PAD_LCD_D02__LCD_D2 - MX28_PAD_LCD_D03__LCD_D3 - MX28_PAD_LCD_D04__LCD_D4 - MX28_PAD_LCD_D05__LCD_D5 - MX28_PAD_LCD_D06__LCD_D6 - MX28_PAD_LCD_D07__LCD_D7 - MX28_PAD_LCD_D08__LCD_D8 - MX28_PAD_LCD_D09__LCD_D9 - MX28_PAD_LCD_D10__LCD_D10 - MX28_PAD_LCD_D11__LCD_D11 - MX28_PAD_LCD_D12__LCD_D12 - MX28_PAD_LCD_D13__LCD_D13 - MX28_PAD_LCD_D14__LCD_D14 - MX28_PAD_LCD_D15__LCD_D15 - MX28_PAD_LCD_D16__LCD_D16 - MX28_PAD_LCD_D17__LCD_D17 - MX28_PAD_LCD_D18__LCD_D18 - MX28_PAD_LCD_D19__LCD_D19 - MX28_PAD_LCD_D20__LCD_D20 - MX28_PAD_LCD_D21__LCD_D21 - MX28_PAD_LCD_D22__LCD_D22 - MX28_PAD_LCD_D23__LCD_D23 + 0x1000 /* MX28_PAD_LCD_D00__LCD_D0 */ + 0x1010 /* MX28_PAD_LCD_D01__LCD_D1 */ + 0x1020 /* MX28_PAD_LCD_D02__LCD_D2 */ + 0x1030 /* MX28_PAD_LCD_D03__LCD_D3 */ + 0x1040 /* MX28_PAD_LCD_D04__LCD_D4 */ + 0x1050 /* MX28_PAD_LCD_D05__LCD_D5 */ + 0x1060 /* MX28_PAD_LCD_D06__LCD_D6 */ + 0x1070 /* MX28_PAD_LCD_D07__LCD_D7 */ + 0x1080 /* MX28_PAD_LCD_D08__LCD_D8 */ + 0x1090 /* MX28_PAD_LCD_D09__LCD_D9 */ + 0x10a0 /* MX28_PAD_LCD_D10__LCD_D10 */ + 0x10b0 /* MX28_PAD_LCD_D11__LCD_D11 */ + 0x10c0 /* MX28_PAD_LCD_D12__LCD_D12 */ + 0x10d0 /* MX28_PAD_LCD_D13__LCD_D13 */ + 0x10e0 /* MX28_PAD_LCD_D14__LCD_D14 */ + 0x10f0 /* MX28_PAD_LCD_D15__LCD_D15 */ + 0x1100 /* MX28_PAD_LCD_D16__LCD_D16 */ + 0x1110 /* MX28_PAD_LCD_D17__LCD_D17 */ + 0x1120 /* MX28_PAD_LCD_D18__LCD_D18 */ + 0x1130 /* MX28_PAD_LCD_D19__LCD_D19 */ + 0x1140 /* MX28_PAD_LCD_D20__LCD_D20 */ + 0x1150 /* MX28_PAD_LCD_D21__LCD_D21 */ + 0x1160 /* MX28_PAD_LCD_D22__LCD_D22 */ + 0x1170 /* MX28_PAD_LCD_D23__LCD_D23 */ >; - fsl,drive-strength = <MXS_DRIVE_4mA>; - fsl,voltage = <MXS_VOLTAGE_HIGH>; - fsl,pull-up = <MXS_PULL_DISABLE>; + fsl,drive-strength = <0>; + fsl,voltage = <1>; + fsl,pull-up = <0>; }; lcdif_16bit_pins_a: lcdif-16bit@0 { reg = <0>; fsl,pinmux-ids = < - MX28_PAD_LCD_D00__LCD_D0 - MX28_PAD_LCD_D01__LCD_D1 - MX28_PAD_LCD_D02__LCD_D2 - MX28_PAD_LCD_D03__LCD_D3 - MX28_PAD_LCD_D04__LCD_D4 - MX28_PAD_LCD_D05__LCD_D5 - MX28_PAD_LCD_D06__LCD_D6 - MX28_PAD_LCD_D07__LCD_D7 - MX28_PAD_LCD_D08__LCD_D8 - MX28_PAD_LCD_D09__LCD_D9 - MX28_PAD_LCD_D10__LCD_D10 - MX28_PAD_LCD_D11__LCD_D11 - MX28_PAD_LCD_D12__LCD_D12 - MX28_PAD_LCD_D13__LCD_D13 - MX28_PAD_LCD_D14__LCD_D14 - MX28_PAD_LCD_D15__LCD_D15 + 0x1000 /* MX28_PAD_LCD_D00__LCD_D0 */ + 0x1010 /* MX28_PAD_LCD_D01__LCD_D1 */ + 0x1020 /* MX28_PAD_LCD_D02__LCD_D2 */ + 0x1030 /* MX28_PAD_LCD_D03__LCD_D3 */ + 0x1040 /* MX28_PAD_LCD_D04__LCD_D4 */ + 0x1050 /* MX28_PAD_LCD_D05__LCD_D5 */ + 0x1060 /* MX28_PAD_LCD_D06__LCD_D6 */ + 0x1070 /* MX28_PAD_LCD_D07__LCD_D7 */ + 0x1080 /* MX28_PAD_LCD_D08__LCD_D8 */ + 0x1090 /* MX28_PAD_LCD_D09__LCD_D9 */ + 0x10a0 /* MX28_PAD_LCD_D10__LCD_D10 */ + 0x10b0 /* MX28_PAD_LCD_D11__LCD_D11 */ + 0x10c0 /* MX28_PAD_LCD_D12__LCD_D12 */ + 0x10d0 /* MX28_PAD_LCD_D13__LCD_D13 */ + 0x10e0 /* MX28_PAD_LCD_D14__LCD_D14 */ + 0x10f0 /* MX28_PAD_LCD_D15__LCD_D15 */ >; - fsl,drive-strength = <MXS_DRIVE_4mA>; - fsl,voltage = <MXS_VOLTAGE_HIGH>; - fsl,pull-up = <MXS_PULL_DISABLE>; + fsl,drive-strength = <0>; + fsl,voltage = <1>; + fsl,pull-up = <0>; }; lcdif_sync_pins_a: lcdif-sync@0 { reg = <0>; fsl,pinmux-ids = < - MX28_PAD_LCD_RS__LCD_DOTCLK - MX28_PAD_LCD_CS__LCD_ENABLE - MX28_PAD_LCD_RD_E__LCD_VSYNC - MX28_PAD_LCD_WR_RWN__LCD_HSYNC + 0x11a1 /* MX28_PAD_LCD_RS__LCD_DOTCLK */ + 0x11b1 /* MX28_PAD_LCD_CS__LCD_ENABLE */ + 0x1181 /* MX28_PAD_LCD_RD_E__LCD_VSYNC */ + 0x1191 /* MX28_PAD_LCD_WR_RWN__LCD_HSYNC */ >; - fsl,drive-strength = <MXS_DRIVE_4mA>; - fsl,voltage = <MXS_VOLTAGE_HIGH>; - fsl,pull-up = <MXS_PULL_DISABLE>; + fsl,drive-strength = <0>; + fsl,voltage = <1>; + fsl,pull-up = <0>; }; can0_pins_a: can0@0 { reg = <0>; fsl,pinmux-ids = < - MX28_PAD_GPMI_RDY2__CAN0_TX - MX28_PAD_GPMI_RDY3__CAN0_RX + 0x0161 /* MX28_PAD_GPMI_RDY2__CAN0_TX */ + 0x0171 /* MX28_PAD_GPMI_RDY3__CAN0_RX */ >; - fsl,drive-strength = <MXS_DRIVE_4mA>; - fsl,voltage = <MXS_VOLTAGE_HIGH>; - fsl,pull-up = <MXS_PULL_DISABLE>; + fsl,drive-strength = <0>; + fsl,voltage = <1>; + fsl,pull-up = <0>; }; can1_pins_a: can1@0 { reg = <0>; fsl,pinmux-ids = < - MX28_PAD_GPMI_CE2N__CAN1_TX - MX28_PAD_GPMI_CE3N__CAN1_RX + 0x0121 /* MX28_PAD_GPMI_CE2N__CAN1_TX */ + 0x0131 /* MX28_PAD_GPMI_CE3N__CAN1_RX */ >; - fsl,drive-strength = <MXS_DRIVE_4mA>; - fsl,voltage = <MXS_VOLTAGE_HIGH>; - fsl,pull-up = <MXS_PULL_DISABLE>; + fsl,drive-strength = <0>; + fsl,voltage = <1>; + fsl,pull-up = <0>; }; spi2_pins_a: spi2@0 { reg = <0>; fsl,pinmux-ids = < - MX28_PAD_SSP2_SCK__SSP2_SCK - MX28_PAD_SSP2_MOSI__SSP2_CMD - MX28_PAD_SSP2_MISO__SSP2_D0 - MX28_PAD_SSP2_SS0__SSP2_D3 + 0x2100 /* MX28_PAD_SSP2_SCK__SSP2_SCK */ + 0x2110 /* MX28_PAD_SSP2_MOSI__SSP2_CMD */ + 0x2120 /* MX28_PAD_SSP2_MISO__SSP2_D0 */ + 0x2130 /* MX28_PAD_SSP2_SS0__SSP2_D3 */ >; - fsl,drive-strength = <MXS_DRIVE_8mA>; - fsl,voltage = <MXS_VOLTAGE_HIGH>; - fsl,pull-up = <MXS_PULL_ENABLE>; + fsl,drive-strength = <1>; + fsl,voltage = <1>; + fsl,pull-up = <1>; }; spi3_pins_a: spi3@0 { reg = <0>; fsl,pinmux-ids = < - MX28_PAD_AUART2_RX__SSP3_D4 - MX28_PAD_AUART2_TX__SSP3_D5 - MX28_PAD_SSP3_SCK__SSP3_SCK - MX28_PAD_SSP3_MOSI__SSP3_CMD - MX28_PAD_SSP3_MISO__SSP3_D0 - MX28_PAD_SSP3_SS0__SSP3_D3 + 0x3082 /* MX28_PAD_AUART2_RX__SSP3_D4 */ + 0x3092 /* MX28_PAD_AUART2_TX__SSP3_D5 */ + 0x2180 /* MX28_PAD_SSP3_SCK__SSP3_SCK */ + 0x2190 /* MX28_PAD_SSP3_MOSI__SSP3_CMD */ + 0x21A0 /* MX28_PAD_SSP3_MISO__SSP3_D0 */ + 0x21B0 /* MX28_PAD_SSP3_SS0__SSP3_D3 */ >; - fsl,drive-strength = <MXS_DRIVE_8mA>; - fsl,voltage = <MXS_VOLTAGE_HIGH>; - fsl,pull-up = <MXS_PULL_DISABLE>; + fsl,drive-strength = <1>; + fsl,voltage = <1>; + fsl,pull-up = <0>; }; usbphy0_pins_a: usbphy0@0 { reg = <0>; fsl,pinmux-ids = < - MX28_PAD_SSP2_SS2__USB0_OVERCURRENT + 0x2152 /* MX28_PAD_SSP2_SS2__USB0_OVERCURRENT */ >; - fsl,drive-strength = <MXS_DRIVE_12mA>; - fsl,voltage = <MXS_VOLTAGE_HIGH>; - fsl,pull-up = <MXS_PULL_DISABLE>; + fsl,drive-strength = <2>; + fsl,voltage = <1>; + fsl,pull-up = <0>; }; usbphy0_pins_b: usbphy0@1 { reg = <1>; fsl,pinmux-ids = < - MX28_PAD_AUART1_CTS__USB0_OVERCURRENT + 0x3061 /* MX28_PAD_AUART1_CTS__USB0_OVERCURRENT */ >; - fsl,drive-strength = <MXS_DRIVE_12mA>; - fsl,voltage = <MXS_VOLTAGE_HIGH>; - fsl,pull-up = <MXS_PULL_DISABLE>; + fsl,drive-strength = <2>; + fsl,voltage = <1>; + fsl,pull-up = <0>; }; usbphy1_pins_a: usbphy1@0 { reg = <0>; fsl,pinmux-ids = < - MX28_PAD_SSP2_SS1__USB1_OVERCURRENT - >; - fsl,drive-strength = <MXS_DRIVE_12mA>; - fsl,voltage = <MXS_VOLTAGE_HIGH>; - fsl,pull-up = <MXS_PULL_DISABLE>; - }; - - usb0_id_pins_a: usb0id@0 { - reg = <0>; - fsl,pinmux-ids = < - MX28_PAD_AUART1_RTS__USB0_ID + 0x2142 /* MX28_PAD_SSP2_SS1__USB1_OVERCURRENT */ >; - fsl,drive-strength = <MXS_DRIVE_12mA>; - fsl,voltage = <MXS_VOLTAGE_HIGH>; - fsl,pull-up = <MXS_PULL_ENABLE>; + fsl,drive-strength = <2>; + fsl,voltage = <1>; + fsl,pull-up = <0>; }; }; @@ -944,7 +902,6 @@ interrupts = <10 14 15 16 17 18 19 20 21 22 23 24 25>; status = "disabled"; - clocks = <&clks 41>; }; spdif: spdif@80054000 { diff --git a/arch/arm/boot/dts/imx51-apf51dev.dts b/arch/arm/boot/dts/imx51-apf51dev.dts index 5a7f552..123fe84 100644 --- a/arch/arm/boot/dts/imx51-apf51dev.dts +++ b/arch/arm/boot/dts/imx51-apf51dev.dts @@ -16,33 +16,6 @@ model = "Armadeus Systems APF51Dev docking/development board"; compatible = "armadeus,imx51-apf51dev", "armadeus,imx51-apf51", "fsl,imx51"; - display@di1 { - compatible = "fsl,imx-parallel-display"; - crtcs = <&ipu 0>; - interface-pix-fmt = "bgr666"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_ipu_disp1_1>; - - display-timings { - lw700 { - native-mode; - clock-frequency = <33000033>; - hactive = <800>; - vactive = <480>; - hback-porch = <96>; - hfront-porch = <96>; - vback-porch = <20>; - vfront-porch = <21>; - hsync-len = <64>; - vsync-len = <4>; - hsync-active = <1>; - vsync-active = <1>; - de-active = <1>; - pixelclk-active = <0>; - }; - }; - }; - gpio-keys { compatible = "gpio-keys"; diff --git a/arch/arm/boot/dts/imx51-babbage.dts b/arch/arm/boot/dts/imx51-babbage.dts index be1407c..1d337d9 100644 --- a/arch/arm/boot/dts/imx51-babbage.dts +++ b/arch/arm/boot/dts/imx51-babbage.dts @@ -27,20 +27,6 @@ interface-pix-fmt = "rgb24"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_ipu_disp1_1>; - display-timings { - native-mode = <&timing0>; - timing0: dvi { - clock-frequency = <65000000>; - hactive = <1024>; - vactive = <768>; - hback-porch = <220>; - hfront-porch = <40>; - vback-porch = <21>; - vfront-porch = <7>; - hsync-len = <60>; - vsync-len = <10>; - }; - }; }; display@di1 { @@ -49,25 +35,6 @@ interface-pix-fmt = "rgb565"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_ipu_disp2_1>; - status = "disabled"; - display-timings { - native-mode = <&timing1>; - timing1: claawvga { - clock-frequency = <27000000>; - hactive = <800>; - vactive = <480>; - hback-porch = <40>; - hfront-porch = <60>; - vback-porch = <10>; - vfront-porch = <10>; - hsync-len = <20>; - vsync-len = <10>; - hsync-active = <0>; - vsync-active = <0>; - de-active = <1>; - pixelclk-active = <0>; - }; - }; }; gpio-keys { @@ -128,7 +95,7 @@ &uart3 { pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart3_1 &pinctrl_uart3_rtscts_1>; + pinctrl-0 = <&pinctrl_uart3_1>; fsl,uart-has-rtscts; status = "okay"; }; @@ -285,7 +252,7 @@ &uart1 { pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart1_1 &pinctrl_uart1_rtscts_1>; + pinctrl-0 = <&pinctrl_uart1_1>; fsl,uart-has-rtscts; status = "okay"; }; diff --git a/arch/arm/boot/dts/imx51.dtsi b/arch/arm/boot/dts/imx51.dtsi index 4bcdd3a..54cee65 100644 --- a/arch/arm/boot/dts/imx51.dtsi +++ b/arch/arm/boot/dts/imx51.dtsi @@ -86,11 +86,6 @@ interrupt-parent = <&tzic>; ranges; - iram: iram@1ffe0000 { - compatible = "mmio-sram"; - reg = <0x1ffe0000 0x20000>; - }; - ipu: ipu@40000000 { #crtc-cells = <1>; compatible = "fsl,imx51-ipu"; @@ -190,7 +185,7 @@ usbphy0: usbphy@0 { compatible = "usb-nop-xceiv"; - clocks = <&clks 75>; + clocks = <&clks 124>; clock-names = "main_clk"; status = "okay"; }; @@ -379,14 +374,6 @@ clocks = <&clks 107>; }; - owire: owire@83fa4000 { - compatible = "fsl,imx51-owire", "fsl,imx21-owire"; - reg = <0x83fa4000 0x4000>; - interrupts = <88>; - clocks = <&clks 159>; - status = "disabled"; - }; - ecspi2: ecspi@83fac000 { #address-cells = <1>; #size-cells = <0>; @@ -760,11 +747,6 @@ fsl,pins = < MX51_PAD_UART1_RXD__UART1_RXD 0x1c5 MX51_PAD_UART1_TXD__UART1_TXD 0x1c5 - >; - }; - - pinctrl_uart1_rtscts_1: uart1rtscts-1 { - fsl,pins = < MX51_PAD_UART1_RTS__UART1_RTS 0x1c5 MX51_PAD_UART1_CTS__UART1_CTS 0x1c5 >; @@ -785,11 +767,6 @@ fsl,pins = < MX51_PAD_EIM_D25__UART3_RXD 0x1c5 MX51_PAD_EIM_D26__UART3_TXD 0x1c5 - >; - }; - - pinctrl_uart3_rtscts_1: uart3rtscts-1 { - fsl,pins = < MX51_PAD_EIM_D27__UART3_RTS 0x1c5 MX51_PAD_EIM_D24__UART3_CTS 0x1c5 >; diff --git a/arch/arm/boot/dts/imx53-qsb.dts b/arch/arm/boot/dts/imx53-qsb.dts index 91a5935..e97ddae 100644 --- a/arch/arm/boot/dts/imx53-qsb.dts +++ b/arch/arm/boot/dts/imx53-qsb.dts @@ -55,20 +55,19 @@ label = "Power Button"; gpios = <&gpio1 8 0>; linux,code = <116>; /* KEY_POWER */ + gpio-key,wakeup; }; volume-up { label = "Volume Up"; gpios = <&gpio2 14 0>; linux,code = <115>; /* KEY_VOLUMEUP */ - gpio-key,wakeup; }; volume-down { label = "Volume Down"; gpios = <&gpio2 15 0>; linux,code = <114>; /* KEY_VOLUMEDOWN */ - gpio-key,wakeup; }; }; @@ -123,6 +122,7 @@ &esdhc1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_esdhc1_1>; + cd-gpios = <&gpio3 13 0>; status = "okay"; }; @@ -136,7 +136,6 @@ pinctrl-0 = <&pinctrl_esdhc3_1>; cd-gpios = <&gpio3 11 0>; wp-gpios = <&gpio3 12 0>; - bus-width = <8>; status = "okay"; }; @@ -153,6 +152,7 @@ MX53_PAD_PATA_DATA15__GPIO2_15 0x80000000 MX53_PAD_EIM_DA11__GPIO3_11 0x80000000 MX53_PAD_EIM_DA12__GPIO3_12 0x80000000 + MX53_PAD_EIM_DA13__GPIO3_13 0x80000000 MX53_PAD_PATA_DA_0__GPIO7_6 0x80000000 MX53_PAD_PATA_DA_2__GPIO7_8 0x80000000 MX53_PAD_GPIO_16__GPIO7_11 0x80000000 @@ -318,6 +318,5 @@ }; &usbotg { - dr_mode = "peripheral"; - status = "okay"; + status = "okay"; }; diff --git a/arch/arm/boot/dts/imx6q-pinfunc.h b/arch/arm/boot/dts/imx6q-pinfunc.h index 97ed081..9bbe82b 100644 --- a/arch/arm/boot/dts/imx6q-pinfunc.h +++ b/arch/arm/boot/dts/imx6q-pinfunc.h @@ -536,7 +536,7 @@ #define MX6QDL_PAD_ENET_REF_CLK__ESAI_RX_FS 0x1d4 0x4e8 0x85c 0x2 0x0 #define MX6QDL_PAD_ENET_REF_CLK__GPIO1_IO23 0x1d4 0x4e8 0x000 0x5 0x0 #define MX6QDL_PAD_ENET_REF_CLK__SPDIF_SR_CLK 0x1d4 0x4e8 0x000 0x6 0x0 -#define MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x1d8 0x4ec 0x004 0x0 0xff0d0100 +#define MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x1d8 0x4ec 0x000 0x0 0x0 #define MX6QDL_PAD_ENET_RX_ER__ENET_RX_ER 0x1d8 0x4ec 0x000 0x1 0x0 #define MX6QDL_PAD_ENET_RX_ER__ESAI_RX_HF_CLK 0x1d8 0x4ec 0x864 0x2 0x0 #define MX6QDL_PAD_ENET_RX_ER__SPDIF_IN 0x1d8 0x4ec 0x914 0x3 0x1 @@ -654,7 +654,7 @@ #define MX6QDL_PAD_GPIO_1__ESAI_RX_CLK 0x224 0x5f4 0x86c 0x0 0x1 #define MX6QDL_PAD_GPIO_1__WDOG2_B 0x224 0x5f4 0x000 0x1 0x0 #define MX6QDL_PAD_GPIO_1__KEY_ROW5 0x224 0x5f4 0x8f4 0x2 0x0 -#define MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x224 0x5f4 0x004 0x3 0xff0d0101 +#define MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x224 0x5f4 0x000 0x3 0x0 #define MX6QDL_PAD_GPIO_1__PWM2_OUT 0x224 0x5f4 0x000 0x4 0x0 #define MX6QDL_PAD_GPIO_1__GPIO1_IO01 0x224 0x5f4 0x000 0x5 0x0 #define MX6QDL_PAD_GPIO_1__SD1_CD_B 0x224 0x5f4 0x000 0x6 0x0 diff --git a/arch/arm/boot/dts/imx6q-sabrelite.dts b/arch/arm/boot/dts/imx6q-sabrelite.dts index f004913..3530280 100644 --- a/arch/arm/boot/dts/imx6q-sabrelite.dts +++ b/arch/arm/boot/dts/imx6q-sabrelite.dts @@ -65,10 +65,8 @@ }; }; -&audmux { +&sata { status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_audmux_1>; }; &ecspi1 { @@ -85,27 +83,9 @@ }; }; -&fec { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_enet_1>; - phy-mode = "rgmii"; - phy-reset-gpios = <&gpio3 23 0>; - status = "okay"; -}; - -&i2c1 { +&ssi1 { + fsl,mode = "i2s-slave"; status = "okay"; - clock-frequency = <100000>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c1_1>; - - codec: sgtl5000@0a { - compatible = "fsl,sgtl5000"; - reg = <0x0a>; - clocks = <&clks 201>; - VDDA-supply = <®_2p5v>; - VDDIO-supply = <®_3p3v>; - }; }; &iomuxc { @@ -123,61 +103,28 @@ MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x80000000 MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x1f0b0 MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x80000000 - MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x80000000 >; }; }; }; -&ldb { - status = "okay"; - - lvds-channel@0 { - fsl,data-mapping = "spwg"; - fsl,data-width = <18>; - status = "okay"; - - display-timings { - native-mode = <&timing0>; - timing0: hsd100pxn1 { - clock-frequency = <65000000>; - hactive = <1024>; - vactive = <768>; - hback-porch = <220>; - hfront-porch = <40>; - vback-porch = <21>; - vfront-porch = <7>; - hsync-len = <60>; - vsync-len = <10>; - }; - }; - }; -}; - -&sata { - status = "okay"; -}; - -&ssi1 { - fsl,mode = "i2s-slave"; - status = "okay"; -}; - -&uart2 { - status = "okay"; +&usbotg { + vbus-supply = <®_usb_otg_vbus>; pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart2_1>; + pinctrl-0 = <&pinctrl_usbotg_1>; + disable-over-current; + status = "okay"; }; &usbh1 { status = "okay"; }; -&usbotg { - vbus-supply = <®_usb_otg_vbus>; +&fec { pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_usbotg_1>; - disable-over-current; + pinctrl-0 = <&pinctrl_enet_1>; + phy-mode = "rgmii"; + phy-reset-gpios = <&gpio3 23 0>; status = "okay"; }; @@ -198,3 +145,30 @@ vmmc-supply = <®_3p3v>; status = "okay"; }; + +&audmux { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_audmux_1>; +}; + +&uart2 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart2_1>; +}; + +&i2c1 { + status = "okay"; + clock-frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c1_1>; + + codec: sgtl5000@0a { + compatible = "fsl,sgtl5000"; + reg = <0x0a>; + clocks = <&clks 201>; + VDDA-supply = <®_2p5v>; + VDDIO-supply = <®_3p3v>; + }; +}; diff --git a/arch/arm/boot/dts/imx6q-udoo.dts b/arch/arm/boot/dts/imx6q-udoo.dts deleted file mode 100644 index 6e1ccdc..0000000 --- a/arch/arm/boot/dts/imx6q-udoo.dts +++ /dev/null @@ -1,39 +0,0 @@ -/* - * Copyright 2013 Freescale Semiconductor, Inc. - * - * Author: Fabio Estevam <fabio.estevam@freescale.com> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - */ - -/dts-v1/; -#include "imx6q.dtsi" - -/ { - model = "Udoo i.MX6 Quad Board"; - compatible = "udoo,imx6q-udoo", "fsl,imx6q"; - - memory { - reg = <0x10000000 0x40000000>; - }; -}; - -&sata { - status = "okay"; -}; - -&uart2 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart2_1>; - status = "okay"; -}; - -&usdhc3 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_usdhc3_2>; - non-removable; - status = "okay"; -}; diff --git a/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi b/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi index ff6f1e8..1cbbc51 100644 --- a/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi +++ b/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi @@ -54,7 +54,6 @@ fsl,pins = < MX6QDL_PAD_NANDF_CS2__GPIO6_IO15 0x80000000 MX6QDL_PAD_SD2_DAT2__GPIO1_IO13 0x80000000 - MX6QDL_PAD_GPIO_18__SD3_VSELECT 0x17059 >; }; }; @@ -75,10 +74,8 @@ }; &usdhc3 { - pinctrl-names = "default", "state_100mhz", "state_200mhz"; + pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usdhc3_1>; - pinctrl-1 = <&pinctrl_usdhc3_1_100mhz>; - pinctrl-2 = <&pinctrl_usdhc3_1_200mhz>; cd-gpios = <&gpio6 15 0>; wp-gpios = <&gpio1 13 0>; status = "okay"; diff --git a/arch/arm/boot/dts/imx6qdl-sabresd.dtsi b/arch/arm/boot/dts/imx6qdl-sabresd.dtsi index e75e11b..39eafc2 100644 --- a/arch/arm/boot/dts/imx6qdl-sabresd.dtsi +++ b/arch/arm/boot/dts/imx6qdl-sabresd.dtsi @@ -80,14 +80,6 @@ mux-int-port = <2>; mux-ext-port = <3>; }; - - backlight { - compatible = "pwm-backlight"; - pwms = <&pwm1 0 5000000>; - brightness-levels = <0 4 8 16 32 64 128 255>; - default-brightness-level = <7>; - status = "okay"; - }; }; &audmux { @@ -116,7 +108,6 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_enet_1>; phy-mode = "rgmii"; - phy-reset-gpios = <&gpio1 25 0>; status = "okay"; }; @@ -181,7 +172,6 @@ MX6QDL_PAD_NANDF_CLE__GPIO6_IO07 0x80000000 MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000 MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x80000000 - MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x80000000 >; }; }; @@ -212,12 +202,6 @@ }; }; -&pwm1 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_pwm0_1>; - status = "okay"; -}; - &ssi2 { fsl,mode = "i2s-slave"; status = "okay"; @@ -245,7 +229,6 @@ &usdhc2 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usdhc2_1>; - bus-width = <8>; cd-gpios = <&gpio2 2 0>; wp-gpios = <&gpio2 3 0>; status = "okay"; @@ -254,7 +237,6 @@ &usdhc3 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usdhc3_1>; - bus-width = <8>; cd-gpios = <&gpio2 0 0>; wp-gpios = <&gpio2 1 0>; status = "okay"; diff --git a/arch/arm/boot/dts/imx6qdl-wandboard.dtsi b/arch/arm/boot/dts/imx6qdl-wandboard.dtsi index 35f5479..a55113e 100644 --- a/arch/arm/boot/dts/imx6qdl-wandboard.dtsi +++ b/arch/arm/boot/dts/imx6qdl-wandboard.dtsi @@ -43,13 +43,6 @@ mux-int-port = <1>; mux-ext-port = <3>; }; - - sound-spdif { - compatible = "fsl,imx-audio-spdif"; - model = "imx-spdif"; - spdif-controller = <&spdif>; - spdif-out; - }; }; &audmux { @@ -88,7 +81,6 @@ MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x80000000 /* WL_REG_ON */ MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000 /* WL_HOST_WAKE */ MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x80000000 /* WL_WAKE */ - MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x80000000 >; }; }; @@ -98,13 +90,6 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_enet_1>; phy-mode = "rgmii"; - phy-reset-gpios = <&gpio3 29 0>; - status = "okay"; -}; - -&spdif { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_spdif_3>; status = "okay"; }; @@ -130,14 +115,6 @@ status = "okay"; }; -&usbotg { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_usbotg_1>; - disable-over-current; - dr_mode = "peripheral"; - status = "okay"; -}; - &usdhc1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usdhc1_2>; diff --git a/arch/arm/boot/dts/imx6qdl.dtsi b/arch/arm/boot/dts/imx6qdl.dtsi index fb28b2e..ccd55c2 100644 --- a/arch/arm/boot/dts/imx6qdl.dtsi +++ b/arch/arm/boot/dts/imx6qdl.dtsi @@ -116,22 +116,6 @@ arm,data-latency = <4 2 3>; }; - pcie: pcie@0x01000000 { - compatible = "fsl,imx6q-pcie", "snps,dw-pcie"; - reg = <0x01ffc000 0x4000>; /* DBI */ - #address-cells = <3>; - #size-cells = <2>; - device_type = "pci"; - ranges = <0x00000800 0 0x01f00000 0x01f00000 0 0x00080000 /* configuration space */ - 0x81000000 0 0 0x01f80000 0 0x00010000 /* downstream I/O */ - 0x82000000 0 0x01000000 0x01000000 0 0x00f00000>; /* non-prefetchable memory */ - num-lanes = <1>; - interrupts = <0 123 0x04>; - clocks = <&clks 189>, <&clks 187>, <&clks 206>, <&clks 144>; - clock-names = "pcie_ref_125m", "sata_ref_100m", "lvds_gate", "pcie_axi"; - status = "disabled"; - }; - pmu { compatible = "arm,cortex-a9-pmu"; interrupts = <0 94 0x04>; @@ -152,23 +136,8 @@ ranges; spdif: spdif@02004000 { - compatible = "fsl,imx35-spdif"; reg = <0x02004000 0x4000>; interrupts = <0 52 0x04>; - dmas = <&sdma 14 18 0>, - <&sdma 15 18 0>; - dma-names = "rx", "tx"; - clocks = <&clks 197>, <&clks 3>, - <&clks 197>, <&clks 107>, - <&clks 0>, <&clks 118>, - <&clks 0>, <&clks 139>, - <&clks 0>; - clock-names = "core", "rxtx0", - "rxtx1", "rxtx2", - "rxtx3", "rxtx4", - "rxtx5", "rxtx6", - "rxtx7"; - status = "disabled"; }; ecspi1: ecspi@02008000 { @@ -1041,12 +1010,6 @@ MX6QDL_PAD_GPIO_17__SPDIF_OUT 0x1b0b0 >; }; - - pinctrl_spdif_3: spdifgrp-3 { - fsl,pins = < - MX6QDL_PAD_ENET_RXD0__SPDIF_OUT 0x1b0b0 - >; - }; }; uart1 { @@ -1221,36 +1184,6 @@ >; }; - pinctrl_usdhc3_1_100mhz: usdhc3grp-1-100mhz { /* 100Mhz */ - fsl,pins = < - MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170b9 - MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100b9 - MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170b9 - MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170b9 - MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170b9 - MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170b9 - MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x170b9 - MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x170b9 - MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x170b9 - MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x170b9 - >; - }; - - pinctrl_usdhc3_1_200mhz: usdhc3grp-1-200mhz { /* 200Mhz */ - fsl,pins = < - MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170f9 - MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100f9 - MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170f9 - MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170f9 - MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170f9 - MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170f9 - MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x170f9 - MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x170f9 - MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x170f9 - MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x170f9 - >; - }; - pinctrl_usdhc3_2: usdhc3grp-2 { fsl,pins = < MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 diff --git a/arch/arm/boot/dts/imx6sl-evk.dts b/arch/arm/boot/dts/imx6sl-evk.dts index cc68e19..2886a59 100644 --- a/arch/arm/boot/dts/imx6sl-evk.dts +++ b/arch/arm/boot/dts/imx6sl-evk.dts @@ -17,44 +17,6 @@ memory { reg = <0x80000000 0x40000000>; }; - - regulators { - compatible = "simple-bus"; - - reg_usb_otg1_vbus: usb_otg1_vbus { - compatible = "regulator-fixed"; - regulator-name = "usb_otg1_vbus"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - gpio = <&gpio4 0 0>; - enable-active-high; - }; - - reg_usb_otg2_vbus: usb_otg2_vbus { - compatible = "regulator-fixed"; - regulator-name = "usb_otg2_vbus"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - gpio = <&gpio4 2 0>; - enable-active-high; - }; - }; -}; - -&ecspi1 { - fsl,spi-num-chipselects = <1>; - cs-gpios = <&gpio4 11 0>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_ecspi1_1>; - status = "okay"; - - flash: m25p80@0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "st,m25p32"; - spi-max-frequency = <20000000>; - reg = <0>; - }; }; &fec { @@ -76,8 +38,6 @@ MX6SL_PAD_SD2_DAT7__GPIO5_IO00 0x17059 MX6SL_PAD_SD2_DAT6__GPIO4_IO29 0x17059 MX6SL_PAD_REF_CLK_32K__GPIO3_IO22 0x17059 - MX6SL_PAD_KEY_COL4__GPIO4_IO00 0x80000000 - MX6SL_PAD_KEY_COL5__GPIO4_IO02 0x80000000 >; }; }; @@ -89,26 +49,9 @@ status = "okay"; }; -&usbotg1 { - vbus-supply = <®_usb_otg1_vbus>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_usbotg1_1>; - disable-over-current; - status = "okay"; -}; - -&usbotg2 { - vbus-supply = <®_usb_otg2_vbus>; - dr_mode = "host"; - disable-over-current; - status = "okay"; -}; - &usdhc1 { - pinctrl-names = "default", "state_100mhz", "state_200mhz"; + pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usdhc1_1>; - pinctrl-1 = <&pinctrl_usdhc1_1_100mhz>; - pinctrl-2 = <&pinctrl_usdhc1_1_200mhz>; bus-width = <8>; cd-gpios = <&gpio4 7 0>; wp-gpios = <&gpio4 6 0>; @@ -116,20 +59,16 @@ }; &usdhc2 { - pinctrl-names = "default", "state_100mhz", "state_200mhz"; + pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usdhc2_1>; - pinctrl-1 = <&pinctrl_usdhc2_1_100mhz>; - pinctrl-2 = <&pinctrl_usdhc2_1_200mhz>; cd-gpios = <&gpio5 0 0>; wp-gpios = <&gpio4 29 0>; status = "okay"; }; &usdhc3 { - pinctrl-names = "default", "state_100mhz", "state_200mhz"; + pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usdhc3_1>; - pinctrl-1 = <&pinctrl_usdhc3_1_100mhz>; - pinctrl-2 = <&pinctrl_usdhc3_1_200mhz>; cd-gpios = <&gpio3 22 0>; status = "okay"; }; diff --git a/arch/arm/boot/dts/imx6sl.dtsi b/arch/arm/boot/dts/imx6sl.dtsi index 28558f1..c46651e 100644 --- a/arch/arm/boot/dts/imx6sl.dtsi +++ b/arch/arm/boot/dts/imx6sl.dtsi @@ -13,20 +13,16 @@ / { aliases { - gpio0 = &gpio1; - gpio1 = &gpio2; - gpio2 = &gpio3; - gpio3 = &gpio4; - gpio4 = &gpio5; serial0 = &uart1; serial1 = &uart2; serial2 = &uart3; serial3 = &uart4; serial4 = &uart5; - spi0 = &ecspi1; - spi1 = &ecspi2; - spi2 = &ecspi3; - spi3 = &ecspi4; + gpio0 = &gpio1; + gpio1 = &gpio2; + gpio2 = &gpio3; + gpio3 = &gpio4; + gpio4 = &gpio5; }; cpus { @@ -384,9 +380,7 @@ }; anatop: anatop@020c8000 { - compatible = "fsl,imx6sl-anatop", - "fsl,imx6q-anatop", - "syscon", "simple-bus"; + compatible = "fsl,imx6sl-anatop", "syscon", "simple-bus"; reg = <0x020c8000 0x1000>; interrupts = <0 49 0x04 0 54 0x04 0 127 0x04>; @@ -534,26 +528,10 @@ interrupts = <0 89 0x04>; }; - gpr: iomuxc-gpr@020e0000 { - compatible = "fsl,imx6sl-iomuxc-gpr", - "fsl,imx6q-iomuxc-gpr", "syscon"; - reg = <0x020e0000 0x38>; - }; - iomuxc: iomuxc@020e0000 { compatible = "fsl,imx6sl-iomuxc"; reg = <0x020e0000 0x4000>; - ecspi1 { - pinctrl_ecspi1_1: ecspi1grp-1 { - fsl,pins = < - MX6SL_PAD_ECSPI1_MISO__ECSPI1_MISO 0x100b1 - MX6SL_PAD_ECSPI1_MOSI__ECSPI1_MOSI 0x100b1 - MX6SL_PAD_ECSPI1_SCLK__ECSPI1_SCLK 0x100b1 - >; - }; - }; - fec { pinctrl_fec_1: fecgrp-1 { fsl,pins = < @@ -579,64 +557,6 @@ }; }; - usbotg1 { - pinctrl_usbotg1_1: usbotg1grp-1 { - fsl,pins = < - MX6SL_PAD_EPDC_PWRCOM__USB_OTG1_ID 0x17059 - >; - }; - - pinctrl_usbotg1_2: usbotg1grp-2 { - fsl,pins = < - MX6SL_PAD_FEC_RXD0__USB_OTG1_ID 0x17059 - >; - }; - - pinctrl_usbotg1_3: usbotg1grp-3 { - fsl,pins = < - MX6SL_PAD_LCD_DAT1__USB_OTG1_ID 0x17059 - >; - }; - - pinctrl_usbotg1_4: usbotg1grp-4 { - fsl,pins = < - MX6SL_PAD_REF_CLK_32K__USB_OTG1_ID 0x17059 - >; - }; - - pinctrl_usbotg1_5: usbotg1grp-5 { - fsl,pins = < - MX6SL_PAD_SD3_DAT0__USB_OTG1_ID 0x17059 - >; - }; - }; - - usbotg2 { - pinctrl_usbotg2_1: usbotg2grp-1 { - fsl,pins = < - MX6SL_PAD_ECSPI1_SCLK__USB_OTG2_OC 0x17059 - >; - }; - - pinctrl_usbotg2_2: usbotg2grp-2 { - fsl,pins = < - MX6SL_PAD_ECSPI2_SCLK__USB_OTG2_OC 0x17059 - >; - }; - - pinctrl_usbotg2_3: usbotg2grp-3 { - fsl,pins = < - MX6SL_PAD_KEY_ROW5__USB_OTG2_OC 0x17059 - >; - }; - - pinctrl_usbotg2_4: usbotg2grp-4 { - fsl,pins = < - MX6SL_PAD_SD3_DAT2__USB_OTG2_OC 0x17059 - >; - }; - }; - usdhc1 { pinctrl_usdhc1_1: usdhc1grp-1 { fsl,pins = < @@ -652,38 +572,6 @@ MX6SL_PAD_SD1_DAT7__SD1_DATA7 0x17059 >; }; - - pinctrl_usdhc1_1_100mhz: usdhc1grp-1-100mhz { - fsl,pins = < - MX6SL_PAD_SD1_CMD__SD1_CMD 0x170b9 - MX6SL_PAD_SD1_CLK__SD1_CLK 0x100b9 - MX6SL_PAD_SD1_DAT0__SD1_DATA0 0x170b9 - MX6SL_PAD_SD1_DAT1__SD1_DATA1 0x170b9 - MX6SL_PAD_SD1_DAT2__SD1_DATA2 0x170b9 - MX6SL_PAD_SD1_DAT3__SD1_DATA3 0x170b9 - MX6SL_PAD_SD1_DAT4__SD1_DATA4 0x170b9 - MX6SL_PAD_SD1_DAT5__SD1_DATA5 0x170b9 - MX6SL_PAD_SD1_DAT6__SD1_DATA6 0x170b9 - MX6SL_PAD_SD1_DAT7__SD1_DATA7 0x170b9 - >; - }; - - pinctrl_usdhc1_1_200mhz: usdhc1grp-1-200mhz { - fsl,pins = < - MX6SL_PAD_SD1_CMD__SD1_CMD 0x170f9 - MX6SL_PAD_SD1_CLK__SD1_CLK 0x100f9 - MX6SL_PAD_SD1_DAT0__SD1_DATA0 0x170f9 - MX6SL_PAD_SD1_DAT1__SD1_DATA1 0x170f9 - MX6SL_PAD_SD1_DAT2__SD1_DATA2 0x170f9 - MX6SL_PAD_SD1_DAT3__SD1_DATA3 0x170f9 - MX6SL_PAD_SD1_DAT4__SD1_DATA4 0x170f9 - MX6SL_PAD_SD1_DAT5__SD1_DATA5 0x170f9 - MX6SL_PAD_SD1_DAT6__SD1_DATA6 0x170f9 - MX6SL_PAD_SD1_DAT7__SD1_DATA7 0x170f9 - >; - }; - - }; usdhc2 { @@ -697,29 +585,6 @@ MX6SL_PAD_SD2_DAT3__SD2_DATA3 0x17059 >; }; - - pinctrl_usdhc2_1_100mhz: usdhc2grp-1-100mhz { - fsl,pins = < - MX6SL_PAD_SD2_CMD__SD2_CMD 0x170b9 - MX6SL_PAD_SD2_CLK__SD2_CLK 0x100b9 - MX6SL_PAD_SD2_DAT0__SD2_DATA0 0x170b9 - MX6SL_PAD_SD2_DAT1__SD2_DATA1 0x170b9 - MX6SL_PAD_SD2_DAT2__SD2_DATA2 0x170b9 - MX6SL_PAD_SD2_DAT3__SD2_DATA3 0x170b9 - >; - }; - - pinctrl_usdhc2_1_200mhz: usdhc2grp-1-200mhz { - fsl,pins = < - MX6SL_PAD_SD2_CMD__SD2_CMD 0x170f9 - MX6SL_PAD_SD2_CLK__SD2_CLK 0x100f9 - MX6SL_PAD_SD2_DAT0__SD2_DATA0 0x170f9 - MX6SL_PAD_SD2_DAT1__SD2_DATA1 0x170f9 - MX6SL_PAD_SD2_DAT2__SD2_DATA2 0x170f9 - MX6SL_PAD_SD2_DAT3__SD2_DATA3 0x170f9 - >; - }; - }; usdhc3 { @@ -733,28 +598,6 @@ MX6SL_PAD_SD3_DAT3__SD3_DATA3 0x17059 >; }; - - pinctrl_usdhc3_1_100mhz: usdhc3grp-1-100mhz { - fsl,pins = < - MX6SL_PAD_SD3_CMD__SD3_CMD 0x170b9 - MX6SL_PAD_SD3_CLK__SD3_CLK 0x100b9 - MX6SL_PAD_SD3_DAT0__SD3_DATA0 0x170b9 - MX6SL_PAD_SD3_DAT1__SD3_DATA1 0x170b9 - MX6SL_PAD_SD3_DAT2__SD3_DATA2 0x170b9 - MX6SL_PAD_SD3_DAT3__SD3_DATA3 0x170b9 - >; - }; - - pinctrl_usdhc3_1_200mhz: usdhc3grp-1-200mhz { - fsl,pins = < - MX6SL_PAD_SD3_CMD__SD3_CMD 0x170f9 - MX6SL_PAD_SD3_CLK__SD3_CLK 0x100f9 - MX6SL_PAD_SD3_DAT0__SD3_DATA0 0x170f9 - MX6SL_PAD_SD3_DAT1__SD3_DATA1 0x170f9 - MX6SL_PAD_SD3_DAT2__SD3_DATA2 0x170f9 - MX6SL_PAD_SD3_DAT3__SD3_DATA3 0x170f9 - >; - }; }; }; @@ -776,8 +619,7 @@ <&clks IMX6SL_CLK_SDMA>; clock-names = "ipg", "ahb"; #dma-cells = <3>; - /* imx6sl reuses imx6q sdma firmware */ - fsl,sdma-ram-script-name = "imx/sdma/sdma-imx6q.bin"; + fsl,sdma-ram-script-name = "imx/sdma/sdma-imx6sl.bin"; }; pxp: pxp@020f0000 { @@ -821,7 +663,7 @@ usbotg2: usb@02184200 { compatible = "fsl,imx6sl-usb", "fsl,imx27-usb"; reg = <0x02184200 0x200>; - interrupts = <0 42 0x04>; + interrupts = <0 40 0x04>; clocks = <&clks IMX6SL_CLK_USBOH3>; fsl,usbphy = <&usbphy2>; fsl,usbmisc = <&usbmisc 1>; @@ -831,7 +673,7 @@ usbh: usb@02184400 { compatible = "fsl,imx6sl-usb", "fsl,imx27-usb"; reg = <0x02184400 0x200>; - interrupts = <0 40 0x04>; + interrupts = <0 42 0x04>; clocks = <&clks IMX6SL_CLK_USBOH3>; fsl,usbmisc = <&usbmisc 2>; status = "disabled"; diff --git a/arch/arm/boot/dts/integrator.dtsi b/arch/arm/boot/dts/integrator.dtsi index 0f06f86..813b91d 100644 --- a/arch/arm/boot/dts/integrator.dtsi +++ b/arch/arm/boot/dts/integrator.dtsi @@ -5,11 +5,6 @@ /include/ "skeleton.dtsi" / { - core-module@10000000 { - compatible = "arm,core-module-integrator"; - reg = <0x10000000 0x200>; - }; - timer@13000000 { reg = <0x13000000 0x100>; interrupt-parent = <&pic>; diff --git a/arch/arm/boot/dts/integratorap.dts b/arch/arm/boot/dts/integratorap.dts index e6be931..b6b82ec 100644 --- a/arch/arm/boot/dts/integratorap.dts +++ b/arch/arm/boot/dts/integratorap.dts @@ -19,11 +19,8 @@ }; syscon { - compatible = "arm,integrator-ap-syscon"; + /* AP system controller registers */ reg = <0x11000000 0x100>; - interrupt-parent = <&pic>; - /* These are the logical module IRQs */ - interrupts = <9>, <10>, <11>, <12>; }; timer0: timer@13000000 { diff --git a/arch/arm/boot/dts/integratorcp.dts b/arch/arm/boot/dts/integratorcp.dts index 7deb3a3..72693a6 100644 --- a/arch/arm/boot/dts/integratorcp.dts +++ b/arch/arm/boot/dts/integratorcp.dts @@ -13,8 +13,8 @@ bootargs = "root=/dev/ram0 console=ttyAMA0,38400n8 earlyprintk"; }; - syscon { - compatible = "arm,integrator-cp-syscon"; + cpcon { + /* CP controller registers */ reg = <0xcb000000 0x100>; }; diff --git a/arch/arm/boot/dts/keystone-clocks.dtsi b/arch/arm/boot/dts/keystone-clocks.dtsi deleted file mode 100644 index d6713b1..0000000 --- a/arch/arm/boot/dts/keystone-clocks.dtsi +++ /dev/null @@ -1,821 +0,0 @@ -/* - * Device Tree Source for Keystone 2 clock tree - * - * Copyright (C) 2013 Texas Instruments, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -clocks { - #address-cells = <1>; - #size-cells = <1>; - ranges; - - refclkmain: refclkmain { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <122880000>; - clock-output-names = "refclk-main"; - }; - - mainpllclk: mainpllclk@2310110 { - #clock-cells = <0>; - compatible = "ti,keystone,main-pll-clock"; - clocks = <&refclkmain>; - reg = <0x02620350 4>, <0x02310110 4>; - reg-names = "control", "multiplier"; - fixed-postdiv = <2>; - }; - - papllclk: papllclk@2620358 { - #clock-cells = <0>; - compatible = "ti,keystone,pll-clock"; - clocks = <&refclkmain>; - clock-output-names = "pa-pll-clk"; - reg = <0x02620358 4>; - reg-names = "control"; - fixed-postdiv = <6>; - }; - - ddr3allclk: ddr3apllclk@2620360 { - #clock-cells = <0>; - compatible = "ti,keystone,pll-clock"; - clocks = <&refclkmain>; - clock-output-names = "ddr-3a-pll-clk"; - reg = <0x02620360 4>; - reg-names = "control"; - fixed-postdiv = <6>; - }; - - ddr3bllclk: ddr3bpllclk@2620368 { - #clock-cells = <0>; - compatible = "ti,keystone,pll-clock"; - clocks = <&refclkmain>; - clock-output-names = "ddr-3b-pll-clk"; - reg = <0x02620368 4>; - reg-names = "control"; - fixed-postdiv = <6>; - }; - - armpllclk: armpllclk@2620370 { - #clock-cells = <0>; - compatible = "ti,keystone,pll-clock"; - clocks = <&refclkmain>; - clock-output-names = "arm-pll-clk"; - reg = <0x02620370 4>; - reg-names = "control"; - fixed-postdiv = <6>; - }; - - mainmuxclk: mainmuxclk@2310108 { - #clock-cells = <0>; - compatible = "ti,keystone,pll-mux-clock"; - clocks = <&mainpllclk>, <&refclkmain>; - reg = <0x02310108 4>; - bit-shift = <23>; - bit-mask = <1>; - clock-output-names = "mainmuxclk"; - }; - - chipclk1: chipclk1 { - #clock-cells = <0>; - compatible = "fixed-factor-clock"; - clocks = <&mainmuxclk>; - clock-div = <1>; - clock-mult = <1>; - clock-output-names = "chipclk1"; - }; - - chipclk1rstiso: chipclk1rstiso { - #clock-cells = <0>; - compatible = "fixed-factor-clock"; - clocks = <&mainmuxclk>; - clock-div = <1>; - clock-mult = <1>; - clock-output-names = "chipclk1rstiso"; - }; - - gemtraceclk: gemtraceclk@2310120 { - #clock-cells = <0>; - compatible = "ti,keystone,pll-divider-clock"; - clocks = <&mainmuxclk>; - reg = <0x02310120 4>; - bit-shift = <0>; - bit-mask = <8>; - clock-output-names = "gemtraceclk"; - }; - - chipstmxptclk: chipstmxptclk { - #clock-cells = <0>; - compatible = "ti,keystone,pll-divider-clock"; - clocks = <&mainmuxclk>; - reg = <0x02310164 4>; - bit-shift = <0>; - bit-mask = <8>; - clock-output-names = "chipstmxptclk"; - }; - - chipclk12: chipclk12 { - #clock-cells = <0>; - compatible = "fixed-factor-clock"; - clocks = <&chipclk1>; - clock-div = <2>; - clock-mult = <1>; - clock-output-names = "chipclk12"; - }; - - chipclk13: chipclk13 { - #clock-cells = <0>; - compatible = "fixed-factor-clock"; - clocks = <&chipclk1>; - clock-div = <3>; - clock-mult = <1>; - clock-output-names = "chipclk13"; - }; - - chipclk14: chipclk14 { - #clock-cells = <0>; - compatible = "fixed-factor-clock"; - clocks = <&chipclk1>; - clock-div = <4>; - clock-mult = <1>; - clock-output-names = "chipclk14"; - }; - - chipclk16: chipclk16 { - #clock-cells = <0>; - compatible = "fixed-factor-clock"; - clocks = <&chipclk1>; - clock-div = <6>; - clock-mult = <1>; - clock-output-names = "chipclk16"; - }; - - chipclk112: chipclk112 { - #clock-cells = <0>; - compatible = "fixed-factor-clock"; - clocks = <&chipclk1>; - clock-div = <12>; - clock-mult = <1>; - clock-output-names = "chipclk112"; - }; - - chipclk124: chipclk124 { - #clock-cells = <0>; - compatible = "fixed-factor-clock"; - clocks = <&chipclk1>; - clock-div = <24>; - clock-mult = <1>; - clock-output-names = "chipclk114"; - }; - - chipclk1rstiso13: chipclk1rstiso13 { - #clock-cells = <0>; - compatible = "fixed-factor-clock"; - clocks = <&chipclk1rstiso>; - clock-div = <3>; - clock-mult = <1>; - clock-output-names = "chipclk1rstiso13"; - }; - - chipclk1rstiso14: chipclk1rstiso14 { - #clock-cells = <0>; - compatible = "fixed-factor-clock"; - clocks = <&chipclk1rstiso>; - clock-div = <4>; - clock-mult = <1>; - clock-output-names = "chipclk1rstiso14"; - }; - - chipclk1rstiso16: chipclk1rstiso16 { - #clock-cells = <0>; - compatible = "fixed-factor-clock"; - clocks = <&chipclk1rstiso>; - clock-div = <6>; - clock-mult = <1>; - clock-output-names = "chipclk1rstiso16"; - }; - - chipclk1rstiso112: chipclk1rstiso112 { - #clock-cells = <0>; - compatible = "fixed-factor-clock"; - clocks = <&chipclk1rstiso>; - clock-div = <12>; - clock-mult = <1>; - clock-output-names = "chipclk1rstiso112"; - }; - - clkmodrst0: clkmodrst0 { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&chipclk16>; - clock-output-names = "modrst0"; - reg = <0x02350000 0xb00>, <0x02350000 0x400>; - reg-names = "control", "domain"; - domain-id = <0>; - }; - - - clkusb: clkusb { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&chipclk16>; - clock-output-names = "usb"; - reg = <0x02350008 0xb00>, <0x02350000 0x400>; - reg-names = "control", "domain"; - domain-id = <0>; - }; - - clkaemifspi: clkaemifspi { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&chipclk16>; - clock-output-names = "aemif-spi"; - reg = <0x0235000c 0xb00>, <0x02350000 0x400>; - reg-names = "control", "domain"; - domain-id = <0>; - }; - - - clkdebugsstrc: clkdebugsstrc { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&chipclk13>; - clock-output-names = "debugss-trc"; - reg = <0x02350014 0xb00>, <0x02350000 0x400>; - reg-names = "control", "domain"; - domain-id = <0>; - }; - - clktetbtrc: clktetbtrc { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&chipclk13>; - clock-output-names = "tetb-trc"; - reg = <0x02350018 0xb00>, <0x02350004 0x400>; - reg-names = "control", "domain"; - domain-id = <1>; - }; - - clkpa: clkpa { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&chipclk16>; - clock-output-names = "pa"; - reg = <0x0235001c 0xb00>, <0x02350008 0x400>; - reg-names = "control", "domain"; - domain-id = <2>; - }; - - clkcpgmac: clkcpgmac { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&clkpa>; - clock-output-names = "cpgmac"; - reg = <0x02350020 0xb00>, <0x02350008 0x400>; - reg-names = "control", "domain"; - domain-id = <2>; - }; - - clksa: clksa { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&clkpa>; - clock-output-names = "sa"; - reg = <0x02350024 0xb00>, <0x02350008 0x400>; - reg-names = "control", "domain"; - domain-id = <2>; - }; - - clkpcie: clkpcie { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&chipclk12>; - clock-output-names = "pcie"; - reg = <0x02350028 0xb00>, <0x0235000c 0x400>; - reg-names = "control", "domain"; - domain-id = <3>; - }; - - clksrio: clksrio { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&chipclk1rstiso13>; - clock-output-names = "srio"; - reg = <0x0235002c 0xb00>, <0x02350010 0x400>; - reg-names = "control", "domain"; - domain-id = <4>; - }; - - clkhyperlink0: clkhyperlink0 { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&chipclk12>; - clock-output-names = "hyperlink-0"; - reg = <0x02350030 0xb00>, <0x02350014 0x400>; - reg-names = "control", "domain"; - domain-id = <5>; - }; - - clksr: clksr { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&chipclk1rstiso112>; - clock-output-names = "sr"; - reg = <0x02350034 0xb00>, <0x02350018 0x400>; - reg-names = "control", "domain"; - domain-id = <6>; - }; - - clkmsmcsram: clkmsmcsram { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&chipclk1>; - clock-output-names = "msmcsram"; - reg = <0x02350038 0xb00>, <0x0235001c 0x400>; - reg-names = "control", "domain"; - domain-id = <7>; - }; - - clkgem0: clkgem0 { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&chipclk1>; - clock-output-names = "gem0"; - reg = <0x0235003c 0xb00>, <0x02350020 0x400>; - reg-names = "control", "domain"; - domain-id = <8>; - }; - - clkgem1: clkgem1 { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&chipclk1>; - clock-output-names = "gem1"; - reg = <0x02350040 0xb00>, <0x02350024 0x400>; - reg-names = "control", "domain"; - domain-id = <9>; - }; - - clkgem2: clkgem2 { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&chipclk1>; - clock-output-names = "gem2"; - reg = <0x02350044 0xb00>, <0x02350028 0x400>; - reg-names = "control", "domain"; - domain-id = <10>; - }; - - clkgem3: clkgem3 { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&chipclk1>; - clock-output-names = "gem3"; - reg = <0x02350048 0xb00>, <0x0235002c 0x400>; - reg-names = "control", "domain"; - domain-id = <11>; - }; - - clkgem4: clkgem4 { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&chipclk1>; - clock-output-names = "gem4"; - reg = <0x0235004c 0xb00>, <0x02350030 0x400>; - reg-names = "control", "domain"; - domain-id = <12>; - }; - - clkgem5: clkgem5 { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&chipclk1>; - clock-output-names = "gem5"; - reg = <0x02350050 0xb00>, <0x02350034 0x400>; - reg-names = "control", "domain"; - domain-id = <13>; - }; - - clkgem6: clkgem6 { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&chipclk1>; - clock-output-names = "gem6"; - reg = <0x02350054 0xb00>, <0x02350038 0x400>; - reg-names = "control", "domain"; - domain-id = <14>; - }; - - clkgem7: clkgem7 { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&chipclk1>; - clock-output-names = "gem7"; - reg = <0x02350058 0xb00>, <0x0235003c 0x400>; - reg-names = "control", "domain"; - domain-id = <15>; - }; - - clkddr30: clkddr30 { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&chipclk12>; - clock-output-names = "ddr3-0"; - reg = <0x0235005c 0xb00>, <0x02350040 0x400>; - reg-names = "control", "domain"; - domain-id = <16>; - }; - - clkddr31: clkddr31 { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&chipclk13>; - clock-output-names = "ddr3-1"; - reg = <0x02350060 0xb00>, <0x02350040 0x400>; - reg-names = "control", "domain"; - domain-id = <16>; - }; - - clktac: clktac { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&chipclk13>; - clock-output-names = "tac"; - reg = <0x02350064 0xb00>, <0x02350044 0x400>; - reg-names = "control", "domain"; - domain-id = <17>; - }; - - clkrac01: clktac01 { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&chipclk13>; - clock-output-names = "rac-01"; - reg = <0x02350068 0xb00>, <0x02350044 0x400>; - reg-names = "control", "domain"; - domain-id = <17>; - }; - - clkrac23: clktac23 { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&chipclk13>; - clock-output-names = "rac-23"; - reg = <0x0235006c 0xb00>, <0x02350048 0x400>; - reg-names = "control", "domain"; - domain-id = <18>; - }; - - clkfftc0: clkfftc0 { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&chipclk13>; - clock-output-names = "fftc-0"; - reg = <0x02350070 0xb00>, <0x0235004c 0x400>; - reg-names = "control", "domain"; - domain-id = <19>; - }; - - clkfftc1: clkfftc1 { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&chipclk13>; - clock-output-names = "fftc-1"; - reg = <0x02350074 0xb00>, <0x023504c0 0x400>; - reg-names = "control", "domain"; - domain-id = <19>; - }; - - clkfftc2: clkfftc2 { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&chipclk13>; - clock-output-names = "fftc-2"; - reg = <0x02350078 0xb00>, <0x02350050 0x400>; - reg-names = "control", "domain"; - domain-id = <20>; - }; - - clkfftc3: clkfftc3 { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&chipclk13>; - clock-output-names = "fftc-3"; - reg = <0x0235007c 0xb00>, <0x02350050 0x400>; - reg-names = "control", "domain"; - domain-id = <20>; - }; - - clkfftc4: clkfftc4 { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&chipclk13>; - clock-output-names = "fftc-4"; - reg = <0x02350080 0xb00>, <0x02350050 0x400>; - reg-names = "control", "domain"; - domain-id = <20>; - }; - - clkfftc5: clkfftc5 { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&chipclk13>; - clock-output-names = "fftc-5"; - reg = <0x02350084 0xb00>, <0x02350050 0x400>; - reg-names = "control", "domain"; - domain-id = <20>; - }; - - clkaif: clkaif { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&chipclk13>; - clock-output-names = "aif"; - reg = <0x02350088 0xb00>, <0x02350054 0x400>; - reg-names = "control", "domain"; - domain-id = <21>; - }; - - clktcp3d0: clktcp3d0 { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&chipclk13>; - clock-output-names = "tcp3d-0"; - reg = <0x0235008c 0xb00>, <0x02350058 0x400>; - reg-names = "control", "domain"; - domain-id = <22>; - }; - - clktcp3d1: clktcp3d1 { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&chipclk13>; - clock-output-names = "tcp3d-1"; - reg = <0x02350090 0xb00>, <0x02350058 0x400>; - reg-names = "control", "domain"; - domain-id = <22>; - }; - - clktcp3d2: clktcp3d2 { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&chipclk13>; - clock-output-names = "tcp3d-2"; - reg = <0x02350094 0xb00>, <0x0235005c 0x400>; - reg-names = "control", "domain"; - domain-id = <23>; - }; - - clktcp3d3: clktcp3d3 { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&chipclk13>; - clock-output-names = "tcp3d-3"; - reg = <0x02350098 0xb00>, <0x0235005c 0x400>; - reg-names = "control", "domain"; - domain-id = <23>; - }; - - clkvcp0: clkvcp0 { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&chipclk13>; - clock-output-names = "vcp-0"; - reg = <0x0235009c 0xb00>, <0x02350060 0x400>; - reg-names = "control", "domain"; - domain-id = <24>; - }; - - clkvcp1: clkvcp1 { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&chipclk13>; - clock-output-names = "vcp-1"; - reg = <0x023500a0 0xb00>, <0x02350060 0x400>; - reg-names = "control", "domain"; - domain-id = <24>; - }; - - clkvcp2: clkvcp2 { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&chipclk13>; - clock-output-names = "vcp-2"; - reg = <0x023500a4 0xb00>, <0x02350060 0x400>; - reg-names = "control", "domain"; - domain-id = <24>; - }; - - clkvcp3: clkvcp3 { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&chipclk13>; - clock-output-names = "vcp-3"; - reg = <0x0235000a8 0xb00>, <0x02350060 0x400>; - reg-names = "control", "domain"; - domain-id = <24>; - }; - - clkvcp4: clkvcp4 { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&chipclk13>; - clock-output-names = "vcp-4"; - reg = <0x023500ac 0xb00>, <0x02350064 0x400>; - reg-names = "control", "domain"; - domain-id = <25>; - }; - - clkvcp5: clkvcp5 { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&chipclk13>; - clock-output-names = "vcp-5"; - reg = <0x023500b0 0xb00>, <0x02350064 0x400>; - reg-names = "control", "domain"; - domain-id = <25>; - }; - - clkvcp6: clkvcp6 { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&chipclk13>; - clock-output-names = "vcp-6"; - reg = <0x023500b4 0xb00>, <0x02350064 0x400>; - reg-names = "control", "domain"; - domain-id = <25>; - }; - - clkvcp7: clkvcp7 { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&chipclk13>; - clock-output-names = "vcp-7"; - reg = <0x023500b8 0xb00>, <0x02350064 0x400>; - reg-names = "control", "domain"; - domain-id = <25>; - }; - - clkbcp: clkbcp { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&chipclk13>; - clock-output-names = "bcp"; - reg = <0x023500bc 0xb00>, <0x02350068 0x400>; - reg-names = "control", "domain"; - domain-id = <26>; - }; - - clkdxb: clkdxb { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&chipclk13>; - clock-output-names = "dxb"; - reg = <0x023500c0 0xb00>, <0x0235006c 0x400>; - reg-names = "control", "domain"; - domain-id = <27>; - }; - - clkhyperlink1: clkhyperlink1 { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&chipclk12>; - clock-output-names = "hyperlink-1"; - reg = <0x023500c4 0xb00>, <0x02350070 0x400>; - reg-names = "control", "domain"; - domain-id = <28>; - }; - - clkxge: clkxge { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&chipclk13>; - clock-output-names = "xge"; - reg = <0x023500c8 0xb00>, <0x02350074 0x400>; - reg-names = "control", "domain"; - domain-id = <29>; - }; - - clkwdtimer0: clkwdtimer0 { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&clkmodrst0>; - clock-output-names = "timer0"; - reg = <0x02350000 0xb00>, <0x02350000 0x400>; - reg-names = "control", "domain"; - domain-id = <0>; - }; - - clkwdtimer1: clkwdtimer1 { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&clkmodrst0>; - clock-output-names = "timer1"; - reg = <0x02350000 0xb00>, <0x02350000 0x400>; - reg-names = "control", "domain"; - domain-id = <0>; - }; - - clkwdtimer2: clkwdtimer2 { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&clkmodrst0>; - clock-output-names = "timer2"; - reg = <0x02350000 0xb00>, <0x02350000 0x400>; - reg-names = "control", "domain"; - domain-id = <0>; - }; - - clkwdtimer3: clkwdtimer3 { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&clkmodrst0>; - clock-output-names = "timer3"; - reg = <0x02350000 0xb00>, <0x02350000 0x400>; - reg-names = "control", "domain"; - domain-id = <0>; - }; - - clkuart0: clkuart0 { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&clkmodrst0>; - clock-output-names = "uart0"; - reg = <0x02350000 0xb00>, <0x02350000 0x400>; - reg-names = "control", "domain"; - domain-id = <0>; - }; - - clkuart1: clkuart1 { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&clkmodrst0>; - clock-output-names = "uart1"; - reg = <0x02350000 0xb00>, <0x02350000 0x400>; - reg-names = "control", "domain"; - domain-id = <0>; - }; - - clkaemif: clkaemif { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&clkaemifspi>; - clock-output-names = "aemif"; - reg = <0x02350000 0xb00>, <0x02350000 0x400>; - reg-names = "control", "domain"; - domain-id = <0>; - }; - - clkusim: clkusim { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&clkmodrst0>; - clock-output-names = "usim"; - reg = <0x02350000 0xb00>, <0x02350000 0x400>; - reg-names = "control", "domain"; - domain-id = <0>; - }; - - clki2c: clki2c { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&clkmodrst0>; - clock-output-names = "i2c"; - reg = <0x02350000 0xb00>, <0x02350000 0x400>; - reg-names = "control", "domain"; - domain-id = <0>; - }; - - clkspi: clkspi { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&clkaemifspi>; - clock-output-names = "spi"; - reg = <0x02350000 0xb00>, <0x02350000 0x400>; - reg-names = "control", "domain"; - domain-id = <0>; - }; - - clkgpio: clkgpio { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&clkmodrst0>; - clock-output-names = "gpio"; - reg = <0x02350000 0xb00>, <0x02350000 0x400>; - reg-names = "control", "domain"; - domain-id = <0>; - }; - - clkkeymgr: clkkeymgr { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&clkmodrst0>; - clock-output-names = "keymgr"; - reg = <0x02350000 0xb00>, <0x02350000 0x400>; - reg-names = "control", "domain"; - domain-id = <0>; - }; -}; diff --git a/arch/arm/boot/dts/keystone.dts b/arch/arm/boot/dts/keystone.dts index 100bdf5..a68e34b 100644 --- a/arch/arm/boot/dts/keystone.dts +++ b/arch/arm/boot/dts/keystone.dts @@ -100,15 +100,13 @@ reg = <0x023100e8 4>; /* pll reset control reg */ }; - /include/ "keystone-clocks.dtsi" - uart0: serial@02530c00 { compatible = "ns16550a"; current-speed = <115200>; reg-shift = <2>; reg-io-width = <4>; reg = <0x02530c00 0x100>; - clocks = <&clkuart0>; + clock-frequency = <133120000>; interrupts = <GIC_SPI 277 IRQ_TYPE_EDGE_RISING>; }; @@ -118,66 +116,9 @@ reg-shift = <2>; reg-io-width = <4>; reg = <0x02531000 0x100>; - clocks = <&clkuart1>; + clock-frequency = <133120000>; interrupts = <GIC_SPI 280 IRQ_TYPE_EDGE_RISING>; }; - i2c0: i2c@2530000 { - compatible = "ti,davinci-i2c"; - reg = <0x02530000 0x400>; - clock-frequency = <100000>; - clocks = <&clki2c>; - interrupts = <GIC_SPI 283 IRQ_TYPE_EDGE_RISING>; - #address-cells = <1>; - #size-cells = <0>; - - dtt@50 { - compatible = "at,24c1024"; - reg = <0x50>; - }; - }; - - i2c1: i2c@2530400 { - compatible = "ti,davinci-i2c"; - reg = <0x02530400 0x400>; - clock-frequency = <100000>; - clocks = <&clki2c>; - interrupts = <GIC_SPI 286 IRQ_TYPE_EDGE_RISING>; - }; - - i2c2: i2c@2530800 { - compatible = "ti,davinci-i2c"; - reg = <0x02530800 0x400>; - clock-frequency = <100000>; - clocks = <&clki2c>; - interrupts = <GIC_SPI 289 IRQ_TYPE_EDGE_RISING>; - }; - - spi0: spi@21000400 { - compatible = "ti,dm6441-spi"; - reg = <0x21000400 0x200>; - num-cs = <4>; - ti,davinci-spi-intr-line = <0>; - interrupts = <GIC_SPI 292 IRQ_TYPE_EDGE_RISING>; - clocks = <&clkspi>; - }; - - spi1: spi@21000600 { - compatible = "ti,dm6441-spi"; - reg = <0x21000600 0x200>; - num-cs = <4>; - ti,davinci-spi-intr-line = <0>; - interrupts = <GIC_SPI 296 IRQ_TYPE_EDGE_RISING>; - clocks = <&clkspi>; - }; - - spi2: spi@21000800 { - compatible = "ti,dm6441-spi"; - reg = <0x21000800 0x200>; - num-cs = <4>; - ti,davinci-spi-intr-line = <0>; - interrupts = <GIC_SPI 300 IRQ_TYPE_EDGE_RISING>; - clocks = <&clkspi>; - }; }; }; diff --git a/arch/arm/boot/dts/kirkwood-db-88f6281.dts b/arch/arm/boot/dts/kirkwood-db-88f6281.dts index c39dd76..72c4b0a 100644 --- a/arch/arm/boot/dts/kirkwood-db-88f6281.dts +++ b/arch/arm/boot/dts/kirkwood-db-88f6281.dts @@ -19,6 +19,7 @@ compatible = "marvell,db-88f6281-bp", "marvell,kirkwood-88f6281", "marvell,kirkwood"; mbus { + ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000>; pcie-controller { status = "okay"; diff --git a/arch/arm/boot/dts/kirkwood-db-88f6282.dts b/arch/arm/boot/dts/kirkwood-db-88f6282.dts index 701c6b6..36c411d 100644 --- a/arch/arm/boot/dts/kirkwood-db-88f6282.dts +++ b/arch/arm/boot/dts/kirkwood-db-88f6282.dts @@ -19,6 +19,7 @@ compatible = "marvell,db-88f6282-bp", "marvell,kirkwood-88f6282", "marvell,kirkwood"; mbus { + ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000>; pcie-controller { status = "okay"; diff --git a/arch/arm/boot/dts/kirkwood-db.dtsi b/arch/arm/boot/dts/kirkwood-db.dtsi index 053aa20..c0e2a58 100644 --- a/arch/arm/boot/dts/kirkwood-db.dtsi +++ b/arch/arm/boot/dts/kirkwood-db.dtsi @@ -39,6 +39,28 @@ status = "ok"; }; + nand@3000000 { + pinctrl-0 = <&pmx_nand>; + pinctrl-names = "default"; + chip-delay = <25>; + status = "okay"; + + partition@0 { + label = "uboot"; + reg = <0x0 0x100000>; + }; + + partition@100000 { + label = "uImage"; + reg = <0x100000 0x400000>; + }; + + partition@500000 { + label = "root"; + reg = <0x500000 0x1fb00000>; + }; + }; + sata@80000 { nr-ports = <2>; status = "okay"; @@ -58,28 +80,6 @@ }; }; -&nand { - pinctrl-0 = <&pmx_nand>; - pinctrl-names = "default"; - chip-delay = <25>; - status = "okay"; - - partition@0 { - label = "uboot"; - reg = <0x0 0x100000>; - }; - - partition@100000 { - label = "uImage"; - reg = <0x100000 0x400000>; - }; - - partition@500000 { - label = "root"; - reg = <0x500000 0x1fb00000>; - }; -}; - &mdio { status = "okay"; diff --git a/arch/arm/boot/dts/kirkwood-dnskw.dtsi b/arch/arm/boot/dts/kirkwood-dnskw.dtsi index aefa375..d544f77 100644 --- a/arch/arm/boot/dts/kirkwood-dnskw.dtsi +++ b/arch/arm/boot/dts/kirkwood-dnskw.dtsi @@ -148,6 +148,44 @@ status = "okay"; nr-ports = <2>; }; + + nand@3000000 { + pinctrl-0 = <&pmx_nand>; + pinctrl-names = "default"; + status = "okay"; + chip-delay = <35>; + + partition@0 { + label = "u-boot"; + reg = <0x0000000 0x100000>; + read-only; + }; + + partition@100000 { + label = "uImage"; + reg = <0x0100000 0x500000>; + }; + + partition@600000 { + label = "ramdisk"; + reg = <0x0600000 0x500000>; + }; + + partition@b00000 { + label = "image"; + reg = <0x0b00000 0x6600000>; + }; + + partition@7100000 { + label = "mini firmware"; + reg = <0x7100000 0xa00000>; + }; + + partition@7b00000 { + label = "config"; + reg = <0x7b00000 0x500000>; + }; + }; }; regulators { @@ -182,44 +220,6 @@ }; }; -&nand { - pinctrl-0 = <&pmx_nand>; - pinctrl-names = "default"; - status = "okay"; - chip-delay = <35>; - - partition@0 { - label = "u-boot"; - reg = <0x0000000 0x100000>; - read-only; - }; - - partition@100000 { - label = "uImage"; - reg = <0x0100000 0x500000>; - }; - - partition@600000 { - label = "ramdisk"; - reg = <0x0600000 0x500000>; - }; - - partition@b00000 { - label = "image"; - reg = <0x0b00000 0x6600000>; - }; - - partition@7100000 { - label = "mini firmware"; - reg = <0x7100000 0xa00000>; - }; - - partition@7b00000 { - label = "config"; - reg = <0x7b00000 0x500000>; - }; -}; - &mdio { status = "okay"; diff --git a/arch/arm/boot/dts/kirkwood-dockstar.dts b/arch/arm/boot/dts/kirkwood-dockstar.dts index 33ff368..59a2117 100644 --- a/arch/arm/boot/dts/kirkwood-dockstar.dts +++ b/arch/arm/boot/dts/kirkwood-dockstar.dts @@ -34,6 +34,26 @@ serial@12000 { status = "ok"; }; + + nand@3000000 { + status = "okay"; + + partition@0 { + label = "u-boot"; + reg = <0x0000000 0x100000>; + read-only; + }; + + partition@100000 { + label = "uImage"; + reg = <0x0100000 0x400000>; + }; + + partition@500000 { + label = "data"; + reg = <0x0500000 0xfb00000>; + }; + }; }; gpio-leds { compatible = "gpio-leds"; @@ -71,26 +91,6 @@ }; }; -&nand { - status = "okay"; - - partition@0 { - label = "u-boot"; - reg = <0x0000000 0x100000>; - read-only; - }; - - partition@100000 { - label = "uImage"; - reg = <0x0100000 0x400000>; - }; - - partition@500000 { - label = "data"; - reg = <0x0500000 0xfb00000>; - }; -}; - &mdio { status = "okay"; diff --git a/arch/arm/boot/dts/kirkwood-goflexnet.dts b/arch/arm/boot/dts/kirkwood-goflexnet.dts index a43bebb..6f7c7d7 100644 --- a/arch/arm/boot/dts/kirkwood-goflexnet.dts +++ b/arch/arm/boot/dts/kirkwood-goflexnet.dts @@ -67,6 +67,31 @@ status = "ok"; }; + nand@3000000 { + chip-delay = <40>; + status = "okay"; + + partition@0 { + label = "u-boot"; + reg = <0x0000000 0x100000>; + read-only; + }; + + partition@100000 { + label = "uImage"; + reg = <0x0100000 0x400000>; + }; + + partition@500000 { + label = "pogoplug"; + reg = <0x0500000 0x2000000>; + }; + + partition@2500000 { + label = "root"; + reg = <0x02500000 0xd800000>; + }; + }; sata@80000 { status = "okay"; nr-ports = <2>; @@ -146,32 +171,6 @@ }; }; -&nand { - chip-delay = <40>; - status = "okay"; - - partition@0 { - label = "u-boot"; - reg = <0x0000000 0x100000>; - read-only; - }; - - partition@100000 { - label = "uImage"; - reg = <0x0100000 0x400000>; - }; - - partition@500000 { - label = "pogoplug"; - reg = <0x0500000 0x2000000>; - }; - - partition@2500000 { - label = "root"; - reg = <0x02500000 0xd800000>; - }; -}; - &mdio { status = "okay"; diff --git a/arch/arm/boot/dts/kirkwood-guruplug-server-plus.dts b/arch/arm/boot/dts/kirkwood-guruplug-server-plus.dts index d30a91a..6548b9d 100644 --- a/arch/arm/boot/dts/kirkwood-guruplug-server-plus.dts +++ b/arch/arm/boot/dts/kirkwood-guruplug-server-plus.dts @@ -40,6 +40,26 @@ status = "ok"; }; + nand@3000000 { + status = "okay"; + + partition@0 { + label = "u-boot"; + reg = <0x00000000 0x00100000>; + read-only; + }; + + partition@100000 { + label = "uImage"; + reg = <0x00100000 0x00400000>; + }; + + partition@500000 { + label = "data"; + reg = <0x00500000 0x1fb00000>; + }; + }; + sata@80000 { status = "okay"; nr-ports = <1>; @@ -77,26 +97,6 @@ }; }; -&nand { - status = "okay"; - - partition@0 { - label = "u-boot"; - reg = <0x00000000 0x00100000>; - read-only; - }; - - partition@100000 { - label = "uImage"; - reg = <0x00100000 0x00400000>; - }; - - partition@500000 { - label = "data"; - reg = <0x00500000 0x1fb00000>; - }; -}; - &mdio { status = "okay"; diff --git a/arch/arm/boot/dts/kirkwood-ib62x0.dts b/arch/arm/boot/dts/kirkwood-ib62x0.dts index c5fb02f..cb711a3 100644 --- a/arch/arm/boot/dts/kirkwood-ib62x0.dts +++ b/arch/arm/boot/dts/kirkwood-ib62x0.dts @@ -5,7 +5,7 @@ / { model = "RaidSonic ICY BOX IB-NAS62x0 (Rev B)"; - compatible = "raidsonic,ib-nas6210-b", "raidsonic,ib-nas6220-b", "raidsonic,ib-nas6210", "raidsonic,ib-nas6220", "raidsonic,ib-nas62x0", "marvell,kirkwood-88f6281", "marvell,kirkwood"; + compatible = "raidsonic,ib-nas6210-b", "raidsonic,ib-nas6220-b", "raidsonic,ib-nas6210", "raidsonic,ib-nas6220", "raidsonic,ib-nas62x0", "marvell,kirkwood-88f6281", "marvell,kirkwood"; memory { device_type = "memory"; @@ -43,7 +43,6 @@ marvell,function = "gpio"; }; }; - serial@12000 { status = "okay"; }; @@ -52,6 +51,28 @@ status = "okay"; nr-ports = <2>; }; + + nand@3000000 { + status = "okay"; + pinctrl-0 = <&pmx_nand>; + pinctrl-names = "default"; + + partition@0 { + label = "u-boot"; + reg = <0x0000000 0x100000>; + }; + + partition@100000 { + label = "uImage"; + reg = <0x0100000 0x600000>; + }; + + partition@700000 { + label = "root"; + reg = <0x0700000 0xf900000>; + }; + + }; }; gpio_keys { @@ -72,7 +93,6 @@ gpios = <&gpio0 28 1>; }; }; - gpio-leds { compatible = "gpio-leds"; pinctrl-0 = <&pmx_led_os_red &pmx_led_os_green @@ -93,39 +113,13 @@ gpios = <&gpio0 27 0>; }; }; - gpio_poweroff { compatible = "gpio-poweroff"; pinctrl-0 = <&pmx_power_off>; pinctrl-names = "default"; gpios = <&gpio0 24 0>; }; -}; - -&nand { - status = "okay"; - pinctrl-0 = <&pmx_nand>; - pinctrl-names = "default"; - - partition@0 { - label = "u-boot"; - reg = <0x0000000 0xe0000>; - }; - partition@e0000 { - label = "u-boot environment"; - reg = <0xe0000 0x100000>; - }; - - partition@100000 { - label = "uImage"; - reg = <0x0100000 0x600000>; - }; - - partition@700000 { - label = "root"; - reg = <0x0700000 0xf900000>; - }; }; @@ -140,7 +134,6 @@ ð0 { status = "okay"; - ethernet0-port@0 { phy-handle = <ðphy0>; }; diff --git a/arch/arm/boot/dts/kirkwood-iconnect.dts b/arch/arm/boot/dts/kirkwood-iconnect.dts index 4a62b20..0323f01 100644 --- a/arch/arm/boot/dts/kirkwood-iconnect.dts +++ b/arch/arm/boot/dts/kirkwood-iconnect.dts @@ -19,6 +19,7 @@ }; mbus { + ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000>; pcie-controller { status = "okay"; @@ -82,6 +83,35 @@ serial@12000 { status = "ok"; }; + + nand@3000000 { + status = "okay"; + + partition@0 { + label = "uboot"; + reg = <0x0000000 0xc0000>; + }; + + partition@a0000 { + label = "env"; + reg = <0xa0000 0x20000>; + }; + + partition@100000 { + label = "zImage"; + reg = <0x100000 0x300000>; + }; + + partition@540000 { + label = "initrd"; + reg = <0x540000 0x300000>; + }; + + partition@980000 { + label = "boot"; + reg = <0x980000 0x1f400000>; + }; + }; }; gpio-leds { @@ -150,35 +180,6 @@ }; }; -&nand { - status = "okay"; - - partition@0 { - label = "uboot"; - reg = <0x0000000 0xc0000>; - }; - - partition@a0000 { - label = "env"; - reg = <0xa0000 0x20000>; - }; - - partition@100000 { - label = "zImage"; - reg = <0x100000 0x300000>; - }; - - partition@540000 { - label = "initrd"; - reg = <0x540000 0x300000>; - }; - - partition@980000 { - label = "boot"; - reg = <0x980000 0x1f400000>; - }; -}; - &mdio { status = "okay"; diff --git a/arch/arm/boot/dts/kirkwood-iomega_ix2_200.dts b/arch/arm/boot/dts/kirkwood-iomega_ix2_200.dts index d15395d..df84474 100644 --- a/arch/arm/boot/dts/kirkwood-iomega_ix2_200.dts +++ b/arch/arm/boot/dts/kirkwood-iomega_ix2_200.dts @@ -113,6 +113,31 @@ status = "ok"; }; + nand@3000000 { + status = "okay"; + + partition@0 { + label = "u-boot"; + reg = <0x0000000 0x100000>; + read-only; + }; + + partition@a0000 { + label = "env"; + reg = <0xa0000 0x20000>; + read-only; + }; + + partition@100000 { + label = "uImage"; + reg = <0x100000 0x300000>; + }; + + partition@400000 { + label = "uInitrd"; + reg = <0x540000 0x1000000>; + }; + }; sata@80000 { status = "okay"; nr-ports = <2>; @@ -170,32 +195,6 @@ }; }; -&nand { - status = "okay"; - - partition@0 { - label = "u-boot"; - reg = <0x0000000 0x100000>; - read-only; - }; - - partition@a0000 { - label = "env"; - reg = <0xa0000 0x20000>; - read-only; - }; - - partition@100000 { - label = "uImage"; - reg = <0x100000 0x300000>; - }; - - partition@400000 { - label = "uInitrd"; - reg = <0x540000 0x1000000>; - }; -}; - &mdio { status = "okay"; diff --git a/arch/arm/boot/dts/kirkwood-km_kirkwood.dts b/arch/arm/boot/dts/kirkwood-km_kirkwood.dts index cd44f37..6899408 100644 --- a/arch/arm/boot/dts/kirkwood-km_kirkwood.dts +++ b/arch/arm/boot/dts/kirkwood-km_kirkwood.dts @@ -34,6 +34,13 @@ serial@12000 { status = "ok"; }; + + nand@3000000 { + pinctrl-0 = <&pmx_nand>; + pinctrl-names = "default"; + status = "ok"; + chip-delay = <25>; + }; }; i2c@0 { @@ -44,13 +51,6 @@ }; }; -&nand { - pinctrl-0 = <&pmx_nand>; - pinctrl-names = "default"; - status = "ok"; - chip-delay = <25>; -}; - &mdio { status = "okay"; diff --git a/arch/arm/boot/dts/kirkwood-mplcec4.dts b/arch/arm/boot/dts/kirkwood-mplcec4.dts index 6c1ec27..ce2b94b 100644 --- a/arch/arm/boot/dts/kirkwood-mplcec4.dts +++ b/arch/arm/boot/dts/kirkwood-mplcec4.dts @@ -17,6 +17,7 @@ }; mbus { + ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000>; pcie-controller { status = "okay"; @@ -95,6 +96,37 @@ pinctrl-names = "default"; }; + nand@3000000 { + pinctrl-0 = <&pmx_nand>; + pinctrl-names = "default"; + status = "okay"; + + partition@0 { + label = "uboot"; + reg = <0x0000000 0x100000>; + }; + + partition@100000 { + label = "env"; + reg = <0x100000 0x80000>; + }; + + partition@180000 { + label = "fdt"; + reg = <0x180000 0x80000>; + }; + + partition@200000 { + label = "kernel"; + reg = <0x200000 0x400000>; + }; + + partition@600000 { + label = "rootfs"; + reg = <0x600000 0x1fa00000>; + }; + }; + rtc@10300 { status = "disabled"; }; @@ -162,37 +194,6 @@ }; }; -&nand { - pinctrl-0 = <&pmx_nand>; - pinctrl-names = "default"; - status = "okay"; - - partition@0 { - label = "uboot"; - reg = <0x0000000 0x100000>; - }; - - partition@100000 { - label = "env"; - reg = <0x100000 0x80000>; - }; - - partition@180000 { - label = "fdt"; - reg = <0x180000 0x80000>; - }; - - partition@200000 { - label = "kernel"; - reg = <0x200000 0x400000>; - }; - - partition@600000 { - label = "rootfs"; - reg = <0x600000 0x1fa00000>; - }; -}; - &mdio { status = "okay"; diff --git a/arch/arm/boot/dts/kirkwood-netgear_readynas_duo_v2.dts b/arch/arm/boot/dts/kirkwood-netgear_readynas_duo_v2.dts index e6a102c..874857e 100644 --- a/arch/arm/boot/dts/kirkwood-netgear_readynas_duo_v2.dts +++ b/arch/arm/boot/dts/kirkwood-netgear_readynas_duo_v2.dts @@ -17,6 +17,7 @@ }; mbus { + ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000>; pcie-controller { status = "okay"; @@ -97,6 +98,36 @@ status = "okay"; }; + nand@3000000 { + status = "okay"; + + partition@0 { + label = "u-boot"; + reg = <0x0000000 0x180000>; + read-only; + }; + + partition@180000 { + label = "u-boot-env"; + reg = <0x180000 0x20000>; + }; + + partition@200000 { + label = "uImage"; + reg = <0x0200000 0x600000>; + }; + + partition@800000 { + label = "minirootfs"; + reg = <0x0800000 0x1000000>; + }; + + partition@1800000 { + label = "jffs2"; + reg = <0x1800000 0x6800000>; + }; + }; + sata@80000 { status = "okay"; nr-ports = <2>; @@ -177,36 +208,6 @@ }; }; -&nand { - status = "okay"; - - partition@0 { - label = "u-boot"; - reg = <0x0000000 0x180000>; - read-only; - }; - - partition@180000 { - label = "u-boot-env"; - reg = <0x180000 0x20000>; - }; - - partition@200000 { - label = "uImage"; - reg = <0x0200000 0x600000>; - }; - - partition@800000 { - label = "minirootfs"; - reg = <0x0800000 0x1000000>; - }; - - partition@1800000 { - label = "jffs2"; - reg = <0x1800000 0x6800000>; - }; -}; - &mdio { status = "okay"; diff --git a/arch/arm/boot/dts/kirkwood-nsa310-common.dtsi b/arch/arm/boot/dts/kirkwood-nsa310-common.dtsi index e3f915d..06267a9 100644 --- a/arch/arm/boot/dts/kirkwood-nsa310-common.dtsi +++ b/arch/arm/boot/dts/kirkwood-nsa310-common.dtsi @@ -27,6 +27,49 @@ nr-ports = <2>; }; + nand@3000000 { + status = "okay"; + chip-delay = <35>; + + partition@0 { + label = "uboot"; + reg = <0x0000000 0x0100000>; + read-only; + }; + partition@100000 { + label = "uboot_env"; + reg = <0x0100000 0x0080000>; + }; + partition@180000 { + label = "key_store"; + reg = <0x0180000 0x0080000>; + }; + partition@200000 { + label = "info"; + reg = <0x0200000 0x0080000>; + }; + partition@280000 { + label = "etc"; + reg = <0x0280000 0x0a00000>; + }; + partition@c80000 { + label = "kernel_1"; + reg = <0x0c80000 0x0a00000>; + }; + partition@1680000 { + label = "rootfs1"; + reg = <0x1680000 0x2fc0000>; + }; + partition@4640000 { + label = "kernel_2"; + reg = <0x4640000 0x0a00000>; + }; + partition@5040000 { + label = "rootfs2"; + reg = <0x5040000 0x2fc0000>; + }; + }; + pcie-controller { status = "okay"; @@ -62,46 +105,3 @@ }; }; }; - -&nand { - status = "okay"; - chip-delay = <35>; - - partition@0 { - label = "uboot"; - reg = <0x0000000 0x0100000>; - read-only; - }; - partition@100000 { - label = "uboot_env"; - reg = <0x0100000 0x0080000>; - }; - partition@180000 { - label = "key_store"; - reg = <0x0180000 0x0080000>; - }; - partition@200000 { - label = "info"; - reg = <0x0200000 0x0080000>; - }; - partition@280000 { - label = "etc"; - reg = <0x0280000 0x0a00000>; - }; - partition@c80000 { - label = "kernel_1"; - reg = <0x0c80000 0x0a00000>; - }; - partition@1680000 { - label = "rootfs1"; - reg = <0x1680000 0x2fc0000>; - }; - partition@4640000 { - label = "kernel_2"; - reg = <0x4640000 0x0a00000>; - }; - partition@5040000 { - label = "rootfs2"; - reg = <0x5040000 0x2fc0000>; - }; -}; diff --git a/arch/arm/boot/dts/kirkwood-nsa310.dts b/arch/arm/boot/dts/kirkwood-nsa310.dts index b5418bc..7aeae0c 100644 --- a/arch/arm/boot/dts/kirkwood-nsa310.dts +++ b/arch/arm/boot/dts/kirkwood-nsa310.dts @@ -15,6 +15,7 @@ }; mbus { + ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000>; pcie-controller { status = "okay"; diff --git a/arch/arm/boot/dts/kirkwood-openblocks_a6.dts b/arch/arm/boot/dts/kirkwood-openblocks_a6.dts index f0e3d21..85ccf8d 100644 --- a/arch/arm/boot/dts/kirkwood-openblocks_a6.dts +++ b/arch/arm/boot/dts/kirkwood-openblocks_a6.dts @@ -29,6 +29,43 @@ pinctrl-names = "default"; }; + nand@3000000 { + chip-delay = <25>; + status = "okay"; + pinctrl-0 = <&pmx_nand>; + pinctrl-names = "default"; + + partition@0 { + label = "uboot"; + reg = <0x0 0x90000>; + }; + + partition@90000 { + label = "env"; + reg = <0x90000 0x44000>; + }; + + partition@d4000 { + label = "test"; + reg = <0xd4000 0x24000>; + }; + + partition@f4000 { + label = "conf"; + reg = <0xf4000 0x400000>; + }; + + partition@4f4000 { + label = "linux"; + reg = <0x4f4000 0x1d20000>; + }; + + partition@2214000 { + label = "user"; + reg = <0x2214000 0x1dec000>; + }; + }; + sata@80000 { nr-ports = <1>; status = "okay"; @@ -130,43 +167,6 @@ }; }; -&nand { - chip-delay = <25>; - status = "okay"; - pinctrl-0 = <&pmx_nand>; - pinctrl-names = "default"; - - partition@0 { - label = "uboot"; - reg = <0x0 0x90000>; - }; - - partition@90000 { - label = "env"; - reg = <0x90000 0x44000>; - }; - - partition@d4000 { - label = "test"; - reg = <0xd4000 0x24000>; - }; - - partition@f4000 { - label = "conf"; - reg = <0xf4000 0x400000>; - }; - - partition@4f4000 { - label = "linux"; - reg = <0x4f4000 0x1d20000>; - }; - - partition@2214000 { - label = "user"; - reg = <0x2214000 0x1dec000>; - }; -}; - &mdio { status = "okay"; diff --git a/arch/arm/boot/dts/kirkwood-openblocks_a7.dts b/arch/arm/boot/dts/kirkwood-openblocks_a7.dts deleted file mode 100644 index 851fb2a..0000000 --- a/arch/arm/boot/dts/kirkwood-openblocks_a7.dts +++ /dev/null @@ -1,223 +0,0 @@ -/* - * Device Tree file for OpenBlocks A7 board - * - * Copyright (C) 2013 Free Electrons - * - * Thomas Petazzoni <thomas.petazzoni@free-electrons.com> - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -/dts-v1/; - -#include "kirkwood.dtsi" -#include "kirkwood-6282.dtsi" - -/ { - model = "Plat'Home OpenBlocksA7"; - compatible = "plathome,openblocks-a7", "marvell,kirkwood-88f6283", "marvell,kirkwood"; - - memory { - device_type = "memory"; - reg = <0x00000000 0x40000000>; /* 1 GB */ - }; - - chosen { - bootargs = "console=ttyS0,115200n8 earlyprintk"; - }; - - ocp@f1000000 { - serial@12000 { - status = "ok"; - pinctrl-0 = <&pmx_uart0>; - pinctrl-names = "default"; - }; - - serial@12100 { - status = "ok"; - pinctrl-0 = <&pmx_uart1>; - pinctrl-names = "default"; - }; - - sata@80000 { - nr-ports = <1>; - status = "okay"; - }; - - i2c@11100 { - status = "okay"; - pinctrl-0 = <&pmx_twsi1>; - pinctrl-names = "default"; - - s24c02: s24c02@50 { - compatible = "24c02"; - reg = <0x50>; - }; - }; - - pinctrl: pinctrl@10000 { - pinctrl-0 = <&pmx_dip_switches &pmx_gpio_header>; - pinctrl-names = "default"; - - pmx_uart0: pmx-uart0 { - marvell,pins = "mpp10", "mpp11", "mpp15", - "mpp16"; - marvell,function = "uart0"; - }; - - pmx_uart1: pmx-uart1 { - marvell,pins = "mpp13", "mpp14", "mpp8", - "mpp9"; - marvell,function = "uart1"; - }; - - pmx_sysrst: pmx-sysrst { - marvell,pins = "mpp6"; - marvell,function = "sysrst"; - }; - - pmx_dip_switches: pmx-dip-switches { - marvell,pins = "mpp44", "mpp45", "mpp46", "mpp47"; - marvell,function = "gpio"; - }; - - /* - * Accessible on connector J202. The MPP - * listed below are pin 1-7, pin 8 is unused, - * pin 9 is external reset input and pin 10 is - * ground. - */ - pmx_gpio_header: pmx-gpio-header { - marvell,pins = "mpp17", "mpp7", "mpp29", "mpp28", - "mpp35", "mpp34", "mpp40"; - marvell,function = "gpio"; - }; - - pmx_gpio_init: pmx-init { - marvell,pins = "mpp38"; - marvell,function = "gpio"; - }; - - pmx_usb_oc: pmx-usb-oc { - marvell,pins = "mpp39"; - marvell,function = "gpio"; - }; - - pmx_leds: pmx-leds { - marvell,pins = "mpp41", "mpp42", "mpp43"; - marvell,function = "gpio"; - }; - - pmx_ge1: pmx-ge1 { - marvell,pins = "mpp20", "mpp21", "mpp22", "mpp23", - "mpp24", "mpp25", "mpp26", "mpp27", - "mpp30", "mpp31", "mpp32", "mpp33"; - marvell,function = "ge1"; - }; - }; - }; - - gpio-leds { - compatible = "gpio-leds"; - pinctrl-0 = <&pmx_leds>; - pinctrl-names = "default"; - - led-red { - label = "obsa7:red:stat"; - gpios = <&gpio1 9 1>; - }; - - led-green { - label = "obsa7:green:stat"; - gpios = <&gpio1 10 1>; - }; - - led-yellow { - label = "obsa7:yellow:stat"; - gpios = <&gpio1 11 1>; - }; - }; - - gpio_keys { - compatible = "gpio-keys"; - pinctrl-0 = <&pmx_gpio_init>; - pinctrl-names = "default"; - #address-cells = <1>; - #size-cells = <0>; - - button@1 { - label = "Init Button"; - linux,code = <116>; - gpios = <&gpio1 6 0>; - }; - }; -}; - -&nand { - chip-delay = <25>; - status = "okay"; - pinctrl-0 = <&pmx_nand>; - pinctrl-names = "default"; - - partition@0 { - label = "uboot"; - reg = <0x0 0x1c0000>; - }; - - partition@1c0000 { - label = "env"; - reg = <0x1c0000 0x2c0000>; - }; - - partition@480000 { - label = "test"; - reg = <0x480000 0x160000>; - }; - - partition@5e0000 { - label = "conf"; - reg = <0x5e0000 0x540000>; - }; - - partition@b20000 { - label = "linux"; - reg = <0xb20000 0x3d40000>; - }; - - partition@4860000 { - label = "user"; - reg = <0x4860000 0xb7a0000>; - }; -}; - -&mdio { - status = "okay"; - - ethphy0: ethernet-phy@0 { - device_type = "ethernet-phy"; - reg = <0>; - }; - - ethphy1: ethernet-phy@1 { - device_type = "ethernet-phy"; - reg = <1>; - }; -}; - -ð0 { - status = "okay"; - ethernet0-port@0 { - phy-handle = <ðphy0>; - }; -}; - -ð1 { - status = "okay"; - pinctrl-0 = <&pmx_ge1>; - pinctrl-names = "default"; - ethernet1-port@0 { - phy-handle = <ðphy1>; - }; -}; diff --git a/arch/arm/boot/dts/kirkwood-sheevaplug-common.dtsi b/arch/arm/boot/dts/kirkwood-sheevaplug-common.dtsi index 1173d7f..5696b63 100644 --- a/arch/arm/boot/dts/kirkwood-sheevaplug-common.dtsi +++ b/arch/arm/boot/dts/kirkwood-sheevaplug-common.dtsi @@ -48,6 +48,27 @@ pinctrl-names = "default"; status = "okay"; }; + + nand@3000000 { + pinctrl-0 = <&pmx_nand>; + pinctrl-names = "default"; + status = "okay"; + + partition@0 { + label = "u-boot"; + reg = <0x0000000 0x100000>; + }; + + partition@100000 { + label = "uImage"; + reg = <0x0100000 0x400000>; + }; + + partition@500000 { + label = "root"; + reg = <0x0500000 0x1fb00000>; + }; + }; }; regulators { @@ -71,27 +92,6 @@ }; }; -&nand { - pinctrl-0 = <&pmx_nand>; - pinctrl-names = "default"; - status = "okay"; - - partition@0 { - label = "u-boot"; - reg = <0x0000000 0x100000>; - }; - - partition@100000 { - label = "uImage"; - reg = <0x0100000 0x400000>; - }; - - partition@500000 { - label = "root"; - reg = <0x0500000 0x1fb00000>; - }; -}; - &mdio { status = "okay"; diff --git a/arch/arm/boot/dts/kirkwood-topkick.dts b/arch/arm/boot/dts/kirkwood-topkick.dts index 320da67..30842b4 100644 --- a/arch/arm/boot/dts/kirkwood-topkick.dts +++ b/arch/arm/boot/dts/kirkwood-topkick.dts @@ -90,6 +90,37 @@ pinctrl-names = "default"; }; + nand@3000000 { + status = "okay"; + pinctrl-0 = <&pmx_nand>; + pinctrl-names = "default"; + + partition@0 { + label = "u-boot"; + reg = <0x0000000 0x180000>; + }; + + partition@180000 { + label = "u-boot env"; + reg = <0x0180000 0x20000>; + }; + + partition@200000 { + label = "uImage"; + reg = <0x0200000 0x600000>; + }; + + partition@800000 { + label = "uInitrd"; + reg = <0x0800000 0x1000000>; + }; + + partition@1800000 { + label = "rootfs"; + reg = <0x1800000 0xe800000>; + }; + }; + sata@80000 { status = "okay"; nr-ports = <1>; @@ -173,37 +204,6 @@ }; }; -&nand { - status = "okay"; - pinctrl-0 = <&pmx_nand>; - pinctrl-names = "default"; - - partition@0 { - label = "u-boot"; - reg = <0x0000000 0x180000>; - }; - - partition@180000 { - label = "u-boot env"; - reg = <0x0180000 0x20000>; - }; - - partition@200000 { - label = "uImage"; - reg = <0x0200000 0x600000>; - }; - - partition@800000 { - label = "uInitrd"; - reg = <0x0800000 0x1000000>; - }; - - partition@1800000 { - label = "rootfs"; - reg = <0x1800000 0xe800000>; - }; -}; - &mdio { status = "okay"; diff --git a/arch/arm/boot/dts/kirkwood-ts219-6282.dts b/arch/arm/boot/dts/kirkwood-ts219-6282.dts index 345562f..9efcd2d 100644 --- a/arch/arm/boot/dts/kirkwood-ts219-6282.dts +++ b/arch/arm/boot/dts/kirkwood-ts219-6282.dts @@ -6,6 +6,7 @@ / { mbus { + ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000>; pcie-controller { status = "okay"; diff --git a/arch/arm/boot/dts/kirkwood.dtsi b/arch/arm/boot/dts/kirkwood.dtsi index 8b73c80..1335b2e 100644 --- a/arch/arm/boot/dts/kirkwood.dtsi +++ b/arch/arm/boot/dts/kirkwood.dtsi @@ -28,43 +28,16 @@ compatible = "marvell,kirkwood-mbus", "simple-bus"; #address-cells = <2>; #size-cells = <1>; - /* If a board file needs to change this ranges it must replace it completely */ - ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000 /* internal-regs */ - MBUS_ID(0x01, 0x2f) 0 0xf4000000 0x10000 /* nand flash */ - MBUS_ID(0x03, 0x01) 0 0xf5000000 0x10000 /* crypto sram */ - >; controller = <&mbusc>; pcie-mem-aperture = <0xe0000000 0x10000000>; /* 256 MiB memory space */ pcie-io-aperture = <0xf2000000 0x100000>; /* 1 MiB I/O space */ - - crypto@0301 { - compatible = "marvell,orion-crypto"; - reg = <MBUS_ID(0xf0, 0x01) 0x30000 0x10000>, - <MBUS_ID(0x03, 0x01) 0 0x800>; - reg-names = "regs", "sram"; - interrupts = <22>; - clocks = <&gate_clk 17>; - status = "okay"; - }; - - nand: nand@012f { - #address-cells = <1>; - #size-cells = <1>; - cle = <0>; - ale = <1>; - bank-width = <1>; - compatible = "marvell,orion-nand"; - reg = <MBUS_ID(0x01, 0x2f) 0 0x400>; - chip-delay = <25>; - /* set partition map and/or chip-delay in board dts */ - clocks = <&gate_clk 7>; - status = "disabled"; - }; }; ocp@f1000000 { compatible = "simple-bus"; - ranges = <0x00000000 0xf1000000 0x0100000>; + ranges = <0x00000000 0xf1000000 0x0100000 + 0xf4000000 0xf4000000 0x0000400 + 0xf5000000 0xf5000000 0x0000400>; #address-cells = <1>; #size-cells = <1>; @@ -220,6 +193,20 @@ status = "okay"; }; + nand@3000000 { + #address-cells = <1>; + #size-cells = <1>; + cle = <0>; + ale = <1>; + bank-width = <1>; + compatible = "marvell,orion-nand"; + reg = <0xf4000000 0x400>; + chip-delay = <25>; + /* set partition map and/or chip-delay in board dts */ + clocks = <&gate_clk 7>; + status = "disabled"; + }; + i2c@11000 { compatible = "marvell,mv64xxx-i2c"; reg = <0x11000 0x20>; @@ -231,6 +218,16 @@ status = "disabled"; }; + crypto@30000 { + compatible = "marvell,orion-crypto"; + reg = <0x30000 0x10000>, + <0xf5000000 0x800>; + reg-names = "regs", "sram"; + interrupts = <22>; + clocks = <&gate_clk 17>; + status = "okay"; + }; + mdio: mdio-bus@72004 { compatible = "marvell,orion-mdio"; #address-cells = <1>; diff --git a/arch/arm/boot/dts/qcom-msm8660-surf.dts b/arch/arm/boot/dts/msm8660-surf.dts index 386d428..386d428 100644 --- a/arch/arm/boot/dts/qcom-msm8660-surf.dts +++ b/arch/arm/boot/dts/msm8660-surf.dts diff --git a/arch/arm/boot/dts/qcom-msm8960-cdp.dts b/arch/arm/boot/dts/msm8960-cdp.dts index 93e9f7e..93e9f7e 100644 --- a/arch/arm/boot/dts/qcom-msm8960-cdp.dts +++ b/arch/arm/boot/dts/msm8960-cdp.dts diff --git a/arch/arm/boot/dts/mxs-pinfunc.h b/arch/arm/boot/dts/mxs-pinfunc.h deleted file mode 100644 index c6da987..0000000 --- a/arch/arm/boot/dts/mxs-pinfunc.h +++ /dev/null @@ -1,31 +0,0 @@ -/* - * Header providing constants for i.MX28 pinctrl bindings. - * - * Copyright (C) 2013 Lothar Waßmann <LW@KARO-electronics.de> - * - * The code contained herein is licensed under the GNU General Public - * License. You may obtain a copy of the GNU General Public License - * Version 2 at the following locations: - * - * http://www.opensource.org/licenses/gpl-license.html - * http://www.gnu.org/copyleft/gpl.html - */ - -#ifndef __DT_BINDINGS_MXS_PINCTRL_H__ -#define __DT_BINDINGS_MXS_PINCTRL_H__ - -/* fsl,drive-strength property */ -#define MXS_DRIVE_4mA 0 -#define MXS_DRIVE_8mA 1 -#define MXS_DRIVE_12mA 2 -#define MXS_DRIVE_16mA 3 - -/* fsl,voltage property */ -#define MXS_VOLTAGE_LOW 0 -#define MXS_VOLTAGE_HIGH 1 - -/* fsl,pull-up property */ -#define MXS_PULL_DISABLE 0 -#define MXS_PULL_ENABLE 1 - -#endif /* __DT_BINDINGS_MXS_PINCTRL_H__ */ diff --git a/arch/arm/boot/dts/omap-gpmc-smsc911x.dtsi b/arch/arm/boot/dts/omap-gpmc-smsc911x.dtsi deleted file mode 100644 index f577b7d..0000000 --- a/arch/arm/boot/dts/omap-gpmc-smsc911x.dtsi +++ /dev/null @@ -1,52 +0,0 @@ -/* - * Common file for GPMC connected smsc911x on omaps - * - * Note that the board specifc DTS file needs to specify - * ranges, pinctrl, reg, interrupt parent and interrupts. - */ - -/ { - vddvario: regulator-vddvario { - compatible = "regulator-fixed"; - regulator-name = "vddvario"; - regulator-always-on; - }; - - vdd33a: regulator-vdd33a { - compatible = "regulator-fixed"; - regulator-name = "vdd33a"; - regulator-always-on; - }; -}; - -&gpmc { - ethernet@gpmc { - compatible = "smsc,lan9221", "smsc,lan9115"; - bank-width = <2>; - gpmc,mux-add-data; - gpmc,cs-on-ns = <0>; - gpmc,cs-rd-off-ns = <186>; - gpmc,cs-wr-off-ns = <186>; - gpmc,adv-on-ns = <12>; - gpmc,adv-rd-off-ns = <48>; - gpmc,adv-wr-off-ns = <48>; - gpmc,oe-on-ns = <54>; - gpmc,oe-off-ns = <168>; - gpmc,we-on-ns = <54>; - gpmc,we-off-ns = <168>; - gpmc,rd-cycle-ns = <186>; - gpmc,wr-cycle-ns = <186>; - gpmc,access-ns = <114>; - gpmc,page-burst-access-ns = <6>; - gpmc,bus-turnaround-ns = <12>; - gpmc,cycle2cycle-delay-ns = <18>; - gpmc,wr-data-mux-bus-ns = <90>; - gpmc,wr-access-ns = <186>; - gpmc,cycle2cycle-samecsen; - gpmc,cycle2cycle-diffcsen; - vddvario-supply = <&vddvario>; - vdd33a-supply = <&vdd33a>; - reg-io-width = <4>; - smsc,save-mac-address; - }; -}; diff --git a/arch/arm/boot/dts/omap-zoom-common.dtsi b/arch/arm/boot/dts/omap-zoom-common.dtsi deleted file mode 100644 index 68221fa..0000000 --- a/arch/arm/boot/dts/omap-zoom-common.dtsi +++ /dev/null @@ -1,33 +0,0 @@ -/* - * Common features on the Zoom debug board - */ - -#include "omap-gpmc-smsc911x.dtsi" - -&gpmc { - ranges = <3 0 0x10000000 0x00000400>, - <7 0 0x2c000000 0x01000000>; - - /* - * Four port TL16CP754C serial port on GPMC, - * they probably share the same GPIO IRQ - * REVISIT: Add timing support from slls644g.pdf - */ - uart@3,0 { - compatible = "ns16550a"; - reg = <3 0 0x100>; - bank-width = <2>; - reg-shift = <1>; - reg-io-width = <1>; - interrupt-parent = <&gpio4>; - interrupts = <6 IRQ_TYPE_EDGE_RISING>; /* gpio102 */ - clock-frequency = <1843200>; - current-speed = <115200>; - }; - - ethernet@gpmc { - reg = <7 0 0xff>; - interrupt-parent = <&gpio5>; - interrupts = <30 IRQ_TYPE_LEVEL_LOW>; /* gpio158 */ - }; -}; diff --git a/arch/arm/boot/dts/omap2.dtsi b/arch/arm/boot/dts/omap2.dtsi index d0c5b37..a2bfcde 100644 --- a/arch/arm/boot/dts/omap2.dtsi +++ b/arch/arm/boot/dts/omap2.dtsi @@ -9,7 +9,6 @@ */ #include <dt-bindings/gpio/gpio.h> -#include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/pinctrl/omap.h> #include "skeleton.dtsi" @@ -22,8 +21,6 @@ serial0 = &uart1; serial1 = &uart2; serial2 = &uart3; - i2c0 = &i2c1; - i2c1 = &i2c2; }; cpus { @@ -56,28 +53,6 @@ ranges; ti,hwmods = "l3_main"; - aes: aes@480a6000 { - compatible = "ti,omap2-aes"; - ti,hwmods = "aes"; - reg = <0x480a6000 0x50>; - dmas = <&sdma 9 &sdma 10>; - dma-names = "tx", "rx"; - }; - - hdq1w: 1w@480b2000 { - compatible = "ti,omap2420-1w"; - ti,hwmods = "hdq1w"; - reg = <0x480b2000 0x1000>; - interrupts = <58>; - }; - - mailbox: mailbox@48094000 { - compatible = "ti,omap2-mailbox"; - ti,hwmods = "mailbox"; - reg = <0x48094000 0x200>; - interrupts = <26>; - }; - intc: interrupt-controller@1 { compatible = "ti,omap2-intc"; interrupt-controller; @@ -88,7 +63,6 @@ sdma: dma-controller@48056000 { compatible = "ti,omap2430-sdma", "ti,omap2420-sdma"; - ti,hwmods = "dma"; reg = <0x48056000 0x1000>; interrupts = <12>, <13>, @@ -99,91 +73,21 @@ #dma-requests = <64>; }; - i2c1: i2c@48070000 { - compatible = "ti,omap2-i2c"; - ti,hwmods = "i2c1"; - reg = <0x48070000 0x80>; - #address-cells = <1>; - #size-cells = <0>; - interrupts = <56>; - dmas = <&sdma 27 &sdma 28>; - dma-names = "tx", "rx"; - }; - - i2c2: i2c@48072000 { - compatible = "ti,omap2-i2c"; - ti,hwmods = "i2c2"; - reg = <0x48072000 0x80>; - #address-cells = <1>; - #size-cells = <0>; - interrupts = <57>; - dmas = <&sdma 29 &sdma 30>; - dma-names = "tx", "rx"; - }; - - mcspi1: mcspi@48098000 { - compatible = "ti,omap2-mcspi"; - ti,hwmods = "mcspi1"; - reg = <0x48098000 0x100>; - interrupts = <65>; - dmas = <&sdma 35 &sdma 36 &sdma 37 &sdma 38 - &sdma 39 &sdma 40 &sdma 41 &sdma 42>; - dma-names = "tx0", "rx0", "tx1", "rx1", - "tx2", "rx2", "tx3", "rx3"; - }; - - mcspi2: mcspi@4809a000 { - compatible = "ti,omap2-mcspi"; - ti,hwmods = "mcspi2"; - reg = <0x4809a000 0x100>; - interrupts = <66>; - dmas = <&sdma 43 &sdma 44 &sdma 45 &sdma 46>; - dma-names = "tx0", "rx0", "tx1", "rx1"; - }; - - rng: rng@480a0000 { - compatible = "ti,omap2-rng"; - ti,hwmods = "rng"; - reg = <0x480a0000 0x50>; - interrupts = <36>; - }; - - sham: sham@480a4000 { - compatible = "ti,omap2-sham"; - ti,hwmods = "sham"; - reg = <0x480a4000 0x64>; - interrupts = <51>; - dmas = <&sdma 13>; - dma-names = "rx"; - }; - uart1: serial@4806a000 { compatible = "ti,omap2-uart"; ti,hwmods = "uart1"; - reg = <0x4806a000 0x2000>; - interrupts = <72>; - dmas = <&sdma 49 &sdma 50>; - dma-names = "tx", "rx"; clock-frequency = <48000000>; }; uart2: serial@4806c000 { compatible = "ti,omap2-uart"; ti,hwmods = "uart2"; - reg = <0x4806c000 0x400>; - interrupts = <73>; - dmas = <&sdma 51 &sdma 52>; - dma-names = "tx", "rx"; clock-frequency = <48000000>; }; uart3: serial@4806e000 { compatible = "ti,omap2-uart"; ti,hwmods = "uart3"; - reg = <0x4806e000 0x400>; - interrupts = <74>; - dmas = <&sdma 53 &sdma 54>; - dma-names = "tx", "rx"; clock-frequency = <48000000>; }; diff --git a/arch/arm/boot/dts/omap2420-h4.dts b/arch/arm/boot/dts/omap2420-h4.dts index 34cdecb..224c08f 100644 --- a/arch/arm/boot/dts/omap2420-h4.dts +++ b/arch/arm/boot/dts/omap2420-h4.dts @@ -50,15 +50,15 @@ label = "bootloader"; reg = <0 0x20000>; }; - partition@20000 { + partition@0x20000 { label = "params"; reg = <0x20000 0x20000>; }; - partition@40000 { + partition@0x40000 { label = "kernel"; reg = <0x40000 0x200000>; }; - partition@240000 { + partition@0x240000 { label = "file-system"; reg = <0x240000 0x3dc0000>; }; diff --git a/arch/arm/boot/dts/omap2420.dtsi b/arch/arm/boot/dts/omap2420.dtsi index 60c605d..c8f9c55 100644 --- a/arch/arm/boot/dts/omap2420.dtsi +++ b/arch/arm/boot/dts/omap2420.dtsi @@ -114,15 +114,6 @@ dma-names = "tx", "rx"; }; - msdi1: mmc@4809c000 { - compatible = "ti,omap2420-mmc"; - ti,hwmods = "msdi1"; - reg = <0x4809c000 0x80>; - interrupts = <83>; - dmas = <&sdma 61 &sdma 62>; - dma-names = "tx", "rx"; - }; - timer1: timer@48028000 { compatible = "ti,omap2420-timer"; reg = <0x48028000 0x400>; @@ -130,19 +121,5 @@ ti,hwmods = "timer1"; ti,timer-alwon; }; - - wd_timer2: wdt@48022000 { - compatible = "ti,omap2-wdt"; - ti,hwmods = "wd_timer2"; - reg = <0x48022000 0x80>; - }; }; }; - -&i2c1 { - compatible = "ti,omap2420-i2c"; -}; - -&i2c2 { - compatible = "ti,omap2420-i2c"; -}; diff --git a/arch/arm/boot/dts/omap2430.dtsi b/arch/arm/boot/dts/omap2430.dtsi index d624345..c535a5a 100644 --- a/arch/arm/boot/dts/omap2430.dtsi +++ b/arch/arm/boot/dts/omap2430.dtsi @@ -175,25 +175,6 @@ dma-names = "tx", "rx"; }; - mmc1: mmc@4809c000 { - compatible = "ti,omap2-hsmmc"; - reg = <0x4809c000 0x200>; - interrupts = <83>; - ti,hwmods = "mmc1"; - ti,dual-volt; - dmas = <&sdma 61>, <&sdma 62>; - dma-names = "tx", "rx"; - }; - - mmc2: mmc@480b4000 { - compatible = "ti,omap2-hsmmc"; - reg = <0x480b4000 0x200>; - interrupts = <86>; - ti,hwmods = "mmc2"; - dmas = <&sdma 47>, <&sdma 48>; - dma-names = "tx", "rx"; - }; - timer1: timer@49018000 { compatible = "ti,omap2420-timer"; reg = <0x49018000 0x400>; @@ -201,35 +182,5 @@ ti,hwmods = "timer1"; ti,timer-alwon; }; - - mcspi3: mcspi@480b8000 { - compatible = "ti,omap2-mcspi"; - ti,hwmods = "mcspi3"; - reg = <0x480b8000 0x100>; - interrupts = <91>; - dmas = <&sdma 15 &sdma 16 &sdma 23 &sdma 24>; - dma-names = "tx0", "rx0", "tx1", "rx1"; - }; - - usb_otg_hs: usb_otg_hs@480ac000 { - compatible = "ti,omap2-musb"; - ti,hwmods = "usb_otg_hs"; - reg = <0x480ac000 0x1000>; - interrupts = <93>; - }; - - wd_timer2: wdt@49016000 { - compatible = "ti,omap2-wdt"; - ti,hwmods = "wd_timer2"; - reg = <0x49016000 0x80>; - }; }; }; - -&i2c1 { - compatible = "ti,omap2430-i2c"; -}; - -&i2c2 { - compatible = "ti,omap2430-i2c"; -}; diff --git a/arch/arm/boot/dts/omap3-beagle-xm.dts b/arch/arm/boot/dts/omap3-beagle-xm.dts index df33a50..2816bf6 100644 --- a/arch/arm/boot/dts/omap3-beagle-xm.dts +++ b/arch/arm/boot/dts/omap3-beagle-xm.dts @@ -69,23 +69,6 @@ }; }; - - /* HS USB Port 2 Power */ - hsusb2_power: hsusb2_power_reg { - compatible = "regulator-fixed"; - regulator-name = "hsusb2_vbus"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - gpio = <&twl_gpio 18 0>; /* GPIO LEDA */ - startup-delay-us = <70000>; - }; - - /* HS USB Host PHY on PORT 2 */ - hsusb2_phy: hsusb2_phy { - compatible = "usb-nop-xceiv"; - reset-gpios = <&gpio5 19 GPIO_ACTIVE_LOW>; /* gpio_147 */ - vcc-supply = <&hsusb2_power>; - }; }; &omap3_pmx_wkup { @@ -96,37 +79,6 @@ }; }; -&omap3_pmx_core { - pinctrl-names = "default"; - pinctrl-0 = < - &hsusbb2_pins - >; - - uart3_pins: pinmux_uart3_pins { - pinctrl-single,pins = < - 0x16e (PIN_INPUT | PIN_OFF_WAKEUPENABLE | MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */ - 0x170 (PIN_OUTPUT | MUX_MODE0) /* uart3_tx_irtx.uart3_tx_irtx OUTPUT | MODE0 */ - >; - }; - - hsusbb2_pins: pinmux_hsusbb2_pins { - pinctrl-single,pins = < - 0x5c0 (PIN_OUTPUT | MUX_MODE3) /* etk_d10.hsusb2_clk */ - 0x5c2 (PIN_OUTPUT | MUX_MODE3) /* etk_d11.hsusb2_stp */ - 0x5c4 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d12.hsusb2_dir */ - 0x5c6 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d13.hsusb2_nxt */ - 0x5c8 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d14.hsusb2_data0 */ - 0x5cA (PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d15.hsusb2_data1 */ - 0x1a4 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi1_cs3.hsusb2_data2 */ - 0x1a6 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_clk.hsusb2_data7 */ - 0x1a8 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_simo.hsusb2_data4 */ - 0x1aa (PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_somi.hsusb2_data5 */ - 0x1ac (PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_cs0.hsusb2_data6 */ - 0x1ae (PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_cs1.hsusb2_data3 */ - >; - }; -}; - &i2c1 { clock-frequency = <2600000>; @@ -192,12 +144,19 @@ &usb_otg_hs { interface-type = <0>; usb-phy = <&usb2_phy>; - phys = <&usb2_phy>; - phy-names = "usb2-phy"; mode = <3>; power = <50>; }; +&omap3_pmx_core { + uart3_pins: pinmux_uart3_pins { + pinctrl-single,pins = < + 0x16e (PIN_INPUT | PIN_OFF_WAKEUPENABLE | MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */ + 0x170 (PIN_OUTPUT | MUX_MODE0) /* uart3_tx_irtx.uart3_tx_irtx OUTPUT | MODE0 */ + >; + }; +}; + &uart3 { pinctrl-names = "default"; pinctrl-0 = <&uart3_pins>; @@ -207,18 +166,3 @@ pinctrl-names = "default"; pinctrl-0 = <&gpio1_pins>; }; - -&usbhshost { - port2-mode = "ehci-phy"; -}; - -&usbhsehci { - phys = <0 &hsusb2_phy>; -}; - -&vaux2 { - regulator-name = "usb_1v8"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-always-on; -}; diff --git a/arch/arm/boot/dts/omap3-beagle.dts b/arch/arm/boot/dts/omap3-beagle.dts index 3ba4a62..dfd8310 100644 --- a/arch/arm/boot/dts/omap3-beagle.dts +++ b/arch/arm/boot/dts/omap3-beagle.dts @@ -44,6 +44,17 @@ }; }; + /* HS USB Port 2 RESET */ + hsusb2_reset: hsusb2_reset_reg { + compatible = "regulator-fixed"; + regulator-name = "hsusb2_reset"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpio5 19 0>; /* gpio_147 */ + startup-delay-us = <70000>; + enable-active-high; + }; + /* HS USB Port 2 Power */ hsusb2_power: hsusb2_power_reg { compatible = "regulator-fixed"; @@ -57,18 +68,10 @@ /* HS USB Host PHY on PORT 2 */ hsusb2_phy: hsusb2_phy { compatible = "usb-nop-xceiv"; - reset-gpios = <&gpio5 19 GPIO_ACTIVE_LOW>; /* gpio_147 */ + reset-supply = <&hsusb2_reset>; vcc-supply = <&hsusb2_power>; }; - sound { - compatible = "ti,omap-twl4030"; - ti,model = "omap3beagle"; - - ti,mcbsp = <&mcbsp2>; - ti,codec = <&twl_audio>; - }; - gpio_keys { compatible = "gpio-keys"; @@ -98,18 +101,18 @@ hsusbb2_pins: pinmux_hsusbb2_pins { pinctrl-single,pins = < - 0x5c0 (PIN_OUTPUT | MUX_MODE3) /* etk_d10.hsusb2_clk */ - 0x5c2 (PIN_OUTPUT | MUX_MODE3) /* etk_d11.hsusb2_stp */ - 0x5c4 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d12.hsusb2_dir */ - 0x5c6 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d13.hsusb2_nxt */ - 0x5c8 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d14.hsusb2_data0 */ - 0x5cA (PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d15.hsusb2_data1 */ - 0x1a4 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi1_cs3.hsusb2_data2 */ - 0x1a6 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_clk.hsusb2_data7 */ - 0x1a8 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_simo.hsusb2_data4 */ - 0x1aa (PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_somi.hsusb2_data5 */ - 0x1ac (PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_cs0.hsusb2_data6 */ - 0x1ae (PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_cs1.hsusb2_data3 */ + 0x5c0 (PIN_OUTPUT | MUX_MODE3) /* usbb2_ulpitll_clk.usbb1_ulpiphy_clk */ + 0x5c2 (PIN_OUTPUT | MUX_MODE3) /* usbb2_ulpitll_clk.usbb1_ulpiphy_stp */ + 0x5c4 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* usbb2_ulpitll_clk.usbb1_ulpiphy_dir */ + 0x5c6 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* usbb2_ulpitll_clk.usbb1_ulpiphy_nxt */ + 0x5c8 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* usbb2_ulpitll_clk.usbb1_ulpiphy_dat0 */ + 0x5cA (PIN_INPUT_PULLDOWN | MUX_MODE3) /* usbb2_ulpitll_clk.usbb1_ulpiphy_dat1 */ + 0x1a4 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* usbb2_ulpitll_clk.usbb1_ulpiphy_dat2 */ + 0x1a6 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* usbb2_ulpitll_clk.usbb1_ulpiphy_dat3 */ + 0x1a8 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* usbb2_ulpitll_clk.usbb1_ulpiphy_dat4 */ + 0x1aa (PIN_INPUT_PULLDOWN | MUX_MODE3) /* usbb2_ulpitll_clk.usbb1_ulpiphy_dat5 */ + 0x1ac (PIN_INPUT_PULLDOWN | MUX_MODE3) /* usbb2_ulpitll_clk.usbb1_ulpiphy_dat6 */ + 0x1ae (PIN_INPUT_PULLDOWN | MUX_MODE3) /* usbb2_ulpitll_clk.usbb1_ulpiphy_dat7 */ >; }; @@ -128,12 +131,6 @@ reg = <0x48>; interrupts = <7>; /* SYS_NIRQ cascaded to intc */ interrupt-parent = <&intc>; - - twl_audio: audio { - compatible = "ti,twl4030-audio"; - codec { - }; - }; }; }; @@ -183,19 +180,3 @@ pinctrl-names = "default"; pinctrl-0 = <&gpio1_pins>; }; - -&usb_otg_hs { - interface-type = <0>; - usb-phy = <&usb2_phy>; - phys = <&usb2_phy>; - phy-names = "usb2-phy"; - mode = <3>; - power = <50>; -}; - -&vaux2 { - regulator-name = "vdd_ehci"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-always-on; -}; diff --git a/arch/arm/boot/dts/omap3-devkit8000.dts b/arch/arm/boot/dts/omap3-devkit8000.dts index 4665421..7ef2827 100644 --- a/arch/arm/boot/dts/omap3-devkit8000.dts +++ b/arch/arm/boot/dts/omap3-devkit8000.dts @@ -125,7 +125,7 @@ nand-bus-width = <16>; gpmc,device-nand; - gpmc,sync-clk-ps = <0>; + gpmc,sync-clki-ps = <0>; gpmc,cs-on-ns = <0>; gpmc,cs-rd-off-ns = <44>; gpmc,cs-wr-off-ns = <44>; diff --git a/arch/arm/boot/dts/omap3-evm-37xx.dts b/arch/arm/boot/dts/omap3-evm-37xx.dts deleted file mode 100644 index 4df68ad..0000000 --- a/arch/arm/boot/dts/omap3-evm-37xx.dts +++ /dev/null @@ -1,151 +0,0 @@ -/* - * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -/dts-v1/; - -#include "omap36xx.dtsi" -#include "omap3-evm-common.dtsi" - - -/ { - model = "TI OMAP37XX EVM (TMDSEVM3730)"; - compatible = "ti,omap3-evm-37xx", "ti,omap36xx"; - - memory { - device_type = "memory"; - reg = <0x80000000 0x10000000>; /* 256 MB */ - }; - - wl12xx_vmmc: wl12xx_vmmc { - pinctrl-names = "default"; - pinctrl-0 = <&wl12xx_gpio>; - }; -}; - -&omap3_pmx_core { - mmc1_pins: pinmux_mmc1_pins { - pinctrl-single,pins = < - 0x114 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* sdmmc1_clk.sdmmc1_clk */ - 0x116 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_cmd.sdmmc1_cmd */ - 0x118 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat0.sdmmc1_dat0 */ - 0x11a (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat1.sdmmc1_dat1 */ - 0x11c (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat2.sdmmc1_dat2 */ - 0x11e (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat3.sdmmc1_dat3 */ - 0x120 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat4.sdmmc1_dat4 */ - 0x122 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat5.sdmmc1_dat5 */ - 0x124 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat6.sdmmc1_dat6 */ - 0x126 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat7.sdmmc1_dat7 */ - >; - }; - - /* NOTE: Clocked externally, needs INPUT also for sdmmc2_clk.sdmmc2_clk */ - mmc2_pins: pinmux_mmc2_pins { - pinctrl-single,pins = < - 0x128 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_clk.sdmmc2_clk */ - 0x12a (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_cmd.sdmmc2_cmd */ - 0x12c (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat0.sdmmc2_dat0 */ - 0x12e (WAKEUP_EN | PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat1.sdmmc2_dat1 */ - 0x130 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat2.sdmmc2_dat2 */ - 0x132 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat3.sdmmc2_dat3 */ - >; - }; - - uart3_pins: pinmux_uart3_pins { - pinctrl-single,pins = < - 0x16e (WAKEUP_EN | PIN_INPUT | MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */ - 0x170 (PIN_OUTPUT | MUX_MODE0) /* uart3_tx_irtx.uart3_tx_irtx */ - >; - }; - - wl12xx_gpio: pinmux_wl12xx_gpio { - pinctrl-single,pins = < - 0x150 (PIN_OUTPUT | MUX_MODE4) /* uart1_cts.gpio_150 */ - 0x14e (PIN_INPUT | MUX_MODE4) /* uart1_rts.gpio_149 */ - >; - }; - - smsc911x_pins: pinmux_smsc911x_pins { - pinctrl-single,pins = < - 0x1a2 (PIN_INPUT | MUX_MODE4) /* mcspi1_cs2.gpio_176 */ - >; - }; -}; - -&mmc1 { - pinctrl-names = "default"; - pinctrl-0 = <&mmc1_pins>; -}; - -&mmc2 { - pinctrl-names = "default"; - pinctrl-0 = <&mmc2_pins>; -}; - -&mmc3 { - status = "disabled"; -}; - -&uart3 { - pinctrl-names = "default"; - pinctrl-0 = <&uart3_pins>; -}; - -&gpmc { - ranges = <0 0 0x00000000 0x20000000>, - <5 0 0x2c000000 0x01000000>; - - nand@0,0 { - linux,mtd-name= "hynix,h8kds0un0mer-4em"; - reg = <0 0 0>; - nand-bus-width = <16>; - ti,nand-ecc-opt = "bch8"; - - gpmc,sync-clk-ps = <0>; - gpmc,cs-on-ns = <0>; - gpmc,cs-rd-off-ns = <44>; - gpmc,cs-wr-off-ns = <44>; - gpmc,adv-on-ns = <6>; - gpmc,adv-rd-off-ns = <34>; - gpmc,adv-wr-off-ns = <44>; - gpmc,we-off-ns = <40>; - gpmc,oe-off-ns = <54>; - gpmc,access-ns = <64>; - gpmc,rd-cycle-ns = <82>; - gpmc,wr-cycle-ns = <82>; - gpmc,wr-access-ns = <40>; - gpmc,wr-data-mux-bus-ns = <0>; - - #address-cells = <1>; - #size-cells = <1>; - - partition@0 { - label = "X-Loader"; - reg = <0 0x80000>; - }; - partition@0x80000 { - label = "U-Boot"; - reg = <0x80000 0x1c0000>; - }; - partition@0x1c0000 { - label = "Environment"; - reg = <0x240000 0x40000>; - }; - partition@0x280000 { - label = "Kernel"; - reg = <0x280000 0x500000>; - }; - partition@0x780000 { - label = "Filesystem"; - reg = <0x780000 0x1f880000>; - }; - }; - - ethernet@gpmc { - pinctrl-names = "default"; - pinctrl-0 = <&smsc911x_pins>; - }; -}; diff --git a/arch/arm/boot/dts/omap3-evm-common.dtsi b/arch/arm/boot/dts/omap3-evm-common.dtsi deleted file mode 100644 index 3007e79..0000000 --- a/arch/arm/boot/dts/omap3-evm-common.dtsi +++ /dev/null @@ -1,96 +0,0 @@ -/* - * Common support for omap3 EVM boards - */ - -#include "omap-gpmc-smsc911x.dtsi" - -/ { - cpus { - cpu@0 { - cpu0-supply = <&vcc>; - }; - }; - - leds { - compatible = "gpio-leds"; - ledb { - label = "omap3evm::ledb"; - gpios = <&twl_gpio 19 GPIO_ACTIVE_HIGH>; /* LEDB */ - linux,default-trigger = "default-on"; - }; - }; - - wl12xx_vmmc: wl12xx_vmmc { - compatible = "regulator-fixed"; - regulator-name = "vwl1271"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - gpio = <&gpio5 22 0>; /* gpio150 */ - startup-delay-us = <70000>; - enable-active-high; - vin-supply = <&vmmc2>; - }; -}; - -&i2c1 { - clock-frequency = <2600000>; - - twl: twl@48 { - reg = <0x48>; - interrupts = <7>; /* SYS_NIRQ cascaded to intc */ - interrupt-parent = <&intc>; - }; -}; - -#include "twl4030.dtsi" -#include "twl4030_omap3.dtsi" - -&i2c2 { - clock-frequency = <400000>; -}; - -&i2c3 { - clock-frequency = <400000>; - - /* - * TVP5146 Video decoder-in for analog input support. - */ - tvp5146@5c { - compatible = "ti,tvp5146m2"; - reg = <0x5c>; - }; -}; - -&mmc1 { - vmmc-supply = <&vmmc1>; - vmmc_aux-supply = <&vsim>; - bus-width = <8>; -}; - -&mmc2 { - vmmc-supply = <&wl12xx_vmmc>; - non-removable; - bus-width = <4>; - cap-power-off-card; -}; - -&twl_gpio { - ti,use-leds; -}; - -&usb_otg_hs { - interface-type = <0>; - usb-phy = <&usb2_phy>; - phys = <&usb2_phy>; - phy-names = "usb2-phy"; - mode = <3>; - power = <50>; -}; - -&gpmc { - ethernet@gpmc { - interrupt-parent = <&gpio6>; - interrupts = <16 8>; - reg = <5 0 0xff>; - }; -}; diff --git a/arch/arm/boot/dts/omap3-evm.dts b/arch/arm/boot/dts/omap3-evm.dts index e10dcd0..7d4329d 100644 --- a/arch/arm/boot/dts/omap3-evm.dts +++ b/arch/arm/boot/dts/omap3-evm.dts @@ -8,14 +8,68 @@ /dts-v1/; #include "omap34xx.dtsi" -#include "omap3-evm-common.dtsi" / { - model = "TI OMAP35XX EVM (TMDSEVM3530)"; + model = "TI OMAP3 EVM (OMAP3530, AM/DM37x)"; compatible = "ti,omap3-evm", "ti,omap3"; + cpus { + cpu@0 { + cpu0-supply = <&vcc>; + }; + }; + memory { device_type = "memory"; reg = <0x80000000 0x10000000>; /* 256 MB */ }; + + leds { + compatible = "gpio-leds"; + ledb { + label = "omap3evm::ledb"; + gpios = <&twl_gpio 19 GPIO_ACTIVE_HIGH>; /* LEDB */ + linux,default-trigger = "default-on"; + }; + }; +}; + +&i2c1 { + clock-frequency = <2600000>; + + twl: twl@48 { + reg = <0x48>; + interrupts = <7>; /* SYS_NIRQ cascaded to intc */ + interrupt-parent = <&intc>; + }; +}; + +#include "twl4030.dtsi" +#include "twl4030_omap3.dtsi" + +&i2c2 { + clock-frequency = <400000>; +}; + +&i2c3 { + clock-frequency = <400000>; + + /* + * TVP5146 Video decoder-in for analog input support. + */ + tvp5146@5c { + compatible = "ti,tvp5146m2"; + reg = <0x5c>; + }; +}; + +&twl_gpio { + ti,use-leds; +}; + +&usb_otg_hs { + interface-type = <0>; + usb-phy = <&usb2_phy>; + mode = <3>; + power = <50>; }; diff --git a/arch/arm/boot/dts/omap3-gta04.dts b/arch/arm/boot/dts/omap3-gta04.dts deleted file mode 100644 index b9b55c9..0000000 --- a/arch/arm/boot/dts/omap3-gta04.dts +++ /dev/null @@ -1,170 +0,0 @@ -/* - * Copyright (C) 2013 Marek Belisko <marek@goldelico.com> - * - * Based on omap3-beagle-xm.dts - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -/dts-v1/; - -#include "omap36xx.dtsi" - -/ { - model = "OMAP3 GTA04"; - compatible = "ti,omap3-gta04", "ti,omap3"; - - cpus { - cpu@0 { - cpu0-supply = <&vcc>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x80000000 0x20000000>; /* 512 MB */ - }; - - gpio-keys { - compatible = "gpio-keys"; - - aux-button { - label = "aux"; - linux,code = <169>; - gpios = <&gpio1 7 GPIO_ACTIVE_LOW>; - gpio-key,wakeup; - }; - }; -}; - -&omap3_pmx_core { - uart1_pins: pinmux_uart1_pins { - pinctrl-single,pins = < - 0x152 (PIN_INPUT | MUX_MODE0) /* uart1_rx.uart1_rx */ - 0x14c (PIN_OUTPUT |MUX_MODE0) /* uart1_tx.uart1_tx */ - >; - }; - - uart2_pins: pinmux_uart2_pins { - pinctrl-single,pins = < - 0x14a (PIN_INPUT | MUX_MODE0) /* uart2_rx.uart2_rx */ - 0x148 (PIN_OUTPUT | MUX_MODE0) /* uart2_tx.uart2_tx */ - >; - }; - - uart3_pins: pinmux_uart3_pins { - pinctrl-single,pins = < - 0x16e (PIN_INPUT | MUX_MODE0) /* uart3_rx.uart3_rx */ - 0x170 (PIN_OUTPUT | MUX_MODE0) /* uart3_tx.uart3_tx */ - >; - }; - - mmc1_pins: pinmux_mmc1_pins { - pinctrl-single,pins = < - 0x114 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_clk.sdmmc1_clk */ - 0x116 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_cmd.sdmmc1_cmd */ - 0x118 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat0.sdmmc1_dat0 */ - 0x11a (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat1.sdmmc1_dat1 */ - 0x11c (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat2.sdmmc1_dat2 */ - 0x11e (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat3.sdmmc1_dat3 */ - >; - }; -}; - -&i2c1 { - clock-frequency = <2600000>; - - twl: twl@48 { - reg = <0x48>; - interrupts = <7>; /* SYS_NIRQ cascaded to intc */ - interrupt-parent = <&intc>; - }; -}; - -#include "twl4030.dtsi" -#include "twl4030_omap3.dtsi" - -&i2c2 { - clock-frequency = <400000>; - - /* pressure sensor */ - bmp085@77 { - compatible = "bosch,bmp085"; - reg = <0x77>; - }; - - /* leds */ - tca6507@45 { - compatible = "ti,tca6507"; - #address-cells = <1>; - #size-cells = <0>; - reg = <0x45>; - - gta04_led0: red_aux@0 { - label = "gta04:red:aux"; - reg = <0x0>; - }; - - gta04_led1: green_aux@1 { - label = "gta04:green:aux"; - reg = <0x1>; - }; - - gta04_led3: red_power@3 { - label = "gta04:red:power"; - reg = <0x3>; - linux,default-trigger = "default-on"; - }; - - gta04_led4: green_power@4 { - label = "gta04:green:power"; - reg = <0x4>; - }; - }; -}; - -&i2c3 { - clock-frequency = <100000>; -}; - -&usb_otg_hs { - interface-type = <0>; - usb-phy = <&usb2_phy>; - phys = <&usb2_phy>; - phy-names = "usb2-phy"; - mode = <3>; - power = <50>; -}; - -&mmc1 { - pinctrl-names = "default"; - pinctrl-0 = <&mmc1_pins>; - vmmc-supply = <&vmmc1>; - vmmc_aux-supply = <&vsim>; - bus-width = <4>; -}; - -&mmc2 { - status = "disabled"; -}; - -&mmc3 { - status = "disabled"; -}; - -&uart1 { - pinctrl-names = "default"; - pinctrl-0 = <&uart1_pins>; -}; - -&uart2 { - pinctrl-names = "default"; - pinctrl-0 = <&uart2_pins>; -}; - -&uart3 { - pinctrl-names = "default"; - pinctrl-0 = <&uart3_pins>; -}; - diff --git a/arch/arm/boot/dts/omap3-igep.dtsi b/arch/arm/boot/dts/omap3-igep.dtsi index 165aaf7..2326d11 100644 --- a/arch/arm/boot/dts/omap3-igep.dtsi +++ b/arch/arm/boot/dts/omap3-igep.dtsi @@ -1,5 +1,5 @@ /* - * Common device tree for IGEP boards based on AM/DM37x + * Device Tree Source for IGEP Technology devices * * Copyright (C) 2012 Javier Martinez Canillas <javier@collabora.co.uk> * Copyright (C) 2012 Enric Balletbo i Serra <eballetbo@gmail.com> @@ -10,7 +10,7 @@ */ /dts-v1/; -#include "omap36xx.dtsi" +#include "omap34xx.dtsi" / { memory { @@ -24,25 +24,6 @@ ti,mcbsp = <&mcbsp2>; ti,codec = <&twl_audio>; }; - - vdd33: regulator-vdd33 { - compatible = "regulator-fixed"; - regulator-name = "vdd33"; - regulator-always-on; - }; - - lbee1usjyc_vmmc: lbee1usjyc_vmmc { - pinctrl-names = "default"; - pinctrl-0 = <&lbee1usjyc_pins>; - compatible = "regulator-fixed"; - regulator-name = "regulator-lbee1usjyc"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - gpio = <&gpio5 10 GPIO_ACTIVE_HIGH>; /* gpio_138 WIFI_PDN */ - startup-delay-us = <10000>; - enable-active-high; - vin-supply = <&vdd33>; - }; }; &omap3_pmx_core { @@ -67,15 +48,6 @@ >; }; - /* WiFi/BT combo */ - lbee1usjyc_pins: pinmux_lbee1usjyc_pins { - pinctrl-single,pins = < - 0x136 (PIN_OUTPUT | MUX_MODE4) /* sdmmc2_dat5.gpio_137 */ - 0x138 (PIN_OUTPUT | MUX_MODE4) /* sdmmc2_dat6.gpio_138 */ - 0x13a (PIN_OUTPUT | MUX_MODE4) /* sdmmc2_dat7.gpio_139 */ - >; - }; - mcbsp2_pins: pinmux_mcbsp2_pins { pinctrl-single,pins = < 0x10c (PIN_INPUT | MUX_MODE0) /* mcbsp2_fsx.mcbsp2_fsx */ @@ -93,17 +65,10 @@ 0x11a (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat1.sdmmc1_dat1 */ 0x11c (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat2.sdmmc1_dat2 */ 0x11e (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat3.sdmmc1_dat3 */ - >; - }; - - mmc2_pins: pinmux_mmc2_pins { - pinctrl-single,pins = < - 0x128 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_clk.sdmmc2_clk */ - 0x12a (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_cmd.sdmmc2_cmd */ - 0x12c (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat0.sdmmc2_dat0 */ - 0x12e (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat1.sdmmc2_dat1 */ - 0x130 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat2.sdmmc2_dat2 */ - 0x132 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat3.sdmmc2_dat3 */ + 0x120 (PIN_INPUT | MUX_MODE0) /* sdmmc1_dat4.sdmmc1_dat4 */ + 0x122 (PIN_INPUT | MUX_MODE0) /* sdmmc1_dat5.sdmmc1_dat5 */ + 0x124 (PIN_INPUT | MUX_MODE0) /* sdmmc1_dat6.sdmmc1_dat6 */ + 0x126 (PIN_INPUT | MUX_MODE0) /* sdmmc1_dat7.sdmmc1_dat7 */ >; }; @@ -112,34 +77,9 @@ 0x1a2 (PIN_INPUT | MUX_MODE4) /* mcspi1_cs2.gpio_176 */ >; }; - - i2c1_pins: pinmux_i2c1_pins { - pinctrl-single,pins = < - 0x18a (PIN_INPUT | MUX_MODE0) /* i2c1_scl.i2c1_scl */ - 0x18c (PIN_INPUT | MUX_MODE0) /* i2c1_sda.i2c1_sda */ - >; - }; - - i2c2_pins: pinmux_i2c2_pins { - pinctrl-single,pins = < - 0x18e (PIN_INPUT | MUX_MODE0) /* i2c2_scl.i2c2_scl */ - 0x190 (PIN_INPUT | MUX_MODE0) /* i2c2_sda.i2c2_sda */ - >; - }; - - i2c3_pins: pinmux_i2c3_pins { - pinctrl-single,pins = < - 0x192 (PIN_INPUT | MUX_MODE0) /* i2c3_scl.i2c3_scl */ - 0x194 (PIN_INPUT | MUX_MODE0) /* i2c3_sda.i2c3_sda */ - >; - }; - - leds_pins: pinmux_leds_pins { }; }; &i2c1 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c1_pins>; clock-frequency = <2600000>; twl: twl@48 { @@ -159,16 +99,9 @@ #include "twl4030_omap3.dtsi" &i2c2 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c2_pins>; clock-frequency = <400000>; }; -&i2c3 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c3_pins>; -}; - &mcbsp2 { pinctrl-names = "default"; pinctrl-0 = <&mcbsp2_pins>; @@ -179,15 +112,11 @@ pinctrl-0 = <&mmc1_pins>; vmmc-supply = <&vmmc1>; vmmc_aux-supply = <&vsim>; - bus-width = <4>; + bus-width = <8>; }; &mmc2 { - pinctrl-names = "default"; - pinctrl-0 = <&mmc2_pins>; - vmmc-supply = <&lbee1usjyc_vmmc>; - bus-width = <4>; - non-removable; + status = "disabled"; }; &mmc3 { @@ -212,12 +141,3 @@ &twl_gpio { ti,use-leds; }; - -&usb_otg_hs { - interface-type = <0>; - usb-phy = <&usb2_phy>; - phys = <&usb2_phy>; - phy-names = "usb2-phy"; - mode = <3>; - power = <50>; -}; diff --git a/arch/arm/boot/dts/omap3-igep0020.dts b/arch/arm/boot/dts/omap3-igep0020.dts index 1c7e74d..e8c4828 100644 --- a/arch/arm/boot/dts/omap3-igep0020.dts +++ b/arch/arm/boot/dts/omap3-igep0020.dts @@ -1,5 +1,5 @@ /* - * Device Tree Source for IGEPv2 Rev. (TI OMAP AM/DM37x) + * Device Tree Source for IGEPv2 board * * Copyright (C) 2012 Javier Martinez Canillas <javier@collabora.co.uk> * Copyright (C) 2012 Enric Balletbo i Serra <eballetbo@gmail.com> @@ -10,17 +10,13 @@ */ #include "omap3-igep.dtsi" -#include "omap-gpmc-smsc911x.dtsi" / { - model = "IGEPv2 (TI OMAP AM/DM37x)"; + model = "IGEPv2"; compatible = "isee,omap3-igep0020", "ti,omap3"; leds { - pinctrl-names = "default"; - pinctrl-0 = <&leds_pins>; compatible = "gpio-leds"; - boot { label = "omap3:green:boot"; gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>; @@ -45,95 +41,17 @@ }; }; - /* HS USB Port 1 Power */ - hsusb1_power: hsusb1_power_reg { - compatible = "regulator-fixed"; - regulator-name = "hsusb1_vbus"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - gpio = <&twl_gpio 18 GPIO_ACTIVE_LOW>; /* GPIO LEDA */ - startup-delay-us = <70000>; - }; - - /* HS USB Host PHY on PORT 1 */ - hsusb1_phy: hsusb1_phy { - compatible = "usb-nop-xceiv"; - reset-gpios = <&gpio1 24 GPIO_ACTIVE_LOW>; /* gpio_24 */ - vcc-supply = <&hsusb1_power>; - }; -}; - -&omap3_pmx_core { - pinctrl-names = "default"; - pinctrl-0 = < - &hsusbb1_pins - &tfp410_pins - &dss_pins - >; - - hsusbb1_pins: pinmux_hsusbb1_pins { - pinctrl-single,pins = < - 0x5aa (PIN_OUTPUT | MUX_MODE3) /* etk_ctl.hsusb1_clk */ - 0x5a8 (PIN_OUTPUT | MUX_MODE3) /* etk_clk.hsusb1_stp */ - 0x5bc (PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d8.hsusb1_dir */ - 0x5be (PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d9.hsusb1_nxt */ - 0x5ac (PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d0.hsusb1_data0 */ - 0x5ae (PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d1.hsusb1_data1 */ - 0x5b0 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d2.hsusb1_data2 */ - 0x5b2 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d3.hsusb1_data7 */ - 0x5b4 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d4.hsusb1_data4 */ - 0x5b6 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d5.hsusb1_data5 */ - 0x5b8 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d6.hsusb1_data6 */ - 0x5ba (PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d7.hsusb1_data3 */ - >; + vddvario: regulator-vddvario { + compatible = "regulator-fixed"; + regulator-name = "vddvario"; + regulator-always-on; }; - tfp410_pins: tfp410_dvi_pins { - pinctrl-single,pins = < - 0x196 (PIN_OUTPUT | MUX_MODE4) /* hdq_sio.gpio_170 */ - >; + vdd33a: regulator-vdd33a { + compatible = "regulator-fixed"; + regulator-name = "vdd33a"; + regulator-always-on; }; - - dss_pins: pinmux_dss_dvi_pins { - pinctrl-single,pins = < - 0x0a4 (PIN_OUTPUT | MUX_MODE0) /* dss_pclk.dss_pclk */ - 0x0a6 (PIN_OUTPUT | MUX_MODE0) /* dss_hsync.dss_hsync */ - 0x0a8 (PIN_OUTPUT | MUX_MODE0) /* dss_vsync.dss_vsync */ - 0x0aa (PIN_OUTPUT | MUX_MODE0) /* dss_acbias.dss_acbias */ - 0x0ac (PIN_OUTPUT | MUX_MODE0) /* dss_data0.dss_data0 */ - 0x0ae (PIN_OUTPUT | MUX_MODE0) /* dss_data1.dss_data1 */ - 0x0b0 (PIN_OUTPUT | MUX_MODE0) /* dss_data2.dss_data2 */ - 0x0b2 (PIN_OUTPUT | MUX_MODE0) /* dss_data3.dss_data3 */ - 0x0b4 (PIN_OUTPUT | MUX_MODE0) /* dss_data4.dss_data4 */ - 0x0b6 (PIN_OUTPUT | MUX_MODE0) /* dss_data5.dss_data5 */ - 0x0b8 (PIN_OUTPUT | MUX_MODE0) /* dss_data6.dss_data6 */ - 0x0ba (PIN_OUTPUT | MUX_MODE0) /* dss_data7.dss_data7 */ - 0x0bc (PIN_OUTPUT | MUX_MODE0) /* dss_data8.dss_data8 */ - 0x0be (PIN_OUTPUT | MUX_MODE0) /* dss_data9.dss_data9 */ - 0x0c0 (PIN_OUTPUT | MUX_MODE0) /* dss_data10.dss_data10 */ - 0x0c2 (PIN_OUTPUT | MUX_MODE0) /* dss_data11.dss_data11 */ - 0x0c4 (PIN_OUTPUT | MUX_MODE0) /* dss_data12.dss_data12 */ - 0x0c6 (PIN_OUTPUT | MUX_MODE0) /* dss_data13.dss_data13 */ - 0x0c8 (PIN_OUTPUT | MUX_MODE0) /* dss_data14.dss_data14 */ - 0x0ca (PIN_OUTPUT | MUX_MODE0) /* dss_data15.dss_data15 */ - 0x0cc (PIN_OUTPUT | MUX_MODE0) /* dss_data16.dss_data16 */ - 0x0ce (PIN_OUTPUT | MUX_MODE0) /* dss_data17.dss_data17 */ - 0x0d0 (PIN_OUTPUT | MUX_MODE0) /* dss_data18.dss_data18 */ - 0x0d2 (PIN_OUTPUT | MUX_MODE0) /* dss_data19.dss_data19 */ - 0x0d4 (PIN_OUTPUT | MUX_MODE0) /* dss_data20.dss_data20 */ - 0x0d6 (PIN_OUTPUT | MUX_MODE0) /* dss_data21.dss_data21 */ - 0x0d8 (PIN_OUTPUT | MUX_MODE0) /* dss_data22.dss_data22 */ - 0x0da (PIN_OUTPUT | MUX_MODE0) /* dss_data23.dss_data23 */ - >; - }; -}; - -&leds_pins { - pinctrl-single,pins = < - 0x5c4 (PIN_OUTPUT | MUX_MODE4) /* etk_d12.gpio_26 */ - 0x5c6 (PIN_OUTPUT | MUX_MODE4) /* etk_d13.gpio_27 */ - 0x5c8 (PIN_OUTPUT | MUX_MODE4) /* etk_d14.gpio_28 */ - >; }; &i2c3 { @@ -181,42 +99,59 @@ label = "SPL"; reg = <0 0x100000>; }; - partition@80000 { + partition@0x80000 { label = "U-Boot"; reg = <0x100000 0x180000>; }; - partition@1c0000 { + partition@0x1c0000 { label = "Environment"; reg = <0x280000 0x100000>; }; - partition@280000 { + partition@0x280000 { label = "Kernel"; reg = <0x380000 0x300000>; }; - partition@780000 { + partition@0x780000 { label = "Filesystem"; reg = <0x680000 0x1f980000>; }; }; - ethernet@gpmc { + ethernet@5,0 { pinctrl-names = "default"; pinctrl-0 = <&smsc911x_pins>; + compatible = "smsc,lan9221", "smsc,lan9115"; reg = <5 0 0xff>; - interrupt-parent = <&gpio6>; - interrupts = <16 IRQ_TYPE_LEVEL_LOW>; - }; -}; + bank-width = <2>; -&usbhshost { - port1-mode = "ehci-phy"; -}; + gpmc,mux-add-data; + gpmc,cs-on-ns = <0>; + gpmc,cs-rd-off-ns = <186>; + gpmc,cs-wr-off-ns = <186>; + gpmc,adv-on-ns = <12>; + gpmc,adv-rd-off-ns = <48>; + gpmc,adv-wr-off-ns = <48>; + gpmc,oe-on-ns = <54>; + gpmc,oe-off-ns = <168>; + gpmc,we-on-ns = <54>; + gpmc,we-off-ns = <168>; + gpmc,rd-cycle-ns = <186>; + gpmc,wr-cycle-ns = <186>; + gpmc,access-ns = <114>; + gpmc,page-burst-access-ns = <6>; + gpmc,bus-turnaround-ns = <12>; + gpmc,cycle2cycle-delay-ns = <18>; + gpmc,wr-data-mux-bus-ns = <90>; + gpmc,wr-access-ns = <186>; + gpmc,cycle2cycle-samecsen; + gpmc,cycle2cycle-diffcsen; -&usbhsehci { - phys = <&hsusb1_phy>; -}; + interrupt-parent = <&gpio6>; + interrupts = <16 8>; + vmmc-supply = <&vddvario>; + vmmc_aux-supply = <&vdd33a>; + reg-io-width = <4>; -&vpll2 { - /* Needed for DSS */ - regulator-name = "vdds_dsi"; + smsc,save-mac-address; + }; }; diff --git a/arch/arm/boot/dts/omap3-igep0030.dts b/arch/arm/boot/dts/omap3-igep0030.dts index 02a23f8..644d053 100644 --- a/arch/arm/boot/dts/omap3-igep0030.dts +++ b/arch/arm/boot/dts/omap3-igep0030.dts @@ -1,5 +1,5 @@ /* - * Device Tree Source for IGEP COM MODULE (TI OMAP AM/DM37x) + * Device Tree Source for IGEP COM Module * * Copyright (C) 2012 Javier Martinez Canillas <javier@collabora.co.uk> * Copyright (C) 2012 Enric Balletbo i Serra <eballetbo@gmail.com> @@ -12,14 +12,11 @@ #include "omap3-igep.dtsi" / { - model = "IGEP COM MODULE (TI OMAP AM/DM37x)"; + model = "IGEP COM Module"; compatible = "isee,omap3-igep0030", "ti,omap3"; leds { - pinctrl-names = "default"; - pinctrl-0 = <&leds_pins>; compatible = "gpio-leds"; - boot { label = "omap3:green:boot"; gpios = <&twl_gpio 13 GPIO_ACTIVE_LOW>; @@ -46,12 +43,6 @@ }; }; -&leds_pins { - pinctrl-single,pins = < - 0x5b0 (PIN_OUTPUT | MUX_MODE4) /* etk_d2.gpio_16 */ - >; -}; - &gpmc { ranges = <0 0 0x00000000 0x20000000>; @@ -83,19 +74,19 @@ label = "SPL"; reg = <0 0x100000>; }; - partition@80000 { + partition@0x80000 { label = "U-Boot"; reg = <0x100000 0x180000>; }; - partition@1c0000 { + partition@0x1c0000 { label = "Environment"; reg = <0x280000 0x100000>; }; - partition@280000 { + partition@0x280000 { label = "Kernel"; reg = <0x380000 0x300000>; }; - partition@780000 { + partition@0x780000 { label = "Filesystem"; reg = <0x680000 0x1f980000>; }; diff --git a/arch/arm/boot/dts/omap3-n9.dts b/arch/arm/boot/dts/omap3-n9.dts deleted file mode 100644 index 39828ce..0000000 --- a/arch/arm/boot/dts/omap3-n9.dts +++ /dev/null @@ -1,18 +0,0 @@ -/* - * omap3-n9.dts - Device Tree file for Nokia N9 - * - * Written by: Aaro Koskinen <aaro.koskinen@iki.fi> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -/dts-v1/; - -#include "omap3-n950-n9.dtsi" - -/ { - model = "Nokia N9"; - compatible = "nokia,omap3-n9", "ti,omap3"; -}; diff --git a/arch/arm/boot/dts/omap3-n900.dts b/arch/arm/boot/dts/omap3-n900.dts deleted file mode 100644 index c2c306d..0000000 --- a/arch/arm/boot/dts/omap3-n900.dts +++ /dev/null @@ -1,505 +0,0 @@ -/* - * Copyright (C) 2013 Pavel Machek <pavel@ucw.cz> - * Copyright 2013 Aaro Koskinen <aaro.koskinen@iki.fi> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 (or later) as - * published by the Free Software Foundation. - */ - -/dts-v1/; - -#include "omap34xx.dtsi" - -/ { - model = "Nokia N900"; - compatible = "nokia,omap3-n900", "ti,omap3"; - - cpus { - cpu@0 { - cpu0-supply = <&vcc>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x80000000 0x10000000>; /* 256 MB */ - }; - - gpio_keys { - compatible = "gpio-keys"; - - camera_lens_cover { - label = "Camera Lens Cover"; - gpios = <&gpio4 14 GPIO_ACTIVE_LOW>; /* 110 */ - linux,input-type = <5>; /* EV_SW */ - linux,code = <0x09>; /* SW_CAMERA_LENS_COVER */ - gpio-key,wakeup; - }; - - camera_focus { - label = "Camera Focus"; - gpios = <&gpio3 4 GPIO_ACTIVE_LOW>; /* 68 */ - linux,code = <0x210>; /* KEY_CAMERA_FOCUS */ - gpio-key,wakeup; - }; - - camera_capture { - label = "Camera Capture"; - gpios = <&gpio3 5 GPIO_ACTIVE_LOW>; /* 69 */ - linux,code = <0xd4>; /* KEY_CAMERA */ - gpio-key,wakeup; - }; - - lock_button { - label = "Lock Button"; - gpios = <&gpio4 17 GPIO_ACTIVE_LOW>; /* 113 */ - linux,code = <0x98>; /* KEY_SCREENLOCK */ - gpio-key,wakeup; - }; - - keypad_slide { - label = "Keypad Slide"; - gpios = <&gpio3 7 GPIO_ACTIVE_LOW>; /* 71 */ - linux,input-type = <5>; /* EV_SW */ - linux,code = <0x0a>; /* SW_KEYPAD_SLIDE */ - gpio-key,wakeup; - }; - - proximity_sensor { - label = "Proximity Sensor"; - gpios = <&gpio3 25 GPIO_ACTIVE_HIGH>; /* 89 */ - linux,input-type = <5>; /* EV_SW */ - linux,code = <0x0b>; /* SW_FRONT_PROXIMITY */ - }; - }; - -}; - -&omap3_pmx_core { - pinctrl-names = "default"; - - uart2_pins: pinmux_uart2_pins { - pinctrl-single,pins = < - 0x14a (PIN_INPUT | MUX_MODE0) /* uart2_rx */ - 0x148 (PIN_OUTPUT | MUX_MODE0) /* uart2_tx */ - >; - }; - - uart3_pins: pinmux_uart3_pins { - pinctrl-single,pins = < - 0x16e (PIN_INPUT | MUX_MODE0) /* uart3_rx */ - 0x170 (PIN_OUTPUT | MUX_MODE0) /* uart3_tx */ - >; - }; - - i2c1_pins: pinmux_i2c1_pins { - pinctrl-single,pins = < - 0x18a (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_scl */ - 0x18c (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_sda */ - >; - }; - - i2c2_pins: pinmux_i2c2_pins { - pinctrl-single,pins = < - 0x18e (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c2_scl */ - 0x190 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c2_sda */ - >; - }; - - i2c3_pins: pinmux_i2c3_pins { - pinctrl-single,pins = < - 0x192 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c3_scl */ - 0x194 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c3_sda */ - >; - }; - - mmc1_pins: pinmux_mmc1_pins { - pinctrl-single,pins = < - 0x114 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_clk */ - 0x116 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_cmd */ - 0x118 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat0 */ - 0x11a (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat1 */ - 0x11c (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat2 */ - 0x11e (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat3 */ - >; - }; - - mmc2_pins: pinmux_mmc2_pins { - pinctrl-single,pins = < - 0x128 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_clk */ - 0x12a (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_cmd */ - 0x12c (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat0 */ - 0x12e (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat1 */ - 0x130 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat2 */ - 0x132 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat3 */ - 0x134 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat4 */ - 0x136 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat5 */ - 0x138 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat6 */ - 0x13a (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat7 */ - >; - }; - - display_pins: pinmux_display_pins { - pinctrl-single,pins = < - 0x0d4 (PIN_OUTPUT | MUX_MODE4) /* RX51_LCD_RESET_GPIO */ - >; - }; -}; - -&i2c1 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c1_pins>; - - clock-frequency = <2200000>; - - twl: twl@48 { - reg = <0x48>; - interrupts = <7>; /* SYS_NIRQ cascaded to intc */ - interrupt-parent = <&intc>; - }; -}; - -#include "twl4030.dtsi" -#include "twl4030_omap3.dtsi" - -&vaux1 { - regulator-name = "V28"; - regulator-min-microvolt = <2800000>; - regulator-max-microvolt = <2800000>; - regulator-always-on; /* due battery cover sensor */ -}; - -&vaux2 { - regulator-name = "VCSI"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; -}; - -&vaux3 { - regulator-name = "VMMC2_30"; - regulator-min-microvolt = <2800000>; - regulator-max-microvolt = <3000000>; -}; - -&vaux4 { - regulator-name = "VCAM_ANA_28"; - regulator-min-microvolt = <2800000>; - regulator-max-microvolt = <2800000>; -}; - -&vmmc1 { - regulator-name = "VMMC1"; - regulator-min-microvolt = <1850000>; - regulator-max-microvolt = <3150000>; -}; - -&vmmc2 { - regulator-name = "V28_A"; - regulator-min-microvolt = <2800000>; - regulator-max-microvolt = <3000000>; - regulator-always-on; /* due VIO leak to AIC34 VDDs */ -}; - -&vpll1 { - regulator-name = "VPLL"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-always-on; -}; - -&vpll2 { - regulator-name = "VSDI_CSI"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-always-on; -}; - -&vsim { - regulator-name = "VMMC2_IO_18"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; -}; - -&vio { - regulator-name = "VIO"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - -}; - -&vintana1 { - regulator-name = "VINTANA1"; - /* fixed to 1500000 */ - regulator-always-on; -}; - -&vintana2 { - regulator-name = "VINTANA2"; - regulator-min-microvolt = <2750000>; - regulator-max-microvolt = <2750000>; - regulator-always-on; -}; - -&vintdig { - regulator-name = "VINTDIG"; - /* fixed to 1500000 */ - regulator-always-on; -}; - -&twl { - twl_audio: audio { - compatible = "ti,twl4030-audio"; - ti,enable-vibra = <1>; - }; -}; - -&twl_gpio { - ti,pullups = <0x0>; - ti,pulldowns = <0x03ff3f>; /* BIT(0..5) | BIT(8..17) */ -}; - -&i2c2 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c2_pins>; - - clock-frequency = <100000>; - - tlv320aic3x: tlv320aic3x@18 { - compatible = "ti,tlv320aic3x"; - reg = <0x18>; - gpio-reset = <&gpio2 28 GPIO_ACTIVE_HIGH>; /* 60 */ - ai3x-gpio-func = < - 0 /* AIC3X_GPIO1_FUNC_DISABLED */ - 5 /* AIC3X_GPIO2_FUNC_DIGITAL_MIC_INPUT */ - >; - - AVDD-supply = <&vmmc2>; - DRVDD-supply = <&vmmc2>; - IOVDD-supply = <&vio>; - DVDD-supply = <&vio>; - }; - - tlv320aic3x_aux: tlv320aic3x@19 { - compatible = "ti,tlv320aic3x"; - reg = <0x19>; - gpio-reset = <&gpio2 28 GPIO_ACTIVE_HIGH>; /* 60 */ - - AVDD-supply = <&vmmc2>; - DRVDD-supply = <&vmmc2>; - IOVDD-supply = <&vio>; - DVDD-supply = <&vio>; - }; - - lp5523: lp5523@32 { - compatible = "national,lp5523"; - reg = <0x32>; - clock-mode = /bits/ 8 <0>; /* LP55XX_CLOCK_AUTO */ - enable-gpio = <&gpio2 9 GPIO_ACTIVE_HIGH>; /* 41 */ - - chan0 { - chan-name = "lp5523:kb1"; - led-cur = /bits/ 8 <50>; - max-cur = /bits/ 8 <100>; - }; - - chan1 { - chan-name = "lp5523:kb2"; - led-cur = /bits/ 8 <50>; - max-cur = /bits/ 8 <100>; - }; - - chan2 { - chan-name = "lp5523:kb3"; - led-cur = /bits/ 8 <50>; - max-cur = /bits/ 8 <100>; - }; - - chan3 { - chan-name = "lp5523:kb4"; - led-cur = /bits/ 8 <50>; - max-cur = /bits/ 8 <100>; - }; - - chan4 { - chan-name = "lp5523:b"; - led-cur = /bits/ 8 <50>; - max-cur = /bits/ 8 <100>; - }; - - chan5 { - chan-name = "lp5523:g"; - led-cur = /bits/ 8 <50>; - max-cur = /bits/ 8 <100>; - }; - - chan6 { - chan-name = "lp5523:r"; - led-cur = /bits/ 8 <50>; - max-cur = /bits/ 8 <100>; - }; - - chan7 { - chan-name = "lp5523:kb5"; - led-cur = /bits/ 8 <50>; - max-cur = /bits/ 8 <100>; - }; - - chan8 { - chan-name = "lp5523:kb6"; - led-cur = /bits/ 8 <50>; - max-cur = /bits/ 8 <100>; - }; - }; - - bq27200: bq27200@55 { - compatible = "ti,bq27200"; - reg = <0x55>; - }; -}; - -&i2c3 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c3_pins>; - - clock-frequency = <400000>; -}; - -&mmc1 { - pinctrl-names = "default"; - pinctrl-0 = <&mmc1_pins>; - vmmc-supply = <&vmmc1>; - bus-width = <4>; - cd-gpios = <&gpio6 0 GPIO_ACTIVE_HIGH>; /* 160 */ -}; - -/* most boards use vaux3, only some old versions use vmmc2 instead */ -&mmc2 { - pinctrl-names = "default"; - pinctrl-0 = <&mmc2_pins>; - vmmc-supply = <&vaux3>; - vmmc_aux-supply = <&vsim>; - bus-width = <8>; - non-removable; -}; - -&mmc3 { - status = "disabled"; -}; - -&gpmc { - ranges = <0 0 0x04000000 0x10000000>; /* 256MB */ - - /* gpio-irq for dma: 65 */ - - onenand@0,0 { - #address-cells = <1>; - #size-cells = <1>; - reg = <0 0 0x10000000>; - - gpmc,sync-read; - gpmc,sync-write; - gpmc,burst-length = <16>; - gpmc,burst-read; - gpmc,burst-wrap; - gpmc,burst-write; - gpmc,device-width = <2>; /* GPMC_DEVWIDTH_16BIT */ - gpmc,mux-add-data = <2>; /* GPMC_MUX_AD */ - gpmc,cs-on-ns = <0>; - gpmc,cs-rd-off-ns = <87>; - gpmc,cs-wr-off-ns = <87>; - gpmc,adv-on-ns = <0>; - gpmc,adv-rd-off-ns = <10>; - gpmc,adv-wr-off-ns = <10>; - gpmc,oe-on-ns = <15>; - gpmc,oe-off-ns = <87>; - gpmc,we-on-ns = <0>; - gpmc,we-off-ns = <87>; - gpmc,rd-cycle-ns = <112>; - gpmc,wr-cycle-ns = <112>; - gpmc,access-ns = <81>; - gpmc,page-burst-access-ns = <15>; - gpmc,bus-turnaround-ns = <0>; - gpmc,cycle2cycle-delay-ns = <0>; - gpmc,wait-monitoring-ns = <0>; - gpmc,clk-activation-ns = <5>; - gpmc,wr-data-mux-bus-ns = <30>; - gpmc,wr-access-ns = <81>; - gpmc,sync-clk-ps = <15000>; - - /* - * MTD partition table corresponding to Nokia's - * Maemo 5 (Fremantle) release. - */ - partition@0 { - label = "bootloader"; - reg = <0x00000000 0x00020000>; - read-only; - }; - partition@1 { - label = "config"; - reg = <0x00020000 0x00060000>; - }; - partition@2 { - label = "log"; - reg = <0x00080000 0x00040000>; - }; - partition@3 { - label = "kernel"; - reg = <0x000c0000 0x00200000>; - }; - partition@4 { - label = "initfs"; - reg = <0x002c0000 0x00200000>; - }; - partition@5 { - label = "rootfs"; - reg = <0x004c0000 0x0fb40000>; - }; - }; -}; - -&mcspi1 { - /* - * For some reason, touchscreen is necessary for screen to work at - * all on real hw. It works well without it on emulator. - * - * Also... order in the device tree actually matters here. - */ - tsc2005@0 { - compatible = "tsc2005"; - spi-max-frequency = <6000000>; - reg = <0>; - }; - mipid@2 { - compatible = "acx565akm"; - spi-max-frequency = <6000000>; - reg = <2>; - - pinctrl-names = "default"; - pinctrl-0 = <&display_pins>; - }; -}; - -&usb_otg_hs { - interface-type = <0>; - usb-phy = <&usb2_phy>; - phys = <&usb2_phy>; - phy-names = "usb2-phy"; - mode = <2>; - power = <50>; -}; - -&uart1 { - status = "disabled"; -}; - -&uart2 { - pinctrl-names = "default"; - pinctrl-0 = <&uart2_pins>; -}; - -&uart3 { - pinctrl-names = "default"; - pinctrl-0 = <&uart3_pins>; -}; diff --git a/arch/arm/boot/dts/omap3-n950-n9.dtsi b/arch/arm/boot/dts/omap3-n950-n9.dtsi deleted file mode 100644 index 94eb77d..0000000 --- a/arch/arm/boot/dts/omap3-n950-n9.dtsi +++ /dev/null @@ -1,174 +0,0 @@ -/* - * omap3-n950-n9.dtsi - Device Tree file for Nokia N950 & N9 (common stuff) - * - * Written by: Aaro Koskinen <aaro.koskinen@iki.fi> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include "omap36xx.dtsi" - -/ { - cpus { - cpu@0 { - cpu0-supply = <&vcc>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x80000000 0x40000000>; /* 1 GB */ - }; - - vemmc: fixedregulator@0 { - compatible = "regulator-fixed"; - regulator-name = "VEMMC"; - regulator-min-microvolt = <2900000>; - regulator-max-microvolt = <2900000>; - gpio = <&gpio5 29 0>; /* gpio line 157 */ - startup-delay-us = <150>; - enable-active-high; - }; -}; - -&omap3_pmx_core { - mmc2_pins: pinmux_mmc2_pins { - pinctrl-single,pins = < - 0x128 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_clk */ - 0x12a (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_cmd */ - 0x12c (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat0 */ - 0x12e (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat1 */ - 0x130 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat2 */ - 0x132 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat3 */ - >; - }; -}; - -&i2c1 { - clock-frequency = <2900000>; - - twl: twl@48 { - reg = <0x48>; - interrupts = <7>; /* SYS_NIRQ cascaded to intc */ - interrupt-parent = <&intc>; - }; -}; - -/include/ "twl4030.dtsi" - -&twl { - compatible = "ti,twl5031"; -}; - -&twl_gpio { - ti,pullups = <0x000001>; /* BIT(0) */ - ti,pulldowns = <0x008106>; /* BIT(1) | BIT(2) | BIT(8) | BIT(15) */ -}; - -&i2c2 { - clock-frequency = <400000>; -}; - -&i2c3 { - clock-frequency = <400000>; -}; - -&mmc1 { - status = "disabled"; -}; - -&mmc2 { - pinctrl-names = "default"; - pinctrl-0 = <&mmc2_pins>; - vmmc-supply = <&vemmc>; - bus-width = <4>; - ti,non-removable; -}; - -&mmc3 { - status = "disabled"; -}; - -&usb_otg_hs { - interface-type = <0>; - usb-phy = <&usb2_phy>; - phys = <&usb2_phy>; - phy-names = "usb2-phy"; - mode = <3>; - power = <50>; -}; - -&gpmc { - ranges = <0 0 0x04000000 0x20000000>; - - onenand@0,0 { - #address-cells = <1>; - #size-cells = <1>; - reg = <0 0 0x20000000>; - - gpmc,sync-read; - gpmc,sync-write; - gpmc,burst-length = <16>; - gpmc,burst-read; - gpmc,burst-wrap; - gpmc,burst-write; - gpmc,device-width = <2>; - gpmc,mux-add-data = <2>; - gpmc,cs-on-ns = <0>; - gpmc,cs-rd-off-ns = <87>; - gpmc,cs-wr-off-ns = <87>; - gpmc,adv-on-ns = <0>; - gpmc,adv-rd-off-ns = <10>; - gpmc,adv-wr-off-ns = <10>; - gpmc,oe-on-ns = <15>; - gpmc,oe-off-ns = <87>; - gpmc,we-on-ns = <0>; - gpmc,we-off-ns = <87>; - gpmc,rd-cycle-ns = <112>; - gpmc,wr-cycle-ns = <112>; - gpmc,access-ns = <81>; - gpmc,page-burst-access-ns = <15>; - gpmc,bus-turnaround-ns = <0>; - gpmc,cycle2cycle-delay-ns = <0>; - gpmc,wait-monitoring-ns = <0>; - gpmc,clk-activation-ns = <5>; - gpmc,wr-data-mux-bus-ns = <30>; - gpmc,wr-access-ns = <81>; - gpmc,sync-clk-ps = <15000>; - - /* - * MTD partition table corresponding to Nokia's MeeGo 1.2 - * Harmattan release. - */ - partition@0 { - label = "bootloader"; - reg = <0x00000000 0x00100000>; - }; - partition@1 { - label = "config"; - reg = <0x00100000 0x002c0000>; - }; - partition@2 { - label = "kernel"; - reg = <0x003c0000 0x01000000>; - }; - partition@3 { - label = "log"; - reg = <0x013c0000 0x00200000>; - }; - partition@4 { - label = "var"; - reg = <0x015c0000 0x1ca40000>; - }; - partition@5 { - label = "moslo"; - reg = <0x1e000000 0x02000000>; - }; - partition@6 { - label = "omap2-onenand"; - reg = <0x00000000 0x20000000>; - }; - }; -}; diff --git a/arch/arm/boot/dts/omap3-n950.dts b/arch/arm/boot/dts/omap3-n950.dts deleted file mode 100644 index b076a52..0000000 --- a/arch/arm/boot/dts/omap3-n950.dts +++ /dev/null @@ -1,18 +0,0 @@ -/* - * omap3-n950.dts - Device Tree file for Nokia N950 - * - * Written by: Aaro Koskinen <aaro.koskinen@iki.fi> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -/dts-v1/; - -#include "omap3-n950-n9.dtsi" - -/ { - model = "Nokia N950"; - compatible = "nokia,omap3-n950", "ti,omap3"; -}; diff --git a/arch/arm/boot/dts/omap3-overo.dtsi b/arch/arm/boot/dts/omap3-overo.dtsi index a461d2f..8f1abec 100644 --- a/arch/arm/boot/dts/omap3-overo.dtsi +++ b/arch/arm/boot/dts/omap3-overo.dtsi @@ -76,8 +76,6 @@ &usb_otg_hs { interface-type = <0>; usb-phy = <&usb2_phy>; - phys = <&usb2_phy>; - phy-names = "usb2-phy"; mode = <3>; power = <50>; }; diff --git a/arch/arm/boot/dts/omap3-zoom3.dts b/arch/arm/boot/dts/omap3-zoom3.dts deleted file mode 100644 index 15eb9fe..0000000 --- a/arch/arm/boot/dts/omap3-zoom3.dts +++ /dev/null @@ -1,217 +0,0 @@ -/* - * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/ - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -/dts-v1/; - -#include "omap36xx.dtsi" -#include "omap-zoom-common.dtsi" - -/ { - model = "TI Zoom3"; - compatible = "ti,omap3-zoom3", "ti,omap36xx", "ti,omap3"; - - cpus { - cpu@0 { - cpu0-supply = <&vcc>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x80000000 0x20000000>; /* 512 MB */ - }; - - vddvario: regulator-vddvario { - compatible = "regulator-fixed"; - regulator-name = "vddvario"; - regulator-always-on; - }; - - vdd33a: regulator-vdd33a { - compatible = "regulator-fixed"; - regulator-name = "vdd33a"; - regulator-always-on; - }; - - wl12xx_vmmc: wl12xx_vmmc { - pinctrl-names = "default"; - pinctrl-0 = <&wl12xx_gpio>; - compatible = "regulator-fixed"; - regulator-name = "vwl1271"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - gpio = <&gpio4 5 0>; /* gpio101 */ - startup-delay-us = <70000>; - enable-active-high; - }; -}; - -&omap3_pmx_core { - /* REVISIT: twl gpio0 is mmc0_cd */ - mmc1_pins: pinmux_mmc1_pins { - pinctrl-single,pins = < - 0x114 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* sdmmc1_clk.sdmmc1_clk */ - 0x116 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* sdmmc1_cmd.sdmmc1_cmd */ - 0x118 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat0.sdmmc1_dat0 */ - 0x11a (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat1.sdmmc1_dat1 */ - 0x11c (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat2.sdmmc1_dat2 */ - 0x11e (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat3.sdmmc1_dat3 */ - >; - }; - - mmc2_pins: pinmux_mmc2_pins { - pinctrl-single,pins = < - 0x128 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_clk.sdmmc2_clk */ - 0x12a (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_cmd.sdmmc2_cmd */ - 0x12c (PIN_INPUT | MUX_MODE0) /* sdmmc2_dat0.sdmmc2_dat0 */ - 0x12e (PIN_INPUT | MUX_MODE0) /* sdmmc2_dat1.sdmmc2_dat1 */ - 0x130 (PIN_INPUT | MUX_MODE0) /* sdmmc2_dat2.sdmmc2_dat2 */ - 0x132 (PIN_INPUT | MUX_MODE0) /* sdmmc2_dat3.sdmmc2_dat3 */ - 0x134 (PIN_INPUT | MUX_MODE0) /* sdmmc2_dat4.sdmmc2_dat4 */ - 0x136 (PIN_INPUT | MUX_MODE0) /* sdmmc2_dat5.sdmmc2_dat5 */ - 0x138 (PIN_INPUT | MUX_MODE0) /* sdmmc2_dat6.sdmmc2_dat6 */ - 0x13a (PIN_INPUT | MUX_MODE0) /* sdmmc2_dat7.sdmmc2_dat7 */ - >; - }; - - mmc3_pins: pinmux_mmc3_pins { - pinctrl-single,pins = < - 0x168 (PIN_INPUT | MUX_MODE4) /* mcbsp1_clkx.gpio_162 WLAN IRQ */ - 0x1a0 (PIN_INPUT_PULLUP | MUX_MODE3) /* mcspi1_cs1.sdmmc3_cmd */ - 0x5a8 (PIN_INPUT_PULLUP | MUX_MODE2) /* etk_clk.sdmmc3_clk */ - 0x5b4 (PIN_INPUT_PULLUP | MUX_MODE2) /* etk_d4.sdmmc3_dat0 */ - 0x5b6 (WAKEUP_EN | PIN_INPUT_PULLUP | MUX_MODE2) /* etk_d5.sdmmc3_dat1 */ - 0x5b8 (PIN_INPUT_PULLUP | MUX_MODE2) /* etk_d6.sdmmc3_dat2 */ - 0x5b2 (PIN_INPUT_PULLUP | MUX_MODE2) /* etk_d3.sdmmc3_dat3 */ - >; - }; - - uart1_pins: pinmux_uart1_pins { - pinctrl-single,pins = < - 0x150 (PIN_INPUT | MUX_MODE0) /* uart1_cts.uart1_cts */ - 0x14e (PIN_OUTPUT | MUX_MODE0) /* uart1_rts.uart1_rts */ - 0x152 (WAKEUP_EN | PIN_INPUT | MUX_MODE0) /* uart1_rx.uart1_rx */ - 0x14c (PIN_OUTPUT | MUX_MODE0) /* uart1_tx.uart1_tx */ - >; - }; - - uart2_pins: pinmux_uart2_pins { - pinctrl-single,pins = < - 0x144 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart2_cts.uart2_cts */ - 0x146 (PIN_OUTPUT | MUX_MODE0) /* uart2_rts.uart2_rts */ - 0x14a (WAKEUP_EN | PIN_INPUT | MUX_MODE0) /* uart2_rx.uart2_rx */ - 0x148 (PIN_OUTPUT | MUX_MODE0) /* uart2_tx.uart2_tx */ - >; - }; - - uart3_pins: pinmux_uart3_pins { - pinctrl-single,pins = < - 0x16a (PIN_INPUT_PULLDOWN | MUX_MODE0) /* uart3_cts_rctx.uart3_cts_rctx */ - 0x16c (PIN_OUTPUT | MUX_MODE0) /* uart3_rts_sd.uart3_rts_sd */ - 0x16e (WAKEUP_EN | PIN_INPUT | MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */ - 0x170 (PIN_OUTPUT | MUX_MODE0) /* uart3_tx_irtx.uart3_tx_irtx */ - >; - }; - - /* wl12xx GPIO output for WLAN_EN */ - wl12xx_gpio: pinmux_wl12xx_gpio { - pinctrl-single,pins = < - 0xea (PIN_OUTPUT| MUX_MODE4) /* cam_d2.gpio_101 */ - >; - }; -}; - -&omap3_pmx_wkup { - wlan_host_wkup: pinmux_wlan_host_wkup_pins { - pinctrl-single,pins = < - 0x1a (PIN_INPUT_PULLUP | MUX_MODE4) /* sys_clkout1.gpio_10 WLAN_HOST_WKUP */ - >; - }; -}; - -&i2c1 { - clock-frequency = <2600000>; - - twl: twl@48 { - reg = <0x48>; - interrupts = <7>; /* SYS_NIRQ cascaded to intc */ - interrupt-parent = <&intc>; - }; -}; - -#include "twl4030.dtsi" - -&i2c2 { - clock-frequency = <400000>; -}; - -&i2c3 { - clock-frequency = <400000>; - - /* - * TVP5146 Video decoder-in for analog input support. - */ - tvp5146@5c { - compatible = "ti,tvp5146m2"; - reg = <0x5c>; - }; -}; - -&twl_gpio { - ti,use-leds; -}; - -&mmc1 { - vmmc-supply = <&vmmc1>; - vmmc_aux-supply = <&vsim>; - bus-width = <4>; - pinctrl-names = "default"; - pinctrl-0 = <&mmc1_pins>; -}; -/* -&mmc2 { - vmmc-supply = <&vmmc2>; - ti,non-removable; - bus-width = <8>; - pinctrl-names = "default"; - pinctrl-0 = <&mmc2_pins>; -}; -*/ -&mmc3 { - vmmc-supply = <&wl12xx_vmmc>; - non-removable; - bus-width = <4>; - cap-power-off-card; - pinctrl-names = "default"; - pinctrl-0 = <&mmc3_pins>; -}; - -&uart1 { - pinctrl-names = "default"; - pinctrl-0 = <&uart1_pins>; -}; - -&uart2 { - pinctrl-names = "default"; - pinctrl-0 = <&uart2_pins>; -}; - -&uart3 { - pinctrl-names = "default"; - pinctrl-0 = <&uart3_pins>; -}; - -&uart4 { - status = "disabled"; -}; - -&usb_otg_hs { - interface-type = <0>; - usb-phy = <&usb2_phy>; - mode = <3>; - power = <50>; -}; diff --git a/arch/arm/boot/dts/omap3.dtsi b/arch/arm/boot/dts/omap3.dtsi index daabf99..b41bd57 100644 --- a/arch/arm/boot/dts/omap3.dtsi +++ b/arch/arm/boot/dts/omap3.dtsi @@ -19,9 +19,6 @@ interrupt-parent = <&intc>; aliases { - i2c0 = &i2c1; - i2c1 = &i2c2; - i2c2 = &i2c3; serial0 = &uart1; serial1 = &uart2; serial2 = &uart3; @@ -40,7 +37,6 @@ pmu { compatible = "arm,cortex-a8-pmu"; - reg = <0x54000000 0x800000>; interrupts = <3>; ti,hwmods = "debugss"; }; @@ -75,20 +71,11 @@ */ ocp { compatible = "simple-bus"; - reg = <0x68000000 0x10000>; - interrupts = <9 10>; #address-cells = <1>; #size-cells = <1>; ranges; ti,hwmods = "l3_main"; - aes: aes@480c5000 { - compatible = "ti,omap3-aes"; - ti,hwmods = "aes"; - reg = <0x480c5000 0x50>; - interrupts = <0>; - }; - counter32k: counter@48320000 { compatible = "ti,omap-counter32k"; reg = <0x48320000 0x20>; @@ -120,19 +107,15 @@ reg = <0x48002030 0x05cc>; #address-cells = <1>; #size-cells = <0>; - #interrupt-cells = <1>; - interrupt-controller; pinctrl-single,register-width = <16>; pinctrl-single,function-mask = <0xff1f>; }; - omap3_pmx_wkup: pinmux@48002a00 { + omap3_pmx_wkup: pinmux@0x48002a00 { compatible = "ti,omap3-padconf", "pinctrl-single"; reg = <0x48002a00 0x5c>; #address-cells = <1>; #size-cells = <0>; - #interrupt-cells = <1>; - interrupt-controller; pinctrl-single,register-width = <16>; pinctrl-single,function-mask = <0xff1f>; }; @@ -206,40 +189,24 @@ uart1: serial@4806a000 { compatible = "ti,omap3-uart"; - reg = <0x4806a000 0x2000>; - interrupts = <72>; - dmas = <&sdma 49 &sdma 50>; - dma-names = "tx", "rx"; ti,hwmods = "uart1"; clock-frequency = <48000000>; }; uart2: serial@4806c000 { compatible = "ti,omap3-uart"; - reg = <0x4806c000 0x400>; - interrupts = <73>; - dmas = <&sdma 51 &sdma 52>; - dma-names = "tx", "rx"; ti,hwmods = "uart2"; clock-frequency = <48000000>; }; uart3: serial@49020000 { compatible = "ti,omap3-uart"; - reg = <0x49020000 0x400>; - interrupts = <74>; - dmas = <&sdma 53 &sdma 54>; - dma-names = "tx", "rx"; ti,hwmods = "uart3"; clock-frequency = <48000000>; }; i2c1: i2c@48070000 { compatible = "ti,omap3-i2c"; - reg = <0x48070000 0x80>; - interrupts = <56>; - dmas = <&sdma 27 &sdma 28>; - dma-names = "tx", "rx"; #address-cells = <1>; #size-cells = <0>; ti,hwmods = "i2c1"; @@ -247,10 +214,6 @@ i2c2: i2c@48072000 { compatible = "ti,omap3-i2c"; - reg = <0x48072000 0x80>; - interrupts = <57>; - dmas = <&sdma 29 &sdma 30>; - dma-names = "tx", "rx"; #address-cells = <1>; #size-cells = <0>; ti,hwmods = "i2c2"; @@ -258,26 +221,13 @@ i2c3: i2c@48060000 { compatible = "ti,omap3-i2c"; - reg = <0x48060000 0x80>; - interrupts = <61>; - dmas = <&sdma 25 &sdma 26>; - dma-names = "tx", "rx"; #address-cells = <1>; #size-cells = <0>; ti,hwmods = "i2c3"; }; - mailbox: mailbox@48094000 { - compatible = "ti,omap3-mailbox"; - ti,hwmods = "mailbox"; - reg = <0x48094000 0x200>; - interrupts = <26>; - }; - mcspi1: spi@48098000 { compatible = "ti,omap2-mcspi"; - reg = <0x48098000 0x100>; - interrupts = <65>; #address-cells = <1>; #size-cells = <0>; ti,hwmods = "mcspi1"; @@ -296,8 +246,6 @@ mcspi2: spi@4809a000 { compatible = "ti,omap2-mcspi"; - reg = <0x4809a000 0x100>; - interrupts = <66>; #address-cells = <1>; #size-cells = <0>; ti,hwmods = "mcspi2"; @@ -311,8 +259,6 @@ mcspi3: spi@480b8000 { compatible = "ti,omap2-mcspi"; - reg = <0x480b8000 0x100>; - interrupts = <91>; #address-cells = <1>; #size-cells = <0>; ti,hwmods = "mcspi3"; @@ -326,8 +272,6 @@ mcspi4: spi@480ba000 { compatible = "ti,omap2-mcspi"; - reg = <0x480ba000 0x100>; - interrupts = <48>; #address-cells = <1>; #size-cells = <0>; ti,hwmods = "mcspi4"; @@ -336,17 +280,8 @@ dma-names = "tx0", "rx0"; }; - hdqw1w: 1w@480b2000 { - compatible = "ti,omap3-1w"; - reg = <0x480b2000 0x1000>; - interrupts = <58>; - ti,hwmods = "hdq1w"; - }; - mmc1: mmc@4809c000 { compatible = "ti,omap3-hsmmc"; - reg = <0x4809c000 0x200>; - interrupts = <83>; ti,hwmods = "mmc1"; ti,dual-volt; dmas = <&sdma 61>, <&sdma 62>; @@ -355,8 +290,6 @@ mmc2: mmc@480b4000 { compatible = "ti,omap3-hsmmc"; - reg = <0x480b4000 0x200>; - interrupts = <86>; ti,hwmods = "mmc2"; dmas = <&sdma 47>, <&sdma 48>; dma-names = "tx", "rx"; @@ -364,23 +297,13 @@ mmc3: mmc@480ad000 { compatible = "ti,omap3-hsmmc"; - reg = <0x480ad000 0x200>; - interrupts = <94>; ti,hwmods = "mmc3"; dmas = <&sdma 77>, <&sdma 78>; dma-names = "tx", "rx"; }; - mmu_isp: mmu@480bd400 { - compatible = "ti,omap3-mmu-isp"; - ti,hwmods = "mmu_isp"; - reg = <0x480bd400 0x80>; - interrupts = <8>; - }; - wdt2: wdt@48314000 { compatible = "ti,omap3-wdt"; - reg = <0x48314000 0x80>; ti,hwmods = "wd_timer2"; }; @@ -463,27 +386,6 @@ dma-names = "tx", "rx"; }; - sham: sham@480c3000 { - compatible = "ti,omap3-sham"; - ti,hwmods = "sham"; - reg = <0x480c3000 0x64>; - interrupts = <49>; - }; - - smartreflex_core: smartreflex@480cb000 { - compatible = "ti,omap3-smartreflex-core"; - ti,hwmods = "smartreflex_core"; - reg = <0x480cb000 0x400>; - interrupts = <19>; - }; - - smartreflex_mpu_iva: smartreflex@480c9000 { - compatible = "ti,omap3-smartreflex-iva"; - ti,hwmods = "smartreflex_mpu_iva"; - reg = <0x480c9000 0x400>; - interrupts = <18>; - }; - timer1: timer@48318000 { compatible = "ti,omap3430-timer"; reg = <0x48318000 0x400>; diff --git a/arch/arm/boot/dts/omap3430-sdp.dts b/arch/arm/boot/dts/omap3430-sdp.dts index 281914e..e2249bc 100644 --- a/arch/arm/boot/dts/omap3430-sdp.dts +++ b/arch/arm/boot/dts/omap3430-sdp.dts @@ -84,15 +84,15 @@ label = "bootloader-nor"; reg = <0 0x40000>; }; - partition@40000 { + partition@0x40000 { label = "params-nor"; reg = <0x40000 0x40000>; }; - partition@80000 { + partition@0x80000 { label = "kernel-nor"; reg = <0x80000 0x200000>; }; - partition@280000 { + partition@0x280000 { label = "filesystem-nor"; reg = <0x240000 0x7d80000>; }; @@ -125,19 +125,19 @@ label = "xloader-nand"; reg = <0 0x80000>; }; - partition@80000 { + partition@0x80000 { label = "bootloader-nand"; reg = <0x80000 0x140000>; }; - partition@1c0000 { + partition@0x1c0000 { label = "params-nand"; reg = <0x1c0000 0xc0000>; }; - partition@280000 { + partition@0x280000 { label = "kernel-nand"; reg = <0x280000 0x500000>; }; - partition@780000 { + partition@0x780000 { label = "filesystem-nand"; reg = <0x780000 0x7880000>; }; @@ -170,19 +170,19 @@ label = "xloader-onenand"; reg = <0 0x80000>; }; - partition@80000 { + partition@0x80000 { label = "bootloader-onenand"; reg = <0x80000 0x40000>; }; - partition@c0000 { + partition@0xc0000 { label = "params-onenand"; reg = <0xc0000 0x20000>; }; - partition@e0000 { + partition@0xe0000 { label = "kernel-onenand"; reg = <0xe0000 0x200000>; }; - partition@2e0000 { + partition@0x2e0000 { label = "filesystem-onenand"; reg = <0x2e0000 0xfd20000>; }; diff --git a/arch/arm/boot/dts/omap36xx.dtsi b/arch/arm/boot/dts/omap36xx.dtsi index 380c22e..f8b3765 100644 --- a/arch/arm/boot/dts/omap36xx.dtsi +++ b/arch/arm/boot/dts/omap36xx.dtsi @@ -31,10 +31,6 @@ ocp { uart4: serial@49042000 { compatible = "ti,omap3-uart"; - reg = <0x49042000 0x400>; - interrupts = <80>; - dmas = <&sdma 81 &sdma 82>; - dma-names = "tx", "rx"; ti,hwmods = "uart4"; clock-frequency = <48000000>; }; diff --git a/arch/arm/boot/dts/omap4-panda-common.dtsi b/arch/arm/boot/dts/omap4-panda-common.dtsi index 88c6a05..814ab67 100644 --- a/arch/arm/boot/dts/omap4-panda-common.dtsi +++ b/arch/arm/boot/dts/omap4-panda-common.dtsi @@ -60,6 +60,22 @@ "AFMR", "Line In"; }; + /* + * Temp hack: Need to be replaced with the proper gpio-controlled + * reset driver as soon it will be merged. + * http://thread.gmane.org/gmane.linux.drivers.devicetree/36830 + */ + /* HS USB Port 1 RESET */ + hsusb1_reset: hsusb1_reset_reg { + compatible = "regulator-fixed"; + regulator-name = "hsusb1_reset"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpio2 30 0>; /* gpio_62 */ + startup-delay-us = <70000>; + enable-active-high; + }; + /* HS USB Port 1 Power */ hsusb1_power: hsusb1_power_reg { compatible = "regulator-fixed"; @@ -81,7 +97,7 @@ /* HS USB Host PHY on PORT 1 */ hsusb1_phy: hsusb1_phy { compatible = "usb-nop-xceiv"; - reset-gpios = <&gpio2 30 GPIO_ACTIVE_LOW>; /* gpio_62 */ + reset-supply = <&hsusb1_reset>; vcc-supply = <&hsusb1_power>; /** * FIXME: @@ -106,19 +122,37 @@ }; }; +&omap4_pmx_wkup { + pinctrl-names = "default"; + pinctrl-0 = < + &twl6030_wkup_pins + >; + + twl6030_wkup_pins: pinmux_twl6030_wkup_pins { + pinctrl-single,pins = < + 0x14 (PIN_OUTPUT | MUX_MODE2) /* fref_clk0_out.sys_drm_msecure */ + >; + }; +}; + &omap4_pmx_core { pinctrl-names = "default"; pinctrl-0 = < + &twl6030_pins &twl6040_pins &mcpdm_pins &mcbsp1_pins - &dss_dpi_pins - &tfp410_pins &dss_hdmi_pins &tpd12s015_pins &hsusbb1_pins >; + twl6030_pins: pinmux_twl6030_pins { + pinctrl-single,pins = < + 0x15e (WAKEUP_EN | PIN_INPUT_PULLUP | MUX_MODE0) /* sys_nirq1.sys_nirq1 */ + >; + }; + twl6040_pins: pinmux_twl6040_pins { pinctrl-single,pins = < 0xe0 (PIN_OUTPUT | MUX_MODE3) /* hdq_sio.gpio_127 */ @@ -145,47 +179,6 @@ >; }; - dss_dpi_pins: pinmux_dss_dpi_pins { - pinctrl-single,pins = < - 0x122 (PIN_OUTPUT | MUX_MODE5) /* dispc2_data23 */ - 0x124 (PIN_OUTPUT | MUX_MODE5) /* dispc2_data22 */ - 0x126 (PIN_OUTPUT | MUX_MODE5) /* dispc2_data21 */ - 0x128 (PIN_OUTPUT | MUX_MODE5) /* dispc2_data20 */ - 0x12a (PIN_OUTPUT | MUX_MODE5) /* dispc2_data19 */ - 0x12c (PIN_OUTPUT | MUX_MODE5) /* dispc2_data18 */ - 0x12e (PIN_OUTPUT | MUX_MODE5) /* dispc2_data15 */ - 0x130 (PIN_OUTPUT | MUX_MODE5) /* dispc2_data14 */ - 0x132 (PIN_OUTPUT | MUX_MODE5) /* dispc2_data13 */ - 0x134 (PIN_OUTPUT | MUX_MODE5) /* dispc2_data12 */ - 0x136 (PIN_OUTPUT | MUX_MODE5) /* dispc2_data11 */ - - 0x174 (PIN_OUTPUT | MUX_MODE5) /* dispc2_data10 */ - 0x176 (PIN_OUTPUT | MUX_MODE5) /* dispc2_data9 */ - 0x178 (PIN_OUTPUT | MUX_MODE5) /* dispc2_data16 */ - 0x17a (PIN_OUTPUT | MUX_MODE5) /* dispc2_data17 */ - 0x17c (PIN_OUTPUT | MUX_MODE5) /* dispc2_hsync */ - 0x17e (PIN_OUTPUT | MUX_MODE5) /* dispc2_pclk */ - 0x180 (PIN_OUTPUT | MUX_MODE5) /* dispc2_vsync */ - 0x182 (PIN_OUTPUT | MUX_MODE5) /* dispc2_de */ - 0x184 (PIN_OUTPUT | MUX_MODE5) /* dispc2_data8 */ - 0x186 (PIN_OUTPUT | MUX_MODE5) /* dispc2_data7 */ - 0x188 (PIN_OUTPUT | MUX_MODE5) /* dispc2_data6 */ - 0x18a (PIN_OUTPUT | MUX_MODE5) /* dispc2_data5 */ - 0x18c (PIN_OUTPUT | MUX_MODE5) /* dispc2_data4 */ - 0x18e (PIN_OUTPUT | MUX_MODE5) /* dispc2_data3 */ - - 0x190 (PIN_OUTPUT | MUX_MODE5) /* dispc2_data2 */ - 0x192 (PIN_OUTPUT | MUX_MODE5) /* dispc2_data1 */ - 0x194 (PIN_OUTPUT | MUX_MODE5) /* dispc2_data0 */ - >; - }; - - tfp410_pins: pinmux_tfp410_pins { - pinctrl-single,pins = < - 0x144 (PIN_OUTPUT | MUX_MODE3) /* gpio_0 */ - >; - }; - dss_hdmi_pins: pinmux_dss_hdmi_pins { pinctrl-single,pins = < 0x5a (PIN_INPUT_PULLUP | MUX_MODE0) /* hdmi_cec.hdmi_cec */ @@ -246,6 +239,15 @@ 0xf0 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c4_sda */ >; }; +}; + +&omap4_pmx_wkup { + led_wkgpio_pins: pinmux_leds_wkpins { + pinctrl-single,pins = < + 0x1a (PIN_OUTPUT | MUX_MODE3) /* gpio_wk7 */ + 0x1c (PIN_OUTPUT | MUX_MODE3) /* gpio_wk8 */ + >; + }; /* * wl12xx GPIO outputs for WLAN_EN, BT_EN, FM_EN, BT_WAKEUP @@ -265,7 +267,7 @@ pinctrl-single,pins = < 0x38 (PIN_INPUT | MUX_MODE3) /* gpmc_ncs2.gpio_52 */ 0x3a (PIN_INPUT | MUX_MODE3) /* gpmc_ncs3.gpio_53 */ - 0x108 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_clk.sdmmc5_clk */ + 0x108 (PIN_OUTPUT | MUX_MODE0) /* sdmmc5_clk.sdmmc5_clk */ 0x10a (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_cmd.sdmmc5_cmd */ 0x10c (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_dat0.sdmmc5_dat0 */ 0x10e (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_dat1.sdmmc5_dat1 */ @@ -275,15 +277,6 @@ }; }; -&omap4_pmx_wkup { - led_wkgpio_pins: pinmux_leds_wkpins { - pinctrl-single,pins = < - 0x1a (PIN_OUTPUT | MUX_MODE3) /* gpio_wk7 */ - 0x1c (PIN_OUTPUT | MUX_MODE3) /* gpio_wk8 */ - >; - }; -}; - &i2c1 { pinctrl-names = "default"; pinctrl-0 = <&i2c1_pins>; @@ -312,7 +305,6 @@ }; #include "twl6030.dtsi" -#include "twl6030_omap4.dtsi" &i2c2 { pinctrl-names = "default"; diff --git a/arch/arm/boot/dts/omap4-panda-es.dts b/arch/arm/boot/dts/omap4-panda-es.dts index 816d1c9..56c4354 100644 --- a/arch/arm/boot/dts/omap4-panda-es.dts +++ b/arch/arm/boot/dts/omap4-panda-es.dts @@ -62,7 +62,3 @@ gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>; }; }; - -&gpio1 { - ti,no-reset-on-init; -}; diff --git a/arch/arm/boot/dts/omap4-sdp.dts b/arch/arm/boot/dts/omap4-sdp.dts index dbc81fb..4f78380 100644 --- a/arch/arm/boot/dts/omap4-sdp.dts +++ b/arch/arm/boot/dts/omap4-sdp.dts @@ -155,9 +155,23 @@ }; }; +&omap4_pmx_wkup { + pinctrl-names = "default"; + pinctrl-0 = < + &twl6030_wkup_pins + >; + + twl6030_wkup_pins: pinmux_twl6030_wkup_pins { + pinctrl-single,pins = < + 0x14 (PIN_OUTPUT | MUX_MODE2) /* fref_clk0_out.sys_drm_msecure */ + >; + }; +}; + &omap4_pmx_core { pinctrl-names = "default"; pinctrl-0 = < + &twl6030_pins &twl6040_pins &mcpdm_pins &dmic_pins @@ -192,6 +206,12 @@ >; }; + twl6030_pins: pinmux_twl6030_pins { + pinctrl-single,pins = < + 0x15e (WAKEUP_EN | PIN_INPUT_PULLUP | MUX_MODE0) /* sys_nirq1.sys_nirq1 */ + >; + }; + twl6040_pins: pinmux_twl6040_pins { pinctrl-single,pins = < 0xe0 (PIN_OUTPUT | MUX_MODE3) /* hdq_sio.gpio_127 */ @@ -300,12 +320,12 @@ wl12xx_pins: pinmux_wl12xx_pins { pinctrl-single,pins = < 0x3a (PIN_INPUT | MUX_MODE3) /* gpmc_ncs3.gpio_53 */ - 0x108 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_clk.sdmmc5_clk */ - 0x10a (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_cmd.sdmmc5_cmd */ - 0x10c (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_dat0.sdmmc5_dat0 */ - 0x10e (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_dat1.sdmmc5_dat1 */ - 0x110 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_dat2.sdmmc5_dat2 */ - 0x112 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_dat3.sdmmc5_dat3 */ + 0x108 (PIN_OUTPUT | MUX_MODE3) /* sdmmc5_clk.sdmmc5_clk */ + 0x10a (PIN_INPUT_PULLUP | MUX_MODE3) /* sdmmc5_cmd.sdmmc5_cmd */ + 0x10c (PIN_INPUT_PULLUP | MUX_MODE3) /* sdmmc5_dat0.sdmmc5_dat0 */ + 0x10e (PIN_INPUT_PULLUP | MUX_MODE3) /* sdmmc5_dat1.sdmmc5_dat1 */ + 0x110 (PIN_INPUT_PULLUP | MUX_MODE3) /* sdmmc5_dat2.sdmmc5_dat2 */ + 0x112 (PIN_INPUT_PULLUP | MUX_MODE3) /* sdmmc5_dat3.sdmmc5_dat3 */ >; }; }; @@ -350,7 +370,6 @@ }; #include "twl6030.dtsi" -#include "twl6030_omap4.dtsi" &i2c2 { pinctrl-names = "default"; diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi index a1e0585..22d9f2b 100644 --- a/arch/arm/boot/dts/omap4.dtsi +++ b/arch/arm/boot/dts/omap4.dtsi @@ -17,10 +17,6 @@ interrupt-parent = <&gic>; aliases { - i2c0 = &i2c1; - i2c1 = &i2c2; - i2c2 = &i2c3; - i2c3 = &i2c4; serial0 = &uart1; serial1 = &uart2; serial2 = &uart3; @@ -60,7 +56,7 @@ cache-level = <2>; }; - local-timer@48240600 { + local-timer@0x48240600 { compatible = "arm,cortex-a9-twd-timer"; reg = <0x48240600 0x20>; interrupts = <GIC_PPI 13 (GIC_CPU_MASK_RAW(3) | IRQ_TYPE_LEVEL_HIGH)>; @@ -118,8 +114,6 @@ reg = <0x4a100040 0x0196>; #address-cells = <1>; #size-cells = <0>; - #interrupt-cells = <1>; - interrupt-controller; pinctrl-single,register-width = <16>; pinctrl-single,function-mask = <0x7fff>; }; @@ -128,8 +122,6 @@ reg = <0x4a31e040 0x0038>; #address-cells = <1>; #size-cells = <0>; - #interrupt-cells = <1>; - interrupt-controller; pinctrl-single,register-width = <16>; pinctrl-single,function-mask = <0x7fff>; }; @@ -222,7 +214,6 @@ gpmc,num-cs = <8>; gpmc,num-waitpins = <4>; ti,hwmods = "gpmc"; - ti,no-idle-on-init; }; uart1: serial@4806a000 { @@ -257,12 +248,6 @@ clock-frequency = <48000000>; }; - hwspinlock: spinlock@4a0f6000 { - compatible = "ti,omap4-hwspinlock"; - reg = <0x4a0f6000 0x1000>; - ti,hwmods = "spinlock"; - }; - i2c1: i2c@48070000 { compatible = "ti,omap4-i2c"; reg = <0x48070000 0x100>; @@ -507,7 +492,6 @@ reg = <0x4c000000 0x100>; interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "emif1"; - ti,no-idle-on-init; phy-type = <1>; hw-caps-read-idle-ctrl; hw-caps-ll-interface; @@ -519,7 +503,6 @@ reg = <0x4d000000 0x100>; interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "emif2"; - ti,no-idle-on-init; phy-type = <1>; hw-caps-read-idle-ctrl; hw-caps-ll-interface; @@ -536,8 +519,7 @@ usb2_phy: usb2phy@4a0ad080 { compatible = "ti,omap-usb2"; reg = <0x4a0ad080 0x58>; - ctrl-module = <&omap_control_usb2phy>; - #phy-cells = <0>; + ctrl-module = <&omap_control_usb>; }; }; @@ -661,16 +643,12 @@ }; }; - omap_control_usb2phy: control-phy@4a002300 { - compatible = "ti,control-phy-usb2"; - reg = <0x4a002300 0x4>; - reg-names = "power"; - }; - - omap_control_usbotg: control-phy@4a00233c { - compatible = "ti,control-phy-otghs"; - reg = <0x4a00233c 0x4>; - reg-names = "otghs_control"; + omap_control_usb: omap-control-usb@4a002300 { + compatible = "ti,omap-control-usb"; + reg = <0x4a002300 0x4>, + <0x4a00233c 0x4>; + reg-names = "control_dev_conf", "otghs_control"; + ti,type = <1>; }; usb_otg_hs: usb_otg_hs@4a0ab000 { @@ -680,30 +658,10 @@ interrupt-names = "mc", "dma"; ti,hwmods = "usb_otg_hs"; usb-phy = <&usb2_phy>; - phys = <&usb2_phy>; - phy-names = "usb2-phy"; multipoint = <1>; num-eps = <16>; ram-bits = <12>; - ctrl-module = <&omap_control_usbotg>; - }; - - aes: aes@4b501000 { - compatible = "ti,omap4-aes"; - ti,hwmods = "aes"; - reg = <0x4b501000 0xa0>; - interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&sdma 111>, <&sdma 110>; - dma-names = "tx", "rx"; - }; - - des: des@480a5000 { - compatible = "ti,omap4-des"; - ti,hwmods = "des"; - reg = <0x480a5000 0xa0>; - interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&sdma 117>, <&sdma 116>; - dma-names = "tx", "rx"; + ti,has-mailbox; }; }; }; diff --git a/arch/arm/boot/dts/omap5-uevm.dts b/arch/arm/boot/dts/omap5-uevm.dts index 002fa70..65d7b60 100644 --- a/arch/arm/boot/dts/omap5-uevm.dts +++ b/arch/arm/boot/dts/omap5-uevm.dts @@ -27,10 +27,21 @@ regulator-max-microvolt = <3000000>; }; + /* HS USB Port 2 RESET */ + hsusb2_reset: hsusb2_reset_reg { + compatible = "regulator-fixed"; + regulator-name = "hsusb2_reset"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpio3 16 GPIO_ACTIVE_HIGH>; /* gpio3_80 HUB_NRESET */ + startup-delay-us = <70000>; + enable-active-high; + }; + /* HS USB Host PHY on PORT 2 */ hsusb2_phy: hsusb2_phy { compatible = "usb-nop-xceiv"; - reset-gpios = <&gpio3 16 GPIO_ACTIVE_LOW>; /* gpio3_80 HUB_NRESET */ + reset-supply = <&hsusb2_reset>; /** * FIXME * Put the right clock phandle here when available @@ -40,10 +51,21 @@ clock-frequency = <19200000>; }; + /* HS USB Port 3 RESET */ + hsusb3_reset: hsusb3_reset_reg { + compatible = "regulator-fixed"; + regulator-name = "hsusb3_reset"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpio3 15 GPIO_ACTIVE_HIGH>; /* gpio3_79 ETH_NRESET */ + startup-delay-us = <70000>; + enable-active-high; + }; + /* HS USB Host PHY on PORT 3 */ hsusb3_phy: hsusb3_phy { compatible = "usb-nop-xceiv"; - reset-gpios = <&gpio3 15 GPIO_ACTIVE_LOW>; /* gpio3_79 ETH_NRESET */ + reset-supply = <&hsusb3_reset>; }; leds { @@ -62,6 +84,7 @@ pinctrl-0 = < &twl6040_pins &mcpdm_pins + &dmic_pins &mcbsp1_pins &mcbsp2_pins &usbhost_pins @@ -70,7 +93,7 @@ twl6040_pins: pinmux_twl6040_pins { pinctrl-single,pins = < - 0x17e (PIN_OUTPUT | MUX_MODE6) /* mcspi1_somi.gpio5_141 */ + 0x18a (PIN_OUTPUT | MUX_MODE6) /* perslimbus2_clock.gpio5_145 */ >; }; @@ -84,6 +107,15 @@ >; }; + dmic_pins: pinmux_dmic_pins { + pinctrl-single,pins = < + 0x144 (PIN_INPUT | MUX_MODE0) /* abedmic_din1.abedmic_din1 */ + 0x146 (PIN_INPUT | MUX_MODE0) /* abedmic_din2.abedmic_din2 */ + 0x148 (PIN_INPUT | MUX_MODE0) /* abedmic_din3.abedmic_din3 */ + 0x14a (PIN_OUTPUT | MUX_MODE0) /* abedmic_clk1.abedmic_clk1 */ + >; + }; + mcbsp1_pins: pinmux_mcbsp1_pins { pinctrl-single,pins = < 0x14c (PIN_INPUT | MUX_MODE1) /* abedmic_clk2.abemcbsp1_fsx */ @@ -121,25 +153,25 @@ 0xbc (PIN_INPUT | MUX_MODE0) /* mcspi2_clk */ 0xbe (PIN_INPUT | MUX_MODE0) /* mcspi2_simo */ 0xc0 (PIN_INPUT_PULLUP | MUX_MODE0) /* mcspi2_somi */ - 0xc2 (PIN_OUTPUT | MUX_MODE0) /* mcspi2_cs0 */ + 0xc2 (PIN_OUTPUT | MUX_MODE0) /* mcspi2_cs */ >; }; mcspi3_pins: pinmux_mcspi3_pins { pinctrl-single,pins = < - 0x78 (PIN_INPUT | MUX_MODE1) /* mcspi3_somi */ - 0x7a (PIN_INPUT | MUX_MODE1) /* mcspi3_cs0 */ - 0x7c (PIN_INPUT | MUX_MODE1) /* mcspi3_simo */ - 0x7e (PIN_INPUT | MUX_MODE1) /* mcspi3_clk */ + 0x78 (PIN_INPUT | MUX_MODE1) /* mcspi2_somi */ + 0x7a (PIN_INPUT | MUX_MODE1) /* mcspi2_cs */ + 0x7c (PIN_INPUT | MUX_MODE1) /* mcspi2_simo */ + 0x7e (PIN_INPUT | MUX_MODE1) /* mcspi2_clk */ >; }; mcspi4_pins: pinmux_mcspi4_pins { pinctrl-single,pins = < - 0x164 (PIN_INPUT | MUX_MODE1) /* mcspi4_clk */ - 0x168 (PIN_INPUT | MUX_MODE1) /* mcspi4_simo */ - 0x16a (PIN_INPUT | MUX_MODE1) /* mcspi4_somi */ - 0x16c (PIN_INPUT | MUX_MODE1) /* mcspi4_cs0 */ + 0x164 (PIN_INPUT | MUX_MODE1) /* mcspi2_clk */ + 0x168 (PIN_INPUT | MUX_MODE1) /* mcspi2_simo */ + 0x16a (PIN_INPUT | MUX_MODE1) /* mcspi2_somi */ + 0x16c (PIN_INPUT | MUX_MODE1) /* mcspi2_cs */ >; }; @@ -239,14 +271,6 @@ reg = <0x48>; interrupt-controller; #interrupt-cells = <2>; - ti,system-power-controller; - - extcon_usb3: palmas_usb { - compatible = "ti,palmas-usb-vid"; - ti,enable-vbus-detection; - ti,enable-id-detection; - ti,wakeup; - }; palmas_pmic { compatible = "ti,palmas-pmic"; @@ -310,22 +334,15 @@ ti,smps-range = <0x80>; }; - smps10_out2_reg: smps10_out2 { + smps10_reg: smps10 { /* VBUS_5V_OTG */ - regulator-name = "smps10_out2"; + regulator-name = "smps10"; regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; regulator-always-on; regulator-boot-on; }; - smps10_out1_reg: smps10_out1 { - /* VBUS_5V_OTG */ - regulator-name = "smps10_out1"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - }; - ldo1_reg: ldo1 { /* VDDAPHY_CAM: vdda_csiport */ regulator-name = "ldo1"; @@ -453,11 +470,6 @@ phys = <0 &hsusb2_phy &hsusb3_phy>; }; -&usb3 { - extcon = <&extcon_usb3>; - vbus-supply = <&smps10_out1_reg>; -}; - &mcspi1 { }; @@ -491,7 +503,3 @@ pinctrl-names = "default"; pinctrl-0 = <&uart5_pins>; }; - -&cpu0 { - cpu0-supply = <&smps123_reg>; -}; diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi index fc3fad5..7cdea1b 100644 --- a/arch/arm/boot/dts/omap5.dtsi +++ b/arch/arm/boot/dts/omap5.dtsi @@ -21,11 +21,6 @@ interrupt-parent = <&gic>; aliases { - i2c0 = &i2c1; - i2c1 = &i2c2; - i2c2 = &i2c3; - i2c3 = &i2c4; - i2c4 = &i2c5; serial0 = &uart1; serial1 = &uart2; serial2 = &uart3; @@ -38,17 +33,10 @@ #address-cells = <1>; #size-cells = <0>; - cpu0: cpu@0 { + cpu@0 { device_type = "cpu"; compatible = "arm,cortex-a15"; reg = <0x0>; - - operating-points = < - /* kHz uV */ - 500000 880000 - 1000000 1060000 - 1500000 1250000 - >; }; cpu@1 { device_type = "cpu"; @@ -64,6 +52,7 @@ <GIC_PPI 14 (GIC_CPU_MASK_RAW(3) | IRQ_TYPE_LEVEL_LOW)>, <GIC_PPI 11 (GIC_CPU_MASK_RAW(3) | IRQ_TYPE_LEVEL_LOW)>, <GIC_PPI 10 (GIC_CPU_MASK_RAW(3) | IRQ_TYPE_LEVEL_LOW)>; + clock-frequency = <6144000>; }; gic: interrupt-controller@48211000 { @@ -287,12 +276,6 @@ ti,hwmods = "i2c5"; }; - hwspinlock: spinlock@4a0f6000 { - compatible = "ti,omap4-hwspinlock"; - reg = <0x4a0f6000 0x1000>; - ti,hwmods = "spinlock"; - }; - mcspi1: spi@48098000 { compatible = "ti,omap4-mcspi"; reg = <0x48098000 0x200>; @@ -621,10 +604,9 @@ ti,hwmods = "wd_timer2"; }; - emif1: emif@4c000000 { + emif1: emif@0x4c000000 { compatible = "ti,emif-4d5"; ti,hwmods = "emif1"; - ti,no-idle-on-init; phy-type = <2>; /* DDR PHY type: Intelli PHY */ reg = <0x4c000000 0x400>; interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; @@ -633,10 +615,9 @@ hw-caps-temp-alert; }; - emif2: emif@4d000000 { + emif2: emif@0x4d000000 { compatible = "ti,emif-4d5"; ti,hwmods = "emif2"; - ti,no-idle-on-init; phy-type = <2>; /* DDR PHY type: Intelli PHY */ reg = <0x4d000000 0x400>; interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>; @@ -645,19 +626,15 @@ hw-caps-temp-alert; }; - omap_control_usb2phy: control-phy@4a002300 { - compatible = "ti,control-phy-usb2"; - reg = <0x4a002300 0x4>; - reg-names = "power"; - }; - - omap_control_usb3phy: control-phy@4a002370 { - compatible = "ti,control-phy-pipe3"; - reg = <0x4a002370 0x4>; - reg-names = "power"; + omap_control_usb: omap-control-usb@4a002300 { + compatible = "ti,omap-control-usb"; + reg = <0x4a002300 0x4>, + <0x4a002370 0x4>; + reg-names = "control_dev_conf", "phy_power_usb"; + ti,type = <2>; }; - usb3: omap_dwc3@4a020000 { + omap_dwc3@4a020000 { compatible = "ti,dwc3"; ti,hwmods = "usb_otg_ss"; reg = <0x4a020000 0x10000>; @@ -671,7 +648,6 @@ reg = <0x4a030000 0x10000>; interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>; usb-phy = <&usb2_phy>, <&usb3_phy>; - dr_mode = "peripheral"; tx-fifo-resize; }; }; @@ -686,7 +662,7 @@ usb2_phy: usb2phy@4a084000 { compatible = "ti,omap-usb2"; reg = <0x4a084000 0x7c>; - ctrl-module = <&omap_control_usb2phy>; + ctrl-module = <&omap_control_usb>; }; usb3_phy: usb3phy@4a084400 { @@ -695,7 +671,7 @@ <0x4a084800 0x64>, <0x4a084c00 0x40>; reg-names = "phy_rx", "phy_tx", "pll_ctrl"; - ctrl-module = <&omap_control_usb3phy>; + ctrl-module = <&omap_control_usb>; }; }; diff --git a/arch/arm/boot/dts/prima2.dtsi b/arch/arm/boot/dts/prima2.dtsi index daee5894..27ed9f5 100644 --- a/arch/arm/boot/dts/prima2.dtsi +++ b/arch/arm/boot/dts/prima2.dtsi @@ -76,11 +76,6 @@ compatible = "sirf,prima2-rsc"; reg = <0x88020000 0x1000>; }; - - cphifbg@88030000 { - compatible = "sirf,prima2-cphifbg"; - reg = <0x88030000 0x1000>; - }; }; mem-iobg { @@ -91,17 +86,10 @@ memory-controller@90000000 { compatible = "sirf,prima2-memc"; - reg = <0x90000000 0x2000>; + reg = <0x90000000 0x10000>; interrupts = <27>; clocks = <&clks 5>; }; - - memc-monitor { - compatible = "sirf,prima2-memcmon"; - reg = <0x90002000 0x200>; - interrupts = <4>; - clocks = <&clks 32>; - }; }; disp-iobg { @@ -299,13 +287,7 @@ compatible = "sirf,prima2-spi"; reg = <0xb00d0000 0x10000>; interrupts = <15>; - sirf,spi-num-chipselects = <1>; - sirf,spi-dma-rx-channel = <25>; - sirf,spi-dma-tx-channel = <20>; - #address-cells = <1>; - #size-cells = <0>; clocks = <&clks 19>; - status = "disabled"; }; spi1: spi@b0170000 { @@ -313,13 +295,7 @@ compatible = "sirf,prima2-spi"; reg = <0xb0170000 0x10000>; interrupts = <16>; - sirf,spi-num-chipselects = <1>; - sirf,spi-dma-rx-channel = <12>; - sirf,spi-dma-tx-channel = <13>; - #address-cells = <1>; - #size-cells = <0>; clocks = <&clks 20>; - status = "disabled"; }; i2c0: i2c@b00e0000 { @@ -328,8 +304,6 @@ reg = <0xb00e0000 0x10000>; interrupts = <24>; clocks = <&clks 17>; - #address-cells = <1>; - #size-cells = <0>; }; i2c1: i2c@b00f0000 { @@ -338,8 +312,6 @@ reg = <0xb00f0000 0x10000>; interrupts = <25>; clocks = <&clks 18>; - #address-cells = <1>; - #size-cells = <0>; }; tsc@b0110000 { @@ -388,12 +360,6 @@ sirf,function = "uart0"; }; }; - uart0_noflow_pins_a: uart0@1 { - uart { - sirf,pins = "uart0_nostreamctrlgrp"; - sirf,function = "uart0_nostreamctrl"; - }; - }; uart1_pins_a: uart1@0 { uart { sirf,pins = "uart1grp"; @@ -532,42 +498,18 @@ sirf,function = "usp0"; }; }; - usp0_uart_nostreamctrl_pins_a: usp0@1 { - usp0 { - sirf,pins = - "usp0_uart_nostreamctrl_grp"; - sirf,function = - "usp0_uart_nostreamctrl"; - }; - }; usp1_pins_a: usp1@0 { usp1 { sirf,pins = "usp1grp"; sirf,function = "usp1"; }; }; - usp1_uart_nostreamctrl_pins_a: usp1@1 { - usp1 { - sirf,pins = - "usp1_uart_nostreamctrl_grp"; - sirf,function = - "usp1_uart_nostreamctrl"; - }; - }; usp2_pins_a: usp2@0 { usp2 { sirf,pins = "usp2grp"; sirf,function = "usp2"; }; }; - usp2_uart_nostreamctrl_pins_a: usp2@1 { - usp2 { - sirf,pins = - "usp2_uart_nostreamctrl_grp"; - sirf,function = - "usp2_uart_nostreamctrl"; - }; - }; usb0_utmi_drvbus_pins_a: usb0_utmi_drvbus@0 { usb0_utmi_drvbus { sirf,pins = "usb0_utmi_drvbusgrp"; @@ -580,18 +522,6 @@ sirf,function = "usb1_utmi_drvbus"; }; }; - usb1_dp_dn_pins_a: usb1_dp_dn@0 { - usb1_dp_dn { - sirf,pins = "usb1_dp_dngrp"; - sirf,function = "usb1_dp_dn"; - }; - }; - uart1_route_io_usb1_pins_a: uart1_route_io_usb1@0 { - uart1_route_io_usb1 { - sirf,pins = "uart1_route_io_usb1grp"; - sirf,function = "uart1_route_io_usb1"; - }; - }; warm_rst_pins_a: warm_rst@0 { warm_rst { sirf,pins = "warm_rstgrp"; diff --git a/arch/arm/boot/dts/r7s72100-genmai.dts b/arch/arm/boot/dts/r7s72100-genmai.dts deleted file mode 100644 index 1fb20f2..0000000 --- a/arch/arm/boot/dts/r7s72100-genmai.dts +++ /dev/null @@ -1,31 +0,0 @@ -/* - * Device Tree Source for the Genmai board - * - * Copyright (C) 2013 Renesas Solutions Corp. - * - * This file is licensed under the terms of the GNU General Public License - * version 2. This program is licensed "as is" without any warranty of any - * kind, whether express or implied. - */ - -/dts-v1/; -/include/ "r7s72100.dtsi" - -/ { - model = "Genmai"; - compatible = "renesas,genmai", "renesas,r7s72100"; - - chosen { - bootargs = "console=ttySC2,115200 ignore_loglevel rw root=/dev/nfs ip=dhcp"; - }; - - memory { - device_type = "memory"; - reg = <0x08000000 0x08000000>; - }; - - lbsc { - #address-cells = <1>; - #size-cells = <1>; - }; -}; diff --git a/arch/arm/boot/dts/r7s72100.dtsi b/arch/arm/boot/dts/r7s72100.dtsi deleted file mode 100644 index 46b82aa..0000000 --- a/arch/arm/boot/dts/r7s72100.dtsi +++ /dev/null @@ -1,36 +0,0 @@ -/* - * Device Tree Source for the r7s72100 SoC - * - * Copyright (C) 2013 Renesas Solutions Corp. - * - * This file is licensed under the terms of the GNU General Public License - * version 2. This program is licensed "as is" without any warranty of any - * kind, whether express or implied. - */ - -/ { - compatible = "renesas,r7s72100"; - interrupt-parent = <&gic>; - #address-cells = <1>; - #size-cells = <1>; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu@0 { - device_type = "cpu"; - compatible = "arm,cortex-a9"; - reg = <0>; - }; - }; - - gic: interrupt-controller@e8201000 { - compatible = "arm,cortex-a9-gic"; - #interrupt-cells = <3>; - #address-cells = <0>; - interrupt-controller; - reg = <0xe8201000 0x1000>, - <0xe8202000 0x1000>; - }; -}; diff --git a/arch/arm/boot/dts/r8a73a4-ape6evm-reference.dts b/arch/arm/boot/dts/r8a73a4-ape6evm-reference.dts index 9443e93..f444624 100644 --- a/arch/arm/boot/dts/r8a73a4-ape6evm-reference.dts +++ b/arch/arm/boot/dts/r8a73a4-ape6evm-reference.dts @@ -10,7 +10,6 @@ /dts-v1/; /include/ "r8a73a4.dtsi" -#include <dt-bindings/gpio/gpio.h> / { model = "APE6EVM"; @@ -25,34 +24,6 @@ reg = <0 0x40000000 0 0x40000000>; }; - vcc_mmc0: regulator@0 { - compatible = "regulator-fixed"; - regulator-name = "MMC0 Vcc"; - regulator-min-microvolt = <2800000>; - regulator-max-microvolt = <2800000>; - regulator-always-on; - }; - - vcc_sdhi0: regulator@1 { - compatible = "regulator-fixed"; - - regulator-name = "SDHI0 Vcc"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - - gpio = <&pfc 76 GPIO_ACTIVE_HIGH>; - enable-active-high; - }; - - /* Common 3.3V rail, used by several devices on APE6EVM */ - ape6evm_fixed_3v3: regulator@2 { - compatible = "regulator-fixed"; - regulator-name = "3V3"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - }; - lbsc { compatible = "simple-bus"; #address-cells = <1>; @@ -62,7 +33,6 @@ }; &i2c5 { - status = "okay"; vdd_dvfs: max8973@1b { compatible = "maxim,max8973"; reg = <0x1b>; @@ -92,47 +62,4 @@ renesas,groups = "scifa0_data"; renesas,function = "scifa0"; }; - - mmc0_pins: mmcif { - renesas,groups = "mmc0_data8", "mmc0_ctrl"; - renesas,function = "mmc0"; - }; - - sdhi0_pins: sdhi0 { - renesas,groups = "sdhi0_data4", "sdhi0_ctrl", "sdhi0_cd"; - renesas,function = "sdhi0"; - }; - - sdhi1_pins: sdhi1 { - renesas,groups = "sdhi1_data4", "sdhi1_ctrl"; - renesas,function = "sdhi1"; - }; -}; - -&mmcif0 { - vmmc-supply = <&vcc_mmc0>; - bus-width = <8>; - non-removable; - pinctrl-names = "default"; - pinctrl-0 = <&mmc0_pins>; - status = "okay"; -}; - -&sdhi0 { - vmmc-supply = <&vcc_sdhi0>; - bus-width = <4>; - toshiba,mmc-wrprotect-disable; - pinctrl-names = "default"; - pinctrl-0 = <&sdhi0_pins>; - status = "okay"; -}; - -&sdhi1 { - vmmc-supply = <&ape6evm_fixed_3v3>; - bus-width = <4>; - broken-cd; - toshiba,mmc-wrprotect-disable; - pinctrl-names = "default"; - pinctrl-0 = <&sdhi1_pins>; - status = "okay"; }; diff --git a/arch/arm/boot/dts/r8a73a4-ape6evm.dts b/arch/arm/boot/dts/r8a73a4-ape6evm.dts index 91436b5..72f867e 100644 --- a/arch/arm/boot/dts/r8a73a4-ape6evm.dts +++ b/arch/arm/boot/dts/r8a73a4-ape6evm.dts @@ -52,7 +52,6 @@ }; &i2c5 { - status = "okay"; vdd_dvfs: max8973@1b { compatible = "maxim,max8973"; reg = <0x1b>; diff --git a/arch/arm/boot/dts/r8a73a4.dtsi b/arch/arm/boot/dts/r8a73a4.dtsi index 287e047..658fcc5 100644 --- a/arch/arm/boot/dts/r8a73a4.dtsi +++ b/arch/arm/boot/dts/r8a73a4.dtsi @@ -78,49 +78,6 @@ <0 56 4>, <0 57 4>; }; - dmac: dma-multiplexer@0 { - compatible = "renesas,shdma-mux"; - #dma-cells = <1>; - dma-channels = <20>; - dma-requests = <256>; - #address-cells = <2>; - #size-cells = <2>; - ranges; - - dma0: dma-controller@e6700020 { - compatible = "renesas,shdma-r8a73a4"; - reg = <0 0xe6700020 0 0x89e0>; - interrupt-parent = <&gic>; - interrupts = <0 220 4 - 0 200 4 - 0 201 4 - 0 202 4 - 0 203 4 - 0 204 4 - 0 205 4 - 0 206 4 - 0 207 4 - 0 208 4 - 0 209 4 - 0 210 4 - 0 211 4 - 0 212 4 - 0 213 4 - 0 214 4 - 0 215 4 - 0 216 4 - 0 217 4 - 0 218 4 - 0 219 4>; - interrupt-names = "error", - "ch0", "ch1", "ch2", "ch3", - "ch4", "ch5", "ch6", "ch7", - "ch8", "ch9", "ch10", "ch11", - "ch12", "ch13", "ch14", "ch15", - "ch16", "ch17", "ch18", "ch19"; - }; - }; - thermal@e61f0000 { compatible = "renesas,rcar-thermal"; reg = <0 0xe61f0000 0 0x14>, <0 0xe61f0100 0 0x38>, @@ -136,7 +93,6 @@ reg = <0 0xe6500000 0 0x428>; interrupt-parent = <&gic>; interrupts = <0 174 0x4>; - status = "disabled"; }; i2c1: i2c@e6510000 { @@ -146,7 +102,6 @@ reg = <0 0xe6510000 0 0x428>; interrupt-parent = <&gic>; interrupts = <0 175 0x4>; - status = "disabled"; }; i2c2: i2c@e6520000 { @@ -156,7 +111,6 @@ reg = <0 0xe6520000 0 0x428>; interrupt-parent = <&gic>; interrupts = <0 176 0x4>; - status = "disabled"; }; i2c3: i2c@e6530000 { @@ -166,7 +120,6 @@ reg = <0 0xe6530000 0 0x428>; interrupt-parent = <&gic>; interrupts = <0 177 0x4>; - status = "disabled"; }; i2c4: i2c@e6540000 { @@ -176,7 +129,6 @@ reg = <0 0xe6540000 0 0x428>; interrupt-parent = <&gic>; interrupts = <0 178 0x4>; - status = "disabled"; }; i2c5: i2c@e60b0000 { @@ -186,7 +138,6 @@ reg = <0 0xe60b0000 0 0x428>; interrupt-parent = <&gic>; interrupts = <0 179 0x4>; - status = "disabled"; }; i2c6: i2c@e6550000 { @@ -196,7 +147,6 @@ reg = <0 0xe6550000 0 0x428>; interrupt-parent = <&gic>; interrupts = <0 184 0x4>; - status = "disabled"; }; i2c7: i2c@e6560000 { @@ -206,7 +156,6 @@ reg = <0 0xe6560000 0 0x428>; interrupt-parent = <&gic>; interrupts = <0 185 0x4>; - status = "disabled"; }; i2c8: i2c@e6570000 { @@ -216,7 +165,6 @@ reg = <0 0xe6570000 0 0x428>; interrupt-parent = <&gic>; interrupts = <0 173 0x4>; - status = "disabled"; }; mmcif0: mmcif@ee200000 { diff --git a/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts b/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts index 1c56c5e..c638e4a 100644 --- a/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts +++ b/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts @@ -11,7 +11,6 @@ /dts-v1/; /include/ "r8a7740.dtsi" #include <dt-bindings/gpio/gpio.h> -#include <dt-bindings/pwm/pwm.h> / { model = "armadillo 800 eva reference"; @@ -35,33 +34,6 @@ regulator-boot-on; }; - vcc_sdhi0: regulator@1 { - compatible = "regulator-fixed"; - - regulator-name = "SDHI0 Vcc"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - - gpio = <&pfc 75 GPIO_ACTIVE_HIGH>; - enable-active-high; - }; - - vccq_sdhi0: regulator@2 { - compatible = "regulator-gpio"; - - regulator-name = "SDHI0 VccQ"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - vin-supply = <&vcc_sdhi0>; - - enable-gpio = <&pfc 74 GPIO_ACTIVE_HIGH>; - gpios = <&pfc 17 GPIO_ACTIVE_HIGH>; - states = <3300000 0 - 1800000 1>; - - enable-active-high; - }; - leds { compatible = "gpio-leds"; led1 { @@ -77,19 +49,9 @@ gpios = <&pfc 177 GPIO_ACTIVE_HIGH>; }; }; - - backlight { - compatible = "pwm-backlight"; - pwms = <&tpu 2 33333 PWM_POLARITY_INVERTED>; - brightness-levels = <0 1 2 4 8 16 32 64 128 255>; - default-brightness-level = <9>; - pinctrl-0 = <&backlight_pins>; - pinctrl-names = "default"; - }; }; &i2c0 { - status = "okay"; touchscreen: st1232@55 { compatible = "sitronix,st1232"; reg = <0x55>; @@ -114,44 +76,4 @@ renesas,groups = "intc_irq10"; renesas,function = "intc"; }; - - backlight_pins: backlight { - renesas,groups = "tpu0_to2_1"; - renesas,function = "tpu0"; - }; - - mmc0_pins: mmc0 { - renesas,groups = "mmc0_data8_1", "mmc0_ctrl_1"; - renesas,function = "mmc0"; - }; - - sdhi0_pins: sdhi0 { - renesas,groups = "sdhi0_data4", "sdhi0_ctrl", "sdhi0_wp"; - renesas,function = "sdhi0"; - }; -}; - -&tpu { - status = "okay"; -}; - -&mmcif0 { - pinctrl-0 = <&mmc0_pins>; - pinctrl-names = "default"; - - vmmc-supply = <®_3p3v>; - bus-width = <8>; - non-removable; - status = "okay"; -}; - -&sdhi0 { - pinctrl-0 = <&sdhi0_pins>; - pinctrl-names = "default"; - - vmmc-supply = <&vcc_sdhi0>; - vqmmc-supply = <&vccq_sdhi0>; - bus-width = <4>; - cd-gpios = <&pfc 167 GPIO_ACTIVE_LOW>; - status = "okay"; }; diff --git a/arch/arm/boot/dts/r8a7740.dtsi b/arch/arm/boot/dts/r8a7740.dtsi index ae1e230..44d3d52 100644 --- a/arch/arm/boot/dts/r8a7740.dtsi +++ b/arch/arm/boot/dts/r8a7740.dtsi @@ -131,7 +131,6 @@ 0 202 0x4 0 203 0x4 0 204 0x4>; - status = "disabled"; }; i2c1: i2c@e6c20000 { @@ -144,7 +143,6 @@ 0 71 0x4 0 72 0x4 0 73 0x4>; - status = "disabled"; }; pfc: pfc@e6050000 { @@ -161,37 +159,4 @@ status = "disabled"; #pwm-cells = <3>; }; - - mmcif0: mmcif@e6bd0000 { - compatible = "renesas,sh-mmcif"; - reg = <0xe6bd0000 0x100>; - interrupt-parent = <&gic>; - interrupts = <0 56 4 - 0 57 4>; - status = "disabled"; - }; - - sdhi0: sdhi@e6850000 { - compatible = "renesas,sdhi-r8a7740"; - reg = <0xe6850000 0x100>; - interrupt-parent = <&gic>; - interrupts = <0 117 4 - 0 118 4 - 0 119 4>; - cap-sd-highspeed; - cap-sdio-irq; - status = "disabled"; - }; - - sdhi1: sdhi@e6860000 { - compatible = "renesas,sdhi-r8a7740"; - reg = <0xe6860000 0x100>; - interrupt-parent = <&gic>; - interrupts = <0 121 4 - 0 122 4 - 0 123 4>; - cap-sd-highspeed; - cap-sdio-irq; - status = "disabled"; - }; }; diff --git a/arch/arm/boot/dts/r8a7778-bockw-reference.dts b/arch/arm/boot/dts/r8a7778-bockw-reference.dts index 969e386..9bb903a 100644 --- a/arch/arm/boot/dts/r8a7778-bockw-reference.dts +++ b/arch/arm/boot/dts/r8a7778-bockw-reference.dts @@ -22,36 +22,11 @@ compatible = "renesas,bockw-reference", "renesas,r8a7778"; chosen { - bootargs = "console=ttySC0,115200 ignore_loglevel root=/dev/nfs ip=dhcp rw"; + bootargs = "console=ttySC0,115200 ignore_loglevel rw"; }; memory { device_type = "memory"; reg = <0x60000000 0x10000000>; }; - - fixedregulator3v3: fixedregulator@0 { - compatible = "regulator-fixed"; - regulator-name = "fixed-3.3V"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-boot-on; - regulator-always-on; - }; - - ethernet@18300000 { - compatible = "smsc,lan9220", "smsc,lan9115"; - reg = <0x18300000 0x1000>; - - phy-mode = "mii"; - interrupt-parent = <&irqpin>; - interrupts = <0 0>; /* IRQ0: hwirq 0 on irqpin */ - reg-io-width = <4>; - vddvario-supply = <&fixedregulator3v3>; - vdd33a-supply = <&fixedregulator3v3>; - }; -}; - -&irqpin { - status = "okay"; }; diff --git a/arch/arm/boot/dts/r8a7778.dtsi b/arch/arm/boot/dts/r8a7778.dtsi index a6308a3..3577aba 100644 --- a/arch/arm/boot/dts/r8a7778.dtsi +++ b/arch/arm/boot/dts/r8a7778.dtsi @@ -33,25 +33,6 @@ <0xfe430000 0x100>; }; - /* irqpin: IRQ0 - IRQ3 */ - irqpin: irqpin@fe78001c { - compatible = "renesas,intc-irqpin"; - #interrupt-cells = <2>; - interrupt-controller; - status = "disabled"; /* default off */ - reg = <0xfe78001c 4>, - <0xfe780010 4>, - <0xfe780024 4>, - <0xfe780044 4>, - <0xfe780064 4>; - interrupt-parent = <&gic>; - interrupts = <0 27 0x4 - 0 28 0x4 - 0 29 0x4 - 0 30 0x4>; - sense-bitfield-width = <2>; - }; - gpio0: gpio@ffc40000 { compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar"; reg = <0xffc40000 0x2c>; diff --git a/arch/arm/boot/dts/r8a7779-marzen-reference.dts b/arch/arm/boot/dts/r8a7779-marzen-reference.dts index ab4110a..6d55083 100644 --- a/arch/arm/boot/dts/r8a7779-marzen-reference.dts +++ b/arch/arm/boot/dts/r8a7779-marzen-reference.dts @@ -42,8 +42,8 @@ pinctrl-names = "default"; phy-mode = "mii"; - interrupt-parent = <&irqpin0>; - interrupts = <1 0>; /* IRQ1: hwirq 1 on irqpin0 */ + interrupt-parent = <&gic>; + interrupts = <0 28 0x4>; reg-io-width = <4>; vddvario-supply = <&fixedregulator3v3>; vdd33a-supply = <&fixedregulator3v3>; @@ -63,10 +63,6 @@ }; }; -&irqpin0 { - status = "okay"; -}; - &pfc { pinctrl-0 = <&scif2_pins &scif4_pins &sdhi0_pins>; pinctrl-names = "default"; diff --git a/arch/arm/boot/dts/r8a7779.dtsi b/arch/arm/boot/dts/r8a7779.dtsi index 19faeac..ebbe507 100644 --- a/arch/arm/boot/dts/r8a7779.dtsi +++ b/arch/arm/boot/dts/r8a7779.dtsi @@ -135,7 +135,6 @@ irqpin0: irqpin@fe780010 { compatible = "renesas,intc-irqpin"; #interrupt-cells = <2>; - status = "disabled"; interrupt-controller; reg = <0xfe78001c 4>, <0xfe780010 4>, @@ -157,7 +156,6 @@ reg = <0xffc70000 0x1000>; interrupt-parent = <&gic>; interrupts = <0 79 0x4>; - status = "disabled"; }; i2c1: i2c@ffc71000 { @@ -167,7 +165,6 @@ reg = <0xffc71000 0x1000>; interrupt-parent = <&gic>; interrupts = <0 82 0x4>; - status = "disabled"; }; i2c2: i2c@ffc72000 { @@ -177,7 +174,6 @@ reg = <0xffc72000 0x1000>; interrupt-parent = <&gic>; interrupts = <0 80 0x4>; - status = "disabled"; }; i2c3: i2c@ffc73000 { @@ -187,7 +183,6 @@ reg = <0xffc73000 0x1000>; interrupt-parent = <&gic>; interrupts = <0 81 0x4>; - status = "disabled"; }; pfc: pfc@fffc0000 { diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi index ee845fa..413b4c2 100644 --- a/arch/arm/boot/dts/r8a7790.dtsi +++ b/arch/arm/boot/dts/r8a7790.dtsi @@ -24,55 +24,6 @@ reg = <0>; clock-frequency = <1300000000>; }; - - cpu1: cpu@1 { - device_type = "cpu"; - compatible = "arm,cortex-a15"; - reg = <1>; - clock-frequency = <1300000000>; - }; - - cpu2: cpu@2 { - device_type = "cpu"; - compatible = "arm,cortex-a15"; - reg = <2>; - clock-frequency = <1300000000>; - }; - - cpu3: cpu@3 { - device_type = "cpu"; - compatible = "arm,cortex-a15"; - reg = <3>; - clock-frequency = <1300000000>; - }; - - cpu4: cpu@4 { - device_type = "cpu"; - compatible = "arm,cortex-a7"; - reg = <0x100>; - clock-frequency = <780000000>; - }; - - cpu5: cpu@5 { - device_type = "cpu"; - compatible = "arm,cortex-a7"; - reg = <0x101>; - clock-frequency = <780000000>; - }; - - cpu6: cpu@6 { - device_type = "cpu"; - compatible = "arm,cortex-a7"; - reg = <0x102>; - clock-frequency = <780000000>; - }; - - cpu7: cpu@7 { - device_type = "cpu"; - compatible = "arm,cortex-a7"; - reg = <0x103>; - clock-frequency = <780000000>; - }; }; gic: interrupt-controller@f1001000 { @@ -176,46 +127,6 @@ interrupts = <0 0 4>, <0 1 4>, <0 2 4>, <0 3 4>; }; - i2c0: i2c@e6508000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "renesas,i2c-r8a7790"; - reg = <0 0xe6508000 0 0x40>; - interrupt-parent = <&gic>; - interrupts = <0 287 0x4>; - status = "disabled"; - }; - - i2c1: i2c@e6518000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "renesas,i2c-r8a7790"; - reg = <0 0xe6518000 0 0x40>; - interrupt-parent = <&gic>; - interrupts = <0 288 0x4>; - status = "disabled"; - }; - - i2c2: i2c@e6530000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "renesas,i2c-r8a7790"; - reg = <0 0xe6530000 0 0x40>; - interrupt-parent = <&gic>; - interrupts = <0 286 0x4>; - status = "disabled"; - }; - - i2c3: i2c@e6540000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "renesas,i2c-r8a7790"; - reg = <0 0xe6540000 0 0x40>; - interrupt-parent = <&gic>; - interrupts = <0 290 0x4>; - status = "disabled"; - }; - mmcif0: mmcif@ee200000 { compatible = "renesas,sh-mmcif"; reg = <0 0xee200000 0 0x80>; diff --git a/arch/arm/boot/dts/r8a7791-koelsch.dts b/arch/arm/boot/dts/r8a7791-koelsch.dts deleted file mode 100644 index 1ce5250..0000000 --- a/arch/arm/boot/dts/r8a7791-koelsch.dts +++ /dev/null @@ -1,32 +0,0 @@ -/* - * Device Tree Source for the Koelsch board - * - * Copyright (C) 2013 Renesas Electronics Corporation - * Copyright (C) 2013 Renesas Solutions Corp. - * - * This file is licensed under the terms of the GNU General Public License - * version 2. This program is licensed "as is" without any warranty of any - * kind, whether express or implied. - */ - -/dts-v1/; -/include/ "r8a7791.dtsi" - -/ { - model = "Koelsch"; - compatible = "renesas,koelsch", "renesas,r8a7791"; - - chosen { - bootargs = "console=ttySC6,115200 ignore_loglevel rw root=/dev/nfs ip=dhcp"; - }; - - memory@40000000 { - device_type = "memory"; - reg = <0 0x40000000 0 0x80000000>; - }; - - lbsc { - #address-cells = <1>; - #size-cells = <1>; - }; -}; diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi deleted file mode 100644 index fea5cfe..0000000 --- a/arch/arm/boot/dts/r8a7791.dtsi +++ /dev/null @@ -1,74 +0,0 @@ -/* - * Device Tree Source for the r8a7791 SoC - * - * Copyright (C) 2013 Renesas Electronics Corporation - * Copyright (C) 2013 Renesas Solutions Corp. - * - * This file is licensed under the terms of the GNU General Public License - * version 2. This program is licensed "as is" without any warranty of any - * kind, whether express or implied. - */ - -/ { - compatible = "renesas,r8a7791"; - interrupt-parent = <&gic>; - #address-cells = <2>; - #size-cells = <2>; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu0: cpu@0 { - device_type = "cpu"; - compatible = "arm,cortex-a15"; - reg = <0>; - clock-frequency = <1300000000>; - }; - - cpu1: cpu@1 { - device_type = "cpu"; - compatible = "arm,cortex-a15"; - reg = <1>; - clock-frequency = <1300000000>; - }; - }; - - gic: interrupt-controller@f1001000 { - compatible = "arm,cortex-a15-gic"; - #interrupt-cells = <3>; - #address-cells = <0>; - interrupt-controller; - reg = <0 0xf1001000 0 0x1000>, - <0 0xf1002000 0 0x1000>, - <0 0xf1004000 0 0x2000>, - <0 0xf1006000 0 0x2000>; - interrupts = <1 9 0xf04>; - }; - - timer { - compatible = "arm,armv7-timer"; - interrupts = <1 13 0xf08>, - <1 14 0xf08>, - <1 11 0xf08>, - <1 10 0xf08>; - }; - - irqc0: interrupt-controller@e61c0000 { - compatible = "renesas,irqc"; - #interrupt-cells = <2>; - interrupt-controller; - reg = <0 0xe61c0000 0 0x200>; - interrupt-parent = <&gic>; - interrupts = <0 0 4>, - <0 1 4>, - <0 2 4>, - <0 3 4>, - <0 12 4>, - <0 13 4>, - <0 14 4>, - <0 15 4>, - <0 16 4>, - <0 17 4>; - }; -}; diff --git a/arch/arm/boot/dts/rk3066a-bqcurie2.dts b/arch/arm/boot/dts/rk3066a-bqcurie2.dts deleted file mode 100644 index 035df40..0000000 --- a/arch/arm/boot/dts/rk3066a-bqcurie2.dts +++ /dev/null @@ -1,109 +0,0 @@ -/* - * Copyright (c) 2013 MundoReader S.L. - * Author: Heiko Stuebner <heiko@sntech.de> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -/dts-v1/; -#include "rk3066a.dtsi" - -/ { - model = "bq Curie 2"; - - memory { - reg = <0x60000000 0x40000000>; - }; - - soc { - uart0: serial@10124000 { - status = "okay"; - }; - - uart1: serial@10126000 { - status = "okay"; - }; - - uart2: serial@20064000 { - pinctrl-names = "default"; - pinctrl-0 = <&uart2_xfer>; - status = "okay"; - }; - - uart3: serial@20068000 { - status = "okay"; - }; - - vcc_sd0: fixed-regulator { - compatible = "regulator-fixed"; - regulator-name = "sdmmc-supply"; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - gpio = <&gpio3 7 GPIO_ACTIVE_LOW>; - startup-delay-us = <100000>; - }; - - dwmmc@10214000 { /* sdmmc */ - num-slots = <1>; - status = "okay"; - - pinctrl-names = "default"; - pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_cd &sd0_bus4>; - vmmc-supply = <&vcc_sd0>; - - slot@0 { - reg = <0>; - bus-width = <4>; - disable-wp; - }; - }; - - dwmmc@10218000 { /* wifi */ - num-slots = <1>; - status = "okay"; - non-removable; - - pinctrl-names = "default"; - pinctrl-0 = <&sd1_clk &sd1_cmd &sd1_bus4>; - - slot@0 { - reg = <0>; - bus-width = <4>; - disable-wp; - }; - }; - - gpio-keys { - compatible = "gpio-keys"; - #address-cells = <1>; - #size-cells = <0>; - autorepeat; - - button@0 { - gpios = <&gpio6 2 GPIO_ACTIVE_LOW>; /* GPIO6_A2 */ - linux,code = <116>; - label = "GPIO Key Power"; - linux,input-type = <1>; - gpio-key,wakeup = <1>; - debounce-interval = <100>; - }; - button@1 { - gpios = <&gpio4 21 GPIO_ACTIVE_LOW>; /* GPIO4_C5 */ - linux,code = <104>; - label = "GPIO Key Vol-"; - linux,input-type = <1>; - gpio-key,wakeup = <0>; - debounce-interval = <100>; - }; - /* VOL+ comes somehow thru the ADC */ - }; - }; -}; diff --git a/arch/arm/boot/dts/rk3066a.dtsi b/arch/arm/boot/dts/rk3066a.dtsi index be5d2b0..56bfac9 100644 --- a/arch/arm/boot/dts/rk3066a.dtsi +++ b/arch/arm/boot/dts/rk3066a.dtsi @@ -14,12 +14,15 @@ */ #include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/interrupt-controller/irq.h> +#include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/pinctrl/rockchip.h> -#include "rk3xxx.dtsi" +#include "skeleton.dtsi" #include "rk3066a-clocks.dtsi" / { compatible = "rockchip,rk3066a"; + interrupt-parent = <&gic>; cpus { #address-cells = <1>; @@ -40,6 +43,33 @@ }; soc { + #address-cells = <1>; + #size-cells = <1>; + compatible = "simple-bus"; + ranges; + + gic: interrupt-controller@1013d000 { + compatible = "arm,cortex-a9-gic"; + interrupt-controller; + #interrupt-cells = <3>; + reg = <0x1013d000 0x1000>, + <0x1013c100 0x0100>; + }; + + L2: l2-cache-controller@10138000 { + compatible = "arm,pl310-cache"; + reg = <0x10138000 0x1000>; + cache-unified; + cache-level = <2>; + }; + + local-timer@1013c600 { + compatible = "arm,cortex-a9-twd-timer"; + reg = <0x1013c600 0x20>; + interrupts = <GIC_PPI 13 0x304>; + clocks = <&dummy150m>; + }; + timer@20038000 { compatible = "snps,dw-apb-timer-osc"; reg = <0x20038000 0x100>; @@ -161,14 +191,17 @@ uart0_xfer: uart0-xfer { rockchip,pins = <RK_GPIO1 0 RK_FUNC_1 &pcfg_pull_default>, <RK_GPIO1 1 RK_FUNC_1 &pcfg_pull_default>; + rockchip,config = <&pcfg_pull_default>; }; uart0_cts: uart0-cts { rockchip,pins = <RK_GPIO1 2 RK_FUNC_1 &pcfg_pull_default>; + rockchip,config = <&pcfg_pull_default>; }; uart0_rts: uart0-rts { rockchip,pins = <RK_GPIO1 3 RK_FUNC_1 &pcfg_pull_default>; + rockchip,config = <&pcfg_pull_default>; }; }; @@ -176,14 +209,17 @@ uart1_xfer: uart1-xfer { rockchip,pins = <RK_GPIO1 4 RK_FUNC_1 &pcfg_pull_default>, <RK_GPIO1 5 RK_FUNC_1 &pcfg_pull_default>; + rockchip,config = <&pcfg_pull_default>; }; uart1_cts: uart1-cts { rockchip,pins = <RK_GPIO1 6 RK_FUNC_1 &pcfg_pull_default>; + rockchip,config = <&pcfg_pull_default>; }; uart1_rts: uart1-rts { rockchip,pins = <RK_GPIO1 7 RK_FUNC_1 &pcfg_pull_default>; + rockchip,config = <&pcfg_pull_default>; }; }; @@ -191,6 +227,7 @@ uart2_xfer: uart2-xfer { rockchip,pins = <RK_GPIO1 8 RK_FUNC_1 &pcfg_pull_default>, <RK_GPIO1 9 RK_FUNC_1 &pcfg_pull_default>; + rockchip,config = <&pcfg_pull_default>; }; /* no rts / cts for uart2 */ }; @@ -199,36 +236,44 @@ uart3_xfer: uart3-xfer { rockchip,pins = <RK_GPIO3 27 RK_FUNC_1 &pcfg_pull_default>, <RK_GPIO3 28 RK_FUNC_1 &pcfg_pull_default>; + rockchip,config = <&pcfg_pull_default>; }; uart3_cts: uart3-cts { rockchip,pins = <RK_GPIO3 29 RK_FUNC_1 &pcfg_pull_default>; + rockchip,config = <&pcfg_pull_default>; }; uart3_rts: uart3-rts { rockchip,pins = <RK_GPIO3 30 RK_FUNC_1 &pcfg_pull_default>; + rockchip,config = <&pcfg_pull_default>; }; }; sd0 { sd0_clk: sd0-clk { rockchip,pins = <RK_GPIO3 8 RK_FUNC_1 &pcfg_pull_default>; + rockchip,config = <&pcfg_pull_default>; }; sd0_cmd: sd0-cmd { rockchip,pins = <RK_GPIO3 9 RK_FUNC_1 &pcfg_pull_default>; + rockchip,config = <&pcfg_pull_default>; }; sd0_cd: sd0-cd { rockchip,pins = <RK_GPIO3 14 RK_FUNC_1 &pcfg_pull_default>; + rockchip,config = <&pcfg_pull_default>; }; sd0_wp: sd0-wp { rockchip,pins = <RK_GPIO3 15 RK_FUNC_1 &pcfg_pull_default>; + rockchip,config = <&pcfg_pull_default>; }; sd0_bus1: sd0-bus-width1 { rockchip,pins = <RK_GPIO3 10 RK_FUNC_1 &pcfg_pull_default>; + rockchip,config = <&pcfg_pull_default>; }; sd0_bus4: sd0-bus-width4 { @@ -236,28 +281,34 @@ <RK_GPIO3 11 RK_FUNC_1 &pcfg_pull_default>, <RK_GPIO3 12 RK_FUNC_1 &pcfg_pull_default>, <RK_GPIO3 13 RK_FUNC_1 &pcfg_pull_default>; + rockchip,config = <&pcfg_pull_default>; }; }; sd1 { sd1_clk: sd1-clk { rockchip,pins = <RK_GPIO3 21 RK_FUNC_1 &pcfg_pull_default>; + rockchip,config = <&pcfg_pull_default>; }; sd1_cmd: sd1-cmd { rockchip,pins = <RK_GPIO3 16 RK_FUNC_1 &pcfg_pull_default>; + rockchip,config = <&pcfg_pull_default>; }; sd1_cd: sd1-cd { rockchip,pins = <RK_GPIO3 22 RK_FUNC_1 &pcfg_pull_default>; + rockchip,config = <&pcfg_pull_default>; }; sd1_wp: sd1-wp { rockchip,pins = <RK_GPIO3 23 RK_FUNC_1 &pcfg_pull_default>; + rockchip,config = <&pcfg_pull_default>; }; sd1_bus1: sd1-bus-width1 { rockchip,pins = <RK_GPIO3 17 RK_FUNC_1 &pcfg_pull_default>; + rockchip,config = <&pcfg_pull_default>; }; sd1_bus4: sd1-bus-width4 { @@ -265,8 +316,75 @@ <RK_GPIO3 18 RK_FUNC_1 &pcfg_pull_default>, <RK_GPIO3 19 RK_FUNC_1 &pcfg_pull_default>, <RK_GPIO3 20 RK_FUNC_1 &pcfg_pull_default>; + rockchip,config = <&pcfg_pull_default>; }; }; }; + + uart0: serial@10124000 { + compatible = "snps,dw-apb-uart"; + reg = <0x10124000 0x400>; + interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>; + reg-shift = <2>; + reg-io-width = <1>; + clocks = <&clk_gates1 8>; + status = "disabled"; + }; + + uart1: serial@10126000 { + compatible = "snps,dw-apb-uart"; + reg = <0x10126000 0x400>; + interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>; + reg-shift = <2>; + reg-io-width = <1>; + clocks = <&clk_gates1 10>; + status = "disabled"; + }; + + uart2: serial@20064000 { + compatible = "snps,dw-apb-uart"; + reg = <0x20064000 0x400>; + interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; + reg-shift = <2>; + reg-io-width = <1>; + clocks = <&clk_gates1 12>; + status = "disabled"; + }; + + uart3: serial@20068000 { + compatible = "snps,dw-apb-uart"; + reg = <0x20068000 0x400>; + interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; + reg-shift = <2>; + reg-io-width = <1>; + clocks = <&clk_gates1 14>; + status = "disabled"; + }; + + dwmmc@10214000 { + compatible = "rockchip,rk2928-dw-mshc"; + reg = <0x10214000 0x1000>; + interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; + #address-cells = <1>; + #size-cells = <0>; + + clocks = <&clk_gates5 10>, <&clk_gates2 11>; + clock-names = "biu", "ciu"; + + status = "disabled"; + }; + + dwmmc@10218000 { + compatible = "rockchip,rk2928-dw-mshc"; + reg = <0x10218000 0x1000>; + interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; + #address-cells = <1>; + #size-cells = <0>; + + clocks = <&clk_gates5 11>, <&clk_gates2 13>; + clock-names = "biu", "ciu"; + + status = "disabled"; + }; }; }; diff --git a/arch/arm/boot/dts/rk3188-clocks.dtsi b/arch/arm/boot/dts/rk3188-clocks.dtsi deleted file mode 100644 index b1b92dc..0000000 --- a/arch/arm/boot/dts/rk3188-clocks.dtsi +++ /dev/null @@ -1,289 +0,0 @@ -/* - * Copyright (c) 2013 MundoReader S.L. - * Author: Heiko Stuebner <heiko@sntech.de> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -/ { - clocks { - #address-cells = <1>; - #size-cells = <1>; - ranges; - - /* - * This is a dummy clock, to be used as placeholder on - * other mux clocks when a specific parent clock is not - * yet implemented. It should be dropped when the driver - * is complete. - */ - dummy: dummy { - compatible = "fixed-clock"; - clock-frequency = <0>; - #clock-cells = <0>; - }; - - xin24m: xin24m { - compatible = "fixed-clock"; - clock-frequency = <24000000>; - #clock-cells = <0>; - }; - - dummy48m: dummy48m { - compatible = "fixed-clock"; - clock-frequency = <48000000>; - #clock-cells = <0>; - }; - - dummy150m: dummy150m { - compatible = "fixed-clock"; - clock-frequency = <150000000>; - #clock-cells = <0>; - }; - - clk_gates0: gate-clk@200000d0 { - compatible = "rockchip,rk2928-gate-clk"; - reg = <0x200000d0 0x4>; - clocks = <&dummy150m>, <&dummy>, - <&dummy>, <&dummy>, - <&dummy>, <&dummy>, - <&dummy>, <&dummy>, - <&dummy>, <&dummy>, - <&dummy>, <&dummy>, - <&dummy>, <&dummy>, - <&dummy>, <&dummy>; - - clock-output-names = - "gate_core_periph", "gate_cpu_gpll", - "gate_ddrphy", "gate_aclk_cpu", - "gate_hclk_cpu", "gate_pclk_cpu", - "gate_atclk_cpu", "gate_aclk_core", - "reserved", "gate_i2s0", - "gate_i2s0_frac", "reserved", - "reserved", "gate_spdif", - "gate_spdif_frac", "gate_testclk"; - - #clock-cells = <1>; - }; - - clk_gates1: gate-clk@200000d4 { - compatible = "rockchip,rk2928-gate-clk"; - reg = <0x200000d4 0x4>; - clocks = <&xin24m>, <&xin24m>, - <&xin24m>, <&dummy>, - <&dummy>, <&xin24m>, - <&xin24m>, <&dummy>, - <&xin24m>, <&dummy>, - <&xin24m>, <&dummy>, - <&xin24m>, <&dummy>, - <&xin24m>, <&dummy>; - - clock-output-names = - "gate_timer0", "gate_timer1", - "gate_timer3", "gate_jtag", - "gate_aclk_lcdc1_src", "gate_otgphy0", - "gate_otgphy1", "gate_ddr_gpll", - "gate_uart0", "gate_frac_uart0", - "gate_uart1", "gate_frac_uart1", - "gate_uart2", "gate_frac_uart2", - "gate_uart3", "gate_frac_uart3"; - - #clock-cells = <1>; - }; - - clk_gates2: gate-clk@200000d8 { - compatible = "rockchip,rk2928-gate-clk"; - reg = <0x200000d8 0x4>; - clocks = <&clk_gates2 1>, <&dummy>, - <&dummy>, <&dummy>, - <&dummy>, <&dummy>, - <&clk_gates2 3>, <&dummy>, - <&dummy>, <&dummy>, - <&dummy>, <&dummy48m>, - <&dummy>, <&dummy48m>, - <&dummy>, <&dummy>; - - clock-output-names = - "gate_periph_src", "gate_aclk_periph", - "gate_hclk_periph", "gate_pclk_periph", - "gate_smc", "gate_mac", - "gate_hsadc", "gate_hsadc_frac", - "gate_saradc", "gate_spi0", - "gate_spi1", "gate_mmc0", - "gate_mac_lbtest", "gate_mmc1", - "gate_emmc", "reserved"; - - #clock-cells = <1>; - }; - - clk_gates3: gate-clk@200000dc { - compatible = "rockchip,rk2928-gate-clk"; - reg = <0x200000dc 0x4>; - clocks = <&dummy>, <&dummy>, - <&dummy>, <&dummy>, - <&xin24m>, <&xin24m>, - <&dummy>, <&dummy>, - <&xin24m>, <&dummy>, - <&dummy>, <&dummy>, - <&dummy>, <&dummy>, - <&xin24m>, <&dummy>; - - clock-output-names = - "gate_aclk_lcdc0_src", "gate_dclk_lcdc0", - "gate_dclk_lcdc1", "gate_pclkin_cif0", - "gate_timer2", "gate_timer4", - "gate_hsicphy", "gate_cif0_out", - "gate_timer5", "gate_aclk_vepu", - "gate_hclk_vepu", "gate_aclk_vdpu", - "gate_hclk_vdpu", "reserved", - "gate_timer6", "gate_aclk_gpu_src"; - - #clock-cells = <1>; - }; - - clk_gates4: gate-clk@200000e0 { - compatible = "rockchip,rk2928-gate-clk"; - reg = <0x200000e0 0x4>; - clocks = <&clk_gates2 2>, <&clk_gates2 3>, - <&clk_gates2 1>, <&clk_gates2 1>, - <&clk_gates2 1>, <&clk_gates2 2>, - <&clk_gates2 2>, <&clk_gates2 2>, - <&clk_gates0 4>, <&clk_gates0 4>, - <&clk_gates0 3>, <&dummy>, - <&clk_gates0 3>, <&dummy>, - <&dummy>, <&dummy>; - - clock-output-names = - "gate_hclk_peri_axi_matrix", "gate_pclk_peri_axi_matrix", - "gate_aclk_cpu_peri", "gate_aclk_peri_axi_matrix", - "gate_aclk_pei_niu", "gate_hclk_usb_peri", - "gate_hclk_peri_ahb_arbi", "gate_hclk_emem_peri", - "gate_hclk_cpubus", "gate_hclk_ahb2apb", - "gate_aclk_strc_sys", "reserved", - "gate_aclk_intmem", "reserved", - "gate_hclk_imem1", "gate_hclk_imem0"; - - #clock-cells = <1>; - }; - - clk_gates5: gate-clk@200000e4 { - compatible = "rockchip,rk2928-gate-clk"; - reg = <0x200000e4 0x4>; - clocks = <&clk_gates0 3>, <&clk_gates2 1>, - <&clk_gates0 5>, <&clk_gates0 5>, - <&clk_gates0 5>, <&clk_gates0 5>, - <&clk_gates0 4>, <&clk_gates0 5>, - <&clk_gates2 1>, <&clk_gates2 2>, - <&clk_gates2 2>, <&clk_gates2 2>, - <&clk_gates2 2>, <&clk_gates4 5>; - - clock-output-names = - "gate_aclk_dmac1", "gate_aclk_dmac2", - "gate_pclk_efuse", "gate_pclk_tzpc", - "gate_pclk_grf", "gate_pclk_pmu", - "gate_hclk_rom", "gate_pclk_ddrupctl", - "gate_aclk_smc", "gate_hclk_nandc", - "gate_hclk_mmc0", "gate_hclk_mmc1", - "gate_hclk_emmc", "gate_hclk_otg0"; - - #clock-cells = <1>; - }; - - clk_gates6: gate-clk@200000e8 { - compatible = "rockchip,rk2928-gate-clk"; - reg = <0x200000e8 0x4>; - clocks = <&clk_gates3 0>, <&clk_gates0 4>, - <&clk_gates0 4>, <&clk_gates1 4>, - <&clk_gates0 4>, <&clk_gates3 0>, - <&dummy>, <&dummy>, - <&clk_gates3 0>, <&clk_gates0 4>, - <&clk_gates0 4>, <&clk_gates1 4>, - <&clk_gates0 4>, <&clk_gates3 0>; - - clock-output-names = - "gate_aclk_lcdc0", "gate_hclk_lcdc0", - "gate_hclk_lcdc1", "gate_aclk_lcdc1", - "gate_hclk_cif0", "gate_aclk_cif0", - "reserved", "reserved", - "gate_aclk_ipp", "gate_hclk_ipp", - "gate_hclk_rga", "gate_aclk_rga", - "gate_hclk_vio_bus", "gate_aclk_vio0"; - - #clock-cells = <1>; - }; - - clk_gates7: gate-clk@200000ec { - compatible = "rockchip,rk2928-gate-clk"; - reg = <0x200000ec 0x4>; - clocks = <&clk_gates2 2>, <&clk_gates0 4>, - <&clk_gates0 4>, <&dummy>, - <&dummy>, <&clk_gates2 2>, - <&clk_gates2 2>, <&clk_gates0 5>, - <&dummy>, <&clk_gates0 5>, - <&clk_gates0 5>, <&clk_gates2 3>, - <&clk_gates2 3>, <&clk_gates2 3>, - <&clk_gates2 3>, <&clk_gates2 3>; - - clock-output-names = - "gate_hclk_emac", "gate_hclk_spdif", - "gate_hclk_i2s0_2ch", "gate_hclk_otg1", - "gate_hclk_hsic", "gate_hclk_hsadc", - "gate_hclk_pidf", "gate_pclk_timer0", - "reserved", "gate_pclk_timer2", - "gate_pclk_pwm01", "gate_pclk_pwm23", - "gate_pclk_spi0", "gate_pclk_spi1", - "gate_pclk_saradc", "gate_pclk_wdt"; - - #clock-cells = <1>; - }; - - clk_gates8: gate-clk@200000f0 { - compatible = "rockchip,rk2928-gate-clk"; - reg = <0x200000f0 0x4>; - clocks = <&clk_gates0 5>, <&clk_gates0 5>, - <&clk_gates2 3>, <&clk_gates2 3>, - <&clk_gates0 5>, <&clk_gates0 5>, - <&clk_gates2 3>, <&clk_gates2 3>, - <&clk_gates2 3>, <&clk_gates0 5>, - <&clk_gates0 5>, <&clk_gates0 5>, - <&clk_gates2 3>, <&dummy>; - - clock-output-names = - "gate_pclk_uart0", "gate_pclk_uart1", - "gate_pclk_uart2", "gate_pclk_uart3", - "gate_pclk_i2c0", "gate_pclk_i2c1", - "gate_pclk_i2c2", "gate_pclk_i2c3", - "gate_pclk_i2c4", "gate_pclk_gpio0", - "gate_pclk_gpio1", "gate_pclk_gpio2", - "gate_pclk_gpio3", "gate_aclk_gps"; - - #clock-cells = <1>; - }; - - clk_gates9: gate-clk@200000f4 { - compatible = "rockchip,rk2928-gate-clk"; - reg = <0x200000f4 0x4>; - clocks = <&dummy>, <&dummy>, - <&dummy>, <&dummy>, - <&dummy>, <&dummy>, - <&dummy>, <&dummy>; - - clock-output-names = - "gate_clk_core_dbg", "gate_pclk_dbg", - "gate_clk_trace", "gate_atclk", - "gate_clk_l2c", "gate_aclk_vio1", - "gate_pclk_publ", "gate_aclk_gpu"; - - #clock-cells = <1>; - }; - }; - -}; diff --git a/arch/arm/boot/dts/rk3188-radxarock.dts b/arch/arm/boot/dts/rk3188-radxarock.dts deleted file mode 100644 index 3ba1968..0000000 --- a/arch/arm/boot/dts/rk3188-radxarock.dts +++ /dev/null @@ -1,80 +0,0 @@ -/* - * Copyright (c) 2013 Heiko Stuebner <heiko@sntech.de> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -/dts-v1/; -#include "rk3188.dtsi" - -/ { - model = "Radxa Rock"; - - memory { - reg = <0x60000000 0x80000000>; - }; - - soc { - uart0: serial@10124000 { - status = "okay"; - }; - - uart1: serial@10126000 { - status = "okay"; - }; - - uart2: serial@20064000 { - pinctrl-names = "default"; - pinctrl-0 = <&uart2_xfer>; - status = "okay"; - }; - - uart3: serial@20068000 { - status = "okay"; - }; - - gpio-keys { - compatible = "gpio-keys"; - #address-cells = <1>; - #size-cells = <0>; - autorepeat; - - button@0 { - gpios = <&gpio0 4 GPIO_ACTIVE_LOW>; - linux,code = <116>; - label = "GPIO Key Power"; - linux,input-type = <1>; - gpio-key,wakeup = <1>; - debounce-interval = <100>; - }; - }; - - gpio-leds { - compatible = "gpio-leds"; - - green { - gpios = <&gpio0 12 GPIO_ACTIVE_LOW>; - default-state = "off"; - }; - - yellow { - gpios = <&gpio0 14 GPIO_ACTIVE_LOW>; - default-state = "off"; - }; - - sleep { - gpios = <&gpio0 15 0>; - default-state = "off"; - }; - }; - - }; -}; diff --git a/arch/arm/boot/dts/rk3188.dtsi b/arch/arm/boot/dts/rk3188.dtsi deleted file mode 100644 index 1a26b03..0000000 --- a/arch/arm/boot/dts/rk3188.dtsi +++ /dev/null @@ -1,253 +0,0 @@ -/* - * Copyright (c) 2013 MundoReader S.L. - * Author: Heiko Stuebner <heiko@sntech.de> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include <dt-bindings/gpio/gpio.h> -#include <dt-bindings/pinctrl/rockchip.h> -#include "rk3xxx.dtsi" -#include "rk3188-clocks.dtsi" - -/ { - compatible = "rockchip,rk3188"; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu@0 { - device_type = "cpu"; - compatible = "arm,cortex-a9"; - next-level-cache = <&L2>; - reg = <0x0>; - }; - cpu@1 { - device_type = "cpu"; - compatible = "arm,cortex-a9"; - next-level-cache = <&L2>; - reg = <0x1>; - }; - cpu@2 { - device_type = "cpu"; - compatible = "arm,cortex-a9"; - next-level-cache = <&L2>; - reg = <0x2>; - }; - cpu@3 { - device_type = "cpu"; - compatible = "arm,cortex-a9"; - next-level-cache = <&L2>; - reg = <0x3>; - }; - }; - - soc { - global-timer@1013c200 { - interrupts = <GIC_PPI 11 0xf04>; - }; - - local-timer@1013c600 { - interrupts = <GIC_PPI 13 0xf04>; - }; - - pinctrl@20008000 { - compatible = "rockchip,rk3188-pinctrl"; - reg = <0x20008000 0xa0>, - <0x20008164 0x1a0>; - reg-names = "base", "pull"; - #address-cells = <1>; - #size-cells = <1>; - ranges; - - gpio0: gpio0@0x2000a000 { - compatible = "rockchip,rk3188-gpio-bank0"; - reg = <0x2000a000 0x100>, - <0x20004064 0x8>; - interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clk_gates8 9>; - - gpio-controller; - #gpio-cells = <2>; - - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpio1: gpio1@0x2003c000 { - compatible = "rockchip,gpio-bank"; - reg = <0x2003c000 0x100>; - interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clk_gates8 10>; - - gpio-controller; - #gpio-cells = <2>; - - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpio2: gpio2@2003e000 { - compatible = "rockchip,gpio-bank"; - reg = <0x2003e000 0x100>; - interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clk_gates8 11>; - - gpio-controller; - #gpio-cells = <2>; - - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpio3: gpio3@20080000 { - compatible = "rockchip,gpio-bank"; - reg = <0x20080000 0x100>; - interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clk_gates8 12>; - - gpio-controller; - #gpio-cells = <2>; - - interrupt-controller; - #interrupt-cells = <2>; - }; - - pcfg_pull_up: pcfg_pull_up { - bias-pull-up; - }; - - pcfg_pull_down: pcfg_pull_down { - bias-pull-down; - }; - - pcfg_pull_none: pcfg_pull_none { - bias-disable; - }; - - uart0 { - uart0_xfer: uart0-xfer { - rockchip,pins = <RK_GPIO1 0 RK_FUNC_1 &pcfg_pull_none>, - <RK_GPIO1 1 RK_FUNC_1 &pcfg_pull_none>; - }; - - uart0_cts: uart0-cts { - rockchip,pins = <RK_GPIO1 2 RK_FUNC_1 &pcfg_pull_none>; - }; - - uart0_rts: uart0-rts { - rockchip,pins = <RK_GPIO1 3 RK_FUNC_1 &pcfg_pull_none>; - }; - }; - - uart1 { - uart1_xfer: uart1-xfer { - rockchip,pins = <RK_GPIO1 4 RK_FUNC_1 &pcfg_pull_none>, - <RK_GPIO1 5 RK_FUNC_1 &pcfg_pull_none>; - }; - - uart1_cts: uart1-cts { - rockchip,pins = <RK_GPIO1 6 RK_FUNC_1 &pcfg_pull_none>; - }; - - uart1_rts: uart1-rts { - rockchip,pins = <RK_GPIO1 7 RK_FUNC_1 &pcfg_pull_none>; - }; - }; - - uart2 { - uart2_xfer: uart2-xfer { - rockchip,pins = <RK_GPIO1 8 RK_FUNC_1 &pcfg_pull_none>, - <RK_GPIO1 9 RK_FUNC_1 &pcfg_pull_none>; - }; - /* no rts / cts for uart2 */ - }; - - uart3 { - uart3_xfer: uart3-xfer { - rockchip,pins = <RK_GPIO1 10 RK_FUNC_1 &pcfg_pull_none>, - <RK_GPIO1 11 RK_FUNC_1 &pcfg_pull_none>; - }; - - uart3_cts: uart3-cts { - rockchip,pins = <RK_GPIO1 12 RK_FUNC_1 &pcfg_pull_none>; - }; - - uart3_rts: uart3-rts { - rockchip,pins = <RK_GPIO1 13 RK_FUNC_1 &pcfg_pull_none>; - }; - }; - - sd0 { - sd0_clk: sd0-clk { - rockchip,pins = <RK_GPIO3 2 RK_FUNC_1 &pcfg_pull_none>; - }; - - sd0_cmd: sd0-cmd { - rockchip,pins = <RK_GPIO3 3 RK_FUNC_1 &pcfg_pull_none>; - }; - - sd0_cd: sd0-cd { - rockchip,pins = <RK_GPIO3 8 RK_FUNC_1 &pcfg_pull_none>; - }; - - sd0_wp: sd0-wp { - rockchip,pins = <RK_GPIO3 9 RK_FUNC_1 &pcfg_pull_none>; - }; - - sd0_pwr: sd0-pwr { - rockchip,pins = <RK_GPIO3 1 RK_FUNC_1 &pcfg_pull_none>; - }; - - sd0_bus1: sd0-bus-width1 { - rockchip,pins = <RK_GPIO3 4 RK_FUNC_1 &pcfg_pull_none>; - }; - - sd0_bus4: sd0-bus-width4 { - rockchip,pins = <RK_GPIO3 4 RK_FUNC_1 &pcfg_pull_none>, - <RK_GPIO3 5 RK_FUNC_1 &pcfg_pull_none>, - <RK_GPIO3 6 RK_FUNC_1 &pcfg_pull_none>, - <RK_GPIO3 7 RK_FUNC_1 &pcfg_pull_none>; - }; - }; - - sd1 { - sd1_clk: sd1-clk { - rockchip,pins = <RK_GPIO3 21 RK_FUNC_1 &pcfg_pull_none>; - }; - - sd1_cmd: sd1-cmd { - rockchip,pins = <RK_GPIO3 16 RK_FUNC_1 &pcfg_pull_none>; - }; - - sd1_cd: sd1-cd { - rockchip,pins = <RK_GPIO3 22 RK_FUNC_1 &pcfg_pull_none>; - }; - - sd1_wp: sd1-wp { - rockchip,pins = <RK_GPIO3 23 RK_FUNC_1 &pcfg_pull_none>; - }; - - sd1_bus1: sd1-bus-width1 { - rockchip,pins = <RK_GPIO3 17 RK_FUNC_1 &pcfg_pull_none>; - }; - - sd1_bus4: sd1-bus-width4 { - rockchip,pins = <RK_GPIO3 17 RK_FUNC_1 &pcfg_pull_none>, - <RK_GPIO3 18 RK_FUNC_1 &pcfg_pull_none>, - <RK_GPIO3 19 RK_FUNC_1 &pcfg_pull_none>, - <RK_GPIO3 20 RK_FUNC_1 &pcfg_pull_none>; - }; - }; - }; - }; -}; diff --git a/arch/arm/boot/dts/rk3xxx.dtsi b/arch/arm/boot/dts/rk3xxx.dtsi deleted file mode 100644 index 0fcbcfd..0000000 --- a/arch/arm/boot/dts/rk3xxx.dtsi +++ /dev/null @@ -1,124 +0,0 @@ -/* - * Copyright (c) 2013 MundoReader S.L. - * Author: Heiko Stuebner <heiko@sntech.de> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include <dt-bindings/interrupt-controller/irq.h> -#include <dt-bindings/interrupt-controller/arm-gic.h> -#include "skeleton.dtsi" - -/ { - interrupt-parent = <&gic>; - - soc { - #address-cells = <1>; - #size-cells = <1>; - compatible = "simple-bus"; - ranges; - - gic: interrupt-controller@1013d000 { - compatible = "arm,cortex-a9-gic"; - interrupt-controller; - #interrupt-cells = <3>; - reg = <0x1013d000 0x1000>, - <0x1013c100 0x0100>; - }; - - L2: l2-cache-controller@10138000 { - compatible = "arm,pl310-cache"; - reg = <0x10138000 0x1000>; - cache-unified; - cache-level = <2>; - }; - - global-timer@1013c200 { - compatible = "arm,cortex-a9-global-timer"; - reg = <0x1013c200 0x20>; - interrupts = <GIC_PPI 11 0x304>; - clocks = <&dummy150m>; - }; - - local-timer@1013c600 { - compatible = "arm,cortex-a9-twd-timer"; - reg = <0x1013c600 0x20>; - interrupts = <GIC_PPI 13 0x304>; - clocks = <&dummy150m>; - }; - - uart0: serial@10124000 { - compatible = "snps,dw-apb-uart"; - reg = <0x10124000 0x400>; - interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>; - reg-shift = <2>; - reg-io-width = <1>; - clocks = <&clk_gates1 8>; - status = "disabled"; - }; - - uart1: serial@10126000 { - compatible = "snps,dw-apb-uart"; - reg = <0x10126000 0x400>; - interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>; - reg-shift = <2>; - reg-io-width = <1>; - clocks = <&clk_gates1 10>; - status = "disabled"; - }; - - uart2: serial@20064000 { - compatible = "snps,dw-apb-uart"; - reg = <0x20064000 0x400>; - interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; - reg-shift = <2>; - reg-io-width = <1>; - clocks = <&clk_gates1 12>; - status = "disabled"; - }; - - uart3: serial@20068000 { - compatible = "snps,dw-apb-uart"; - reg = <0x20068000 0x400>; - interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; - reg-shift = <2>; - reg-io-width = <1>; - clocks = <&clk_gates1 14>; - status = "disabled"; - }; - - dwmmc@10214000 { - compatible = "rockchip,rk2928-dw-mshc"; - reg = <0x10214000 0x1000>; - interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; - #address-cells = <1>; - #size-cells = <0>; - - clocks = <&clk_gates5 10>, <&clk_gates2 11>; - clock-names = "biu", "ciu"; - - status = "disabled"; - }; - - dwmmc@10218000 { - compatible = "rockchip,rk2928-dw-mshc"; - reg = <0x10218000 0x1000>; - interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; - #address-cells = <1>; - #size-cells = <0>; - - clocks = <&clk_gates5 11>, <&clk_gates2 13>; - clock-names = "biu", "ciu"; - - status = "disabled"; - }; - }; -}; diff --git a/arch/arm/boot/dts/s3c6400.dtsi b/arch/arm/boot/dts/s3c6400.dtsi deleted file mode 100644 index a7d1c8e..0000000 --- a/arch/arm/boot/dts/s3c6400.dtsi +++ /dev/null @@ -1,41 +0,0 @@ -/* - * Samsung's S3C6400 SoC device tree source - * - * Copyright (c) 2013 Tomasz Figa <tomasz.figa@gmail.com> - * - * Samsung's S3C6400 SoC device nodes are listed in this file. S3C6400 - * based board files can include this file and provide values for board specfic - * bindings. - * - * Note: This file does not include device nodes for all the controllers in - * S3C6400 SoC. As device tree coverage for S3C6400 increases, additional - * nodes can be added to this file. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#include "s3c64xx.dtsi" - -/ { - compatible = "samsung,s3c6400"; -}; - -&vic0 { - valid-mask = <0xfffffe1f>; - valid-wakeup-mask = <0x00200004>; -}; - -&vic1 { - valid-mask = <0xffffffff>; - valid-wakeup-mask = <0x53020000>; -}; - -&soc { - clocks: clock-controller@7e00f000 { - compatible = "samsung,s3c6400-clock"; - reg = <0x7e00f000 0x1000>; - #clock-cells = <1>; - }; -}; diff --git a/arch/arm/boot/dts/s3c6410-mini6410.dts b/arch/arm/boot/dts/s3c6410-mini6410.dts deleted file mode 100644 index 57e00f9..0000000 --- a/arch/arm/boot/dts/s3c6410-mini6410.dts +++ /dev/null @@ -1,228 +0,0 @@ -/* - * Samsung's S3C6410 based Mini6410 board device tree source - * - * Copyright (c) 2013 Tomasz Figa <tomasz.figa@gmail.com> - * - * Device tree source file for FriendlyARM Mini6410 board which is based on - * Samsung's S3C6410 SoC. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -/dts-v1/; - -#include <dt-bindings/gpio/gpio.h> -#include <dt-bindings/interrupt-controller/irq.h> - -#include "s3c6410.dtsi" - -/ { - model = "FriendlyARM Mini6410 board based on S3C6410"; - compatible = "friendlyarm,mini6410", "samsung,s3c6410"; - - memory { - reg = <0x50000000 0x10000000>; - }; - - chosen { - bootargs = "console=ttySAC0,115200n8 earlyprintk rootwait root=/dev/mmcblk0p1"; - }; - - clocks { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <0>; - - fin_pll: oscillator@0 { - compatible = "fixed-clock"; - reg = <0>; - clock-frequency = <12000000>; - clock-output-names = "fin_pll"; - #clock-cells = <0>; - }; - - xusbxti: oscillator@1 { - compatible = "fixed-clock"; - reg = <1>; - clock-output-names = "xusbxti"; - clock-frequency = <48000000>; - #clock-cells = <0>; - }; - }; - - srom-cs1@18000000 { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; - reg = <0x18000000 0x8000000>; - ranges; - - ethernet@18000000 { - compatible = "davicom,dm9000"; - reg = <0x18000000 0x2 0x18000004 0x2>; - interrupt-parent = <&gpn>; - interrupts = <7 IRQ_TYPE_LEVEL_HIGH>; - davicom,no-eeprom; - }; - }; - - gpio-keys { - compatible = "gpio-keys"; - pinctrl-names = "default"; - pinctrl-0 = <&gpio_keys>; - autorepeat; - - button-k1 { - label = "K1"; - gpios = <&gpn 0 GPIO_ACTIVE_LOW>; - linux,code = <2>; - debounce-interval = <20>; - }; - - button-k2 { - label = "K2"; - gpios = <&gpn 1 GPIO_ACTIVE_LOW>; - linux,code = <3>; - debounce-interval = <20>; - }; - - button-k3 { - label = "K3"; - gpios = <&gpn 2 GPIO_ACTIVE_LOW>; - linux,code = <4>; - debounce-interval = <20>; - }; - - button-k4 { - label = "K4"; - gpios = <&gpn 3 GPIO_ACTIVE_LOW>; - linux,code = <5>; - debounce-interval = <20>; - }; - - button-k5 { - label = "K5"; - gpios = <&gpn 4 GPIO_ACTIVE_LOW>; - linux,code = <6>; - debounce-interval = <20>; - }; - - button-k6 { - label = "K6"; - gpios = <&gpn 5 GPIO_ACTIVE_LOW>; - linux,code = <7>; - debounce-interval = <20>; - }; - - button-k7 { - label = "K7"; - gpios = <&gpl 11 GPIO_ACTIVE_LOW>; - linux,code = <8>; - debounce-interval = <20>; - }; - - button-k8 { - label = "K8"; - gpios = <&gpl 12 GPIO_ACTIVE_LOW>; - linux,code = <9>; - debounce-interval = <20>; - }; - }; - - leds { - compatible = "gpio-leds"; - pinctrl-names = "default"; - pinctrl-0 = <&gpio_leds>; - - led-1 { - label = "LED1"; - gpios = <&gpk 4 GPIO_ACTIVE_LOW>; - linux,default-trigger = "heartbeat"; - }; - - led-2 { - label = "LED2"; - gpios = <&gpk 5 GPIO_ACTIVE_LOW>; - linux,default-trigger = "mmc0"; - }; - - led-3 { - label = "LED3"; - gpios = <&gpk 6 GPIO_ACTIVE_LOW>; - }; - - led-4 { - label = "LED4"; - gpios = <&gpk 7 GPIO_ACTIVE_LOW>; - }; - }; - - buzzer { - compatible = "pwm-beeper"; - pwms = <&pwm 0 1000000 0>; - pinctrl-names = "default"; - pinctrl-0 = <&pwm0_out>; - }; -}; - -&sdhci0 { - pinctrl-names = "default"; - pinctrl-0 = <&sd0_clk>, <&sd0_cmd>, <&sd0_cd>, <&sd0_bus4>; - bus-width = <4>; - status = "okay"; -}; - -&uart0 { - pinctrl-names = "default"; - pinctrl-0 = <&uart0_data>; - status = "okay"; -}; - -&uart1 { - pinctrl-names = "default"; - pinctrl-0 = <&uart1_data>, <&uart1_fctl>; - status = "okay"; -}; - -&uart2 { - pinctrl-names = "default"; - pinctrl-0 = <&uart2_data>; - status = "okay"; -}; - -&uart3 { - pinctrl-names = "default"; - pinctrl-0 = <&uart3_data>; - status = "okay"; -}; - -&pwm { - status = "okay"; -}; - -&pinctrl0 { - gpio_leds: gpio-leds { - samsung,pins = "gpk-4", "gpk-5", "gpk-6", "gpk-7"; - samsung,pin-pud = <PIN_PULL_NONE>; - }; - - gpio_keys: gpio-keys { - samsung,pins = "gpn-0", "gpn-1", "gpn-2", "gpn-3", - "gpn-4", "gpn-5", "gpl-11", "gpl-12"; - samsung,pin-pud = <PIN_PULL_NONE>; - }; -}; - -&i2c0 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c0_bus>; - status = "okay"; - - eeprom@50 { - compatible = "atmel,24c08"; - reg = <0x50>; - pagesize = <16>; - }; -}; diff --git a/arch/arm/boot/dts/s3c6410-smdk6410.dts b/arch/arm/boot/dts/s3c6410-smdk6410.dts deleted file mode 100644 index ecf35ec..0000000 --- a/arch/arm/boot/dts/s3c6410-smdk6410.dts +++ /dev/null @@ -1,103 +0,0 @@ -/* - * Samsung S3C6410 based SMDK6410 board device tree source. - * - * Copyright (c) 2013 Tomasz Figa <tomasz.figa@gmail.com> - * - * Device tree source file for SAMSUNG SMDK6410 board which is based on - * Samsung's S3C6410 SoC. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -/dts-v1/; - -#include <dt-bindings/gpio/gpio.h> -#include <dt-bindings/interrupt-controller/irq.h> - -#include "s3c6410.dtsi" - -/ { - model = "SAMSUNG SMDK6410 board based on S3C6410"; - compatible = "samsung,mini6410", "samsung,s3c6410"; - - memory { - reg = <0x50000000 0x8000000>; - }; - - chosen { - bootargs = "console=ttySAC0,115200n8 earlyprintk rootwait root=/dev/mmcblk0p1"; - }; - - clocks { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <0>; - - fin_pll: oscillator@0 { - compatible = "fixed-clock"; - reg = <0>; - clock-frequency = <12000000>; - clock-output-names = "fin_pll"; - #clock-cells = <0>; - }; - - xusbxti: oscillator@1 { - compatible = "fixed-clock"; - reg = <1>; - clock-output-names = "xusbxti"; - clock-frequency = <48000000>; - #clock-cells = <0>; - }; - }; - - srom-cs1@18000000 { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; - reg = <0x18000000 0x8000000>; - ranges; - - ethernet@18000000 { - compatible = "smsc,lan9115"; - reg = <0x18000000 0x10000>; - interrupt-parent = <&gpn>; - interrupts = <10 IRQ_TYPE_LEVEL_LOW>; - phy-mode = "mii"; - reg-io-width = <4>; - smsc,force-internal-phy; - }; - }; -}; - -&sdhci0 { - pinctrl-names = "default"; - pinctrl-0 = <&sd0_clk>, <&sd0_cmd>, <&sd0_cd>, <&sd0_bus4>; - bus-width = <4>; - status = "okay"; -}; - -&uart0 { - pinctrl-names = "default"; - pinctrl-0 = <&uart0_data>, <&uart0_fctl>; - status = "okay"; -}; - -&uart1 { - pinctrl-names = "default"; - pinctrl-0 = <&uart1_data>; - status = "okay"; -}; - -&uart2 { - pinctrl-names = "default"; - pinctrl-0 = <&uart2_data>; - status = "okay"; -}; - -&uart3 { - pinctrl-names = "default"; - pinctrl-0 = <&uart3_data>; - status = "okay"; -}; diff --git a/arch/arm/boot/dts/s3c6410.dtsi b/arch/arm/boot/dts/s3c6410.dtsi deleted file mode 100644 index eb4226b..0000000 --- a/arch/arm/boot/dts/s3c6410.dtsi +++ /dev/null @@ -1,57 +0,0 @@ -/* - * Samsung's S3C6410 SoC device tree source - * - * Copyright (c) 2013 Tomasz Figa <tomasz.figa@gmail.com> - * - * Samsung's S3C6410 SoC device nodes are listed in this file. S3C6410 - * based board files can include this file and provide values for board specfic - * bindings. - * - * Note: This file does not include device nodes for all the controllers in - * S3C6410 SoC. As device tree coverage for S3C6410 increases, additional - * nodes can be added to this file. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#include "s3c64xx.dtsi" - -/ { - compatible = "samsung,s3c6410"; - - aliases { - i2c1 = &i2c1; - }; -}; - -&vic0 { - valid-mask = <0xffffff7f>; - valid-wakeup-mask = <0x00200004>; -}; - -&vic1 { - valid-mask = <0xffffffff>; - valid-wakeup-mask = <0x53020000>; -}; - -&soc { - clocks: clock-controller@7e00f000 { - compatible = "samsung,s3c6410-clock"; - reg = <0x7e00f000 0x1000>; - #clock-cells = <1>; - }; - - i2c1: i2c@7f00f000 { - compatible = "samsung,s3c2440-i2c"; - reg = <0x7f00f000 0x1000>; - interrupt-parent = <&vic0>; - interrupts = <5>; - clock-names = "i2c"; - clocks = <&clocks PCLK_IIC1>; - status = "disabled"; - #address-cells = <1>; - #size-cells = <0>; - }; -}; diff --git a/arch/arm/boot/dts/s3c64xx-pinctrl.dtsi b/arch/arm/boot/dts/s3c64xx-pinctrl.dtsi deleted file mode 100644 index b1197d8..0000000 --- a/arch/arm/boot/dts/s3c64xx-pinctrl.dtsi +++ /dev/null @@ -1,687 +0,0 @@ -/* - * Samsung's S3C64xx SoC series common device tree source - * - pin control-related definitions - * - * Copyright (c) 2013 Tomasz Figa <tomasz.figa@gmail.com> - * - * Samsung's S3C64xx SoCs pin banks, pin-mux and pin-config options are - * listed as device tree nodes in this file. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#define PIN_PULL_NONE 0 -#define PIN_PULL_DOWN 1 -#define PIN_PULL_UP 2 - -&pinctrl0 { - /* - * Pin banks - */ - - gpa: gpa { - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpb: gpb { - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpc: gpc { - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpd: gpd { - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpe: gpe { - gpio-controller; - #gpio-cells = <2>; - }; - - gpf: gpf { - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpg: gpg { - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - }; - - gph: gph { - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpi: gpi { - gpio-controller; - #gpio-cells = <2>; - }; - - gpj: gpj { - gpio-controller; - #gpio-cells = <2>; - }; - - gpk: gpk { - gpio-controller; - #gpio-cells = <2>; - }; - - gpl: gpl { - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpm: gpm { - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpn: gpn { - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpo: gpo { - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpp: gpp { - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpq: gpq { - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - }; - - /* - * Pin groups - */ - - uart0_data: uart0-data { - samsung,pins = "gpa-0", "gpa-1"; - samsung,pin-function = <2>; - samsung,pin-pud = <PIN_PULL_NONE>; - }; - - uart0_fctl: uart0-fctl { - samsung,pins = "gpa-2", "gpa-3"; - samsung,pin-function = <2>; - samsung,pin-pud = <PIN_PULL_NONE>; - }; - - uart1_data: uart1-data { - samsung,pins = "gpa-4", "gpa-5"; - samsung,pin-function = <2>; - samsung,pin-pud = <PIN_PULL_NONE>; - }; - - uart1_fctl: uart1-fctl { - samsung,pins = "gpa-6", "gpa-7"; - samsung,pin-function = <2>; - samsung,pin-pud = <PIN_PULL_NONE>; - }; - - uart2_data: uart2-data { - samsung,pins = "gpb-0", "gpb-1"; - samsung,pin-function = <2>; - samsung,pin-pud = <PIN_PULL_NONE>; - }; - - uart3_data: uart3-data { - samsung,pins = "gpb-2", "gpb-3"; - samsung,pin-function = <2>; - samsung,pin-pud = <PIN_PULL_NONE>; - }; - - ext_dma_0: ext-dma-0 { - samsung,pins = "gpb-0", "gpb-1"; - samsung,pin-function = <3>; - samsung,pin-pud = <PIN_PULL_NONE>; - }; - - ext_dma_1: ext-dma-1 { - samsung,pins = "gpb-2", "gpb-3"; - samsung,pin-function = <4>; - samsung,pin-pud = <PIN_PULL_NONE>; - }; - - irda_data_0: irda-data-0 { - samsung,pins = "gpb-0", "gpb-1"; - samsung,pin-function = <4>; - samsung,pin-pud = <PIN_PULL_NONE>; - }; - - irda_data_1: irda-data-1 { - samsung,pins = "gpb-2", "gpb-3"; - samsung,pin-function = <3>; - samsung,pin-pud = <PIN_PULL_NONE>; - }; - - irda_sdbw: irda-sdbw { - samsung,pins = "gpb-4"; - samsung,pin-function = <2>; - samsung,pin-pud = <PIN_PULL_NONE>; - }; - - i2c0_bus: i2c0-bus { - samsung,pins = "gpb-5", "gpb-6"; - samsung,pin-function = <2>; - samsung,pin-pud = <PIN_PULL_UP>; - }; - - i2c1_bus: i2c1-bus { - /* S3C6410-only */ - samsung,pins = "gpb-2", "gpb-3"; - samsung,pin-function = <6>; - samsung,pin-pud = <PIN_PULL_UP>; - }; - - spi0_bus: spi0-bus { - samsung,pins = "gpc-0", "gpc-1", "gpc-2"; - samsung,pin-function = <2>; - samsung,pin-pud = <PIN_PULL_UP>; - }; - - spi0_cs: spi0-cs { - samsung,pins = "gpc-3"; - samsung,pin-function = <2>; - samsung,pin-pud = <PIN_PULL_NONE>; - }; - - spi1_bus: spi1-bus { - samsung,pins = "gpc-4", "gpc-5", "gpc-6"; - samsung,pin-function = <2>; - samsung,pin-pud = <PIN_PULL_UP>; - }; - - spi1_cs: spi1-cs { - samsung,pins = "gpc-7"; - samsung,pin-function = <2>; - samsung,pin-pud = <PIN_PULL_NONE>; - }; - - sd0_cmd: sd0-cmd { - samsung,pins = "gpg-1"; - samsung,pin-function = <2>; - samsung,pin-pud = <PIN_PULL_NONE>; - }; - - sd0_clk: sd0-clk { - samsung,pins = "gpg-0"; - samsung,pin-function = <2>; - samsung,pin-pud = <PIN_PULL_NONE>; - }; - - sd0_bus1: sd0-bus1 { - samsung,pins = "gpg-2"; - samsung,pin-function = <2>; - samsung,pin-pud = <PIN_PULL_NONE>; - }; - - sd0_bus4: sd0-bus4 { - samsung,pins = "gpg-2", "gpg-3", "gpg-4", "gpg-5"; - samsung,pin-function = <2>; - samsung,pin-pud = <PIN_PULL_NONE>; - }; - - sd0_cd: sd0-cd { - samsung,pins = "gpg-6"; - samsung,pin-function = <2>; - samsung,pin-pud = <PIN_PULL_UP>; - }; - - sd1_cmd: sd1-cmd { - samsung,pins = "gph-1"; - samsung,pin-function = <2>; - samsung,pin-pud = <PIN_PULL_NONE>; - }; - - sd1_clk: sd1-clk { - samsung,pins = "gph-0"; - samsung,pin-function = <2>; - samsung,pin-pud = <PIN_PULL_NONE>; - }; - - sd1_bus1: sd1-bus1 { - samsung,pins = "gph-2"; - samsung,pin-function = <2>; - samsung,pin-pud = <PIN_PULL_NONE>; - }; - - sd1_bus4: sd1-bus4 { - samsung,pins = "gph-2", "gph-3", "gph-4", "gph-5"; - samsung,pin-function = <2>; - samsung,pin-pud = <PIN_PULL_NONE>; - }; - - sd1_bus8: sd1-bus8 { - samsung,pins = "gph-2", "gph-3", "gph-4", "gph-5", - "gph-6", "gph-7", "gph-8", "gph-9"; - samsung,pin-function = <2>; - samsung,pin-pud = <PIN_PULL_NONE>; - }; - - sd1_cd: sd1-cd { - samsung,pins = "gpg-6"; - samsung,pin-function = <3>; - samsung,pin-pud = <PIN_PULL_UP>; - }; - - sd2_cmd: sd2-cmd { - samsung,pins = "gpc-4"; - samsung,pin-function = <3>; - samsung,pin-pud = <PIN_PULL_NONE>; - }; - - sd2_clk: sd2-clk { - samsung,pins = "gpc-5"; - samsung,pin-function = <3>; - samsung,pin-pud = <PIN_PULL_NONE>; - }; - - sd2_bus1: sd2-bus1 { - samsung,pins = "gph-6"; - samsung,pin-function = <3>; - samsung,pin-pud = <PIN_PULL_NONE>; - }; - - sd2_bus4: sd2-bus4 { - samsung,pins = "gph-6", "gph-7", "gph-8", "gph-9"; - samsung,pin-function = <3>; - samsung,pin-pud = <PIN_PULL_NONE>; - }; - - i2s0_bus: i2s0-bus { - samsung,pins = "gpd-0", "gpd-2", "gpd-3", "gpd-4"; - samsung,pin-function = <3>; - samsung,pin-pud = <PIN_PULL_NONE>; - }; - - i2s0_cdclk: i2s0-cdclk { - samsung,pins = "gpd-1"; - samsung,pin-function = <3>; - samsung,pin-pud = <PIN_PULL_NONE>; - }; - - i2s1_bus: i2s1-bus { - samsung,pins = "gpe-0", "gpe-2", "gpe-3", "gpe-4"; - samsung,pin-function = <3>; - samsung,pin-pud = <PIN_PULL_NONE>; - }; - - i2s1_cdclk: i2s1-cdclk { - samsung,pins = "gpe-1"; - samsung,pin-function = <3>; - samsung,pin-pud = <PIN_PULL_NONE>; - }; - - i2s2_bus: i2s2-bus { - /* S3C6410-only */ - samsung,pins = "gpc-4", "gpc-5", "gpc-6", "gph-6", - "gph-8", "gph-9"; - samsung,pin-function = <5>; - samsung,pin-pud = <PIN_PULL_NONE>; - }; - - i2s2_cdclk: i2s2-cdclk { - /* S3C6410-only */ - samsung,pins = "gph-7"; - samsung,pin-function = <5>; - samsung,pin-pud = <PIN_PULL_NONE>; - }; - - pcm0_bus: pcm0-bus { - samsung,pins = "gpd-0", "gpd-2", "gpd-3", "gpd-4"; - samsung,pin-function = <2>; - samsung,pin-pud = <PIN_PULL_NONE>; - }; - - pcm0_extclk: pcm0-extclk { - samsung,pins = "gpd-1"; - samsung,pin-function = <2>; - samsung,pin-pud = <PIN_PULL_NONE>; - }; - - pcm1_bus: pcm1-bus { - samsung,pins = "gpe-0", "gpe-2", "gpe-3", "gpe-4"; - samsung,pin-function = <2>; - samsung,pin-pud = <PIN_PULL_NONE>; - }; - - pcm1_extclk: pcm1-extclk { - samsung,pins = "gpe-1"; - samsung,pin-function = <2>; - samsung,pin-pud = <PIN_PULL_NONE>; - }; - - ac97_bus_0: ac97-bus-0 { - samsung,pins = "gpd-0", "gpd-1", "gpd-2", "gpd-3", "gpd-4"; - samsung,pin-function = <4>; - samsung,pin-pud = <PIN_PULL_NONE>; - }; - - ac97_bus_1: ac97-bus-1 { - samsung,pins = "gpe-0", "gpe-1", "gpe-2", "gpe-3", "gpe-4"; - samsung,pin-function = <4>; - samsung,pin-pud = <PIN_PULL_NONE>; - }; - - cam_port: cam-port { - samsung,pins = "gpf-0", "gpf-1", "gpf-2", "gpf-4", - "gpf-5", "gpf-6", "gpf-7", "gpf-8", - "gpf-9", "gpf-10", "gpf-11", "gpf-12"; - samsung,pin-function = <2>; - samsung,pin-pud = <PIN_PULL_NONE>; - }; - - cam_rst: cam-rst { - samsung,pins = "gpf-3"; - samsung,pin-function = <2>; - samsung,pin-pud = <PIN_PULL_NONE>; - }; - - cam_field: cam-field { - /* S3C6410-only */ - samsung,pins = "gpb-4"; - samsung,pin-function = <3>; - samsung,pin-pud = <PIN_PULL_NONE>; - }; - - pwm_extclk: pwm-extclk { - samsung,pins = "gpf-13"; - samsung,pin-function = <2>; - samsung,pin-pud = <PIN_PULL_NONE>; - }; - - pwm0_out: pwm0-out { - samsung,pins = "gpf-14"; - samsung,pin-function = <2>; - samsung,pin-pud = <PIN_PULL_NONE>; - }; - - pwm1_out: pwm1-out { - samsung,pins = "gpf-15"; - samsung,pin-function = <2>; - samsung,pin-pud = <PIN_PULL_NONE>; - }; - - clkout0: clkout-0 { - samsung,pins = "gpf-14"; - samsung,pin-function = <3>; - samsung,pin-pud = <PIN_PULL_NONE>; - }; - - keypad_col0_0: keypad-col0-0 { - samsung,pins = "gph-0"; - samsung,pin-function = <4>; - samsung,pin-pud = <PIN_PULL_NONE>; - }; - - keypad_col1_0: keypad-col1-0 { - samsung,pins = "gph-1"; - samsung,pin-function = <4>; - samsung,pin-pud = <PIN_PULL_NONE>; - }; - - keypad_col2_0: keypad-col2-0 { - samsung,pins = "gph-2"; - samsung,pin-function = <4>; - samsung,pin-pud = <PIN_PULL_NONE>; - }; - - keypad_col3_0: keypad-col3-0 { - samsung,pins = "gph-3"; - samsung,pin-function = <4>; - samsung,pin-pud = <PIN_PULL_NONE>; - }; - - keypad_col4_0: keypad-col4-0 { - samsung,pins = "gph-4"; - samsung,pin-function = <4>; - samsung,pin-pud = <PIN_PULL_NONE>; - }; - - keypad_col5_0: keypad-col5-0 { - samsung,pins = "gph-5"; - samsung,pin-function = <4>; - samsung,pin-pud = <PIN_PULL_NONE>; - }; - - keypad_col6_0: keypad-col6-0 { - samsung,pins = "gph-6"; - samsung,pin-function = <4>; - samsung,pin-pud = <PIN_PULL_NONE>; - }; - - keypad_col7_0: keypad-col7-0 { - samsung,pins = "gph-7"; - samsung,pin-function = <4>; - samsung,pin-pud = <PIN_PULL_NONE>; - }; - - keypad_col0_1: keypad-col0-1 { - samsung,pins = "gpl-0"; - samsung,pin-function = <3>; - samsung,pin-pud = <PIN_PULL_NONE>; - }; - - keypad_col1_1: keypad-col1-1 { - samsung,pins = "gpl-1"; - samsung,pin-function = <3>; - samsung,pin-pud = <PIN_PULL_NONE>; - }; - - keypad_col2_1: keypad-col2-1 { - samsung,pins = "gpl-2"; - samsung,pin-function = <3>; - samsung,pin-pud = <PIN_PULL_NONE>; - }; - - keypad_col3_1: keypad-col3-1 { - samsung,pins = "gpl-3"; - samsung,pin-function = <3>; - samsung,pin-pud = <PIN_PULL_NONE>; - }; - - keypad_col4_1: keypad-col4-1 { - samsung,pins = "gpl-4"; - samsung,pin-function = <3>; - samsung,pin-pud = <PIN_PULL_NONE>; - }; - - keypad_col5_1: keypad-col5-1 { - samsung,pins = "gpl-5"; - samsung,pin-function = <3>; - samsung,pin-pud = <PIN_PULL_NONE>; - }; - - keypad_col6_1: keypad-col6-1 { - samsung,pins = "gpl-6"; - samsung,pin-function = <3>; - samsung,pin-pud = <PIN_PULL_NONE>; - }; - - keypad_col7_1: keypad-col7-1 { - samsung,pins = "gpl-7"; - samsung,pin-function = <3>; - samsung,pin-pud = <PIN_PULL_NONE>; - }; - - keypad_row0_0: keypad-row0-0 { - samsung,pins = "gpk-8"; - samsung,pin-function = <3>; - samsung,pin-pud = <PIN_PULL_NONE>; - }; - - keypad_row1_0: keypad-row1-0 { - samsung,pins = "gpk-9"; - samsung,pin-function = <3>; - samsung,pin-pud = <PIN_PULL_NONE>; - }; - - keypad_row2_0: keypad-row2-0 { - samsung,pins = "gpk-10"; - samsung,pin-function = <3>; - samsung,pin-pud = <PIN_PULL_NONE>; - }; - - keypad_row3_0: keypad-row3-0 { - samsung,pins = "gpk-11"; - samsung,pin-function = <3>; - samsung,pin-pud = <PIN_PULL_NONE>; - }; - - keypad_row4_0: keypad-row4-0 { - samsung,pins = "gpk-12"; - samsung,pin-function = <3>; - samsung,pin-pud = <PIN_PULL_NONE>; - }; - - keypad_row5_0: keypad-row5-0 { - samsung,pins = "gpk-13"; - samsung,pin-function = <3>; - samsung,pin-pud = <PIN_PULL_NONE>; - }; - - keypad_row6_0: keypad-row6-0 { - samsung,pins = "gpk-14"; - samsung,pin-function = <3>; - samsung,pin-pud = <PIN_PULL_NONE>; - }; - - keypad_row7_0: keypad-row7-0 { - samsung,pins = "gpk-15"; - samsung,pin-function = <3>; - samsung,pin-pud = <PIN_PULL_NONE>; - }; - - keypad_row0_1: keypad-row0-1 { - samsung,pins = "gpn-0"; - samsung,pin-function = <3>; - samsung,pin-pud = <PIN_PULL_NONE>; - }; - - keypad_row1_1: keypad-row1-1 { - samsung,pins = "gpn-1"; - samsung,pin-function = <3>; - samsung,pin-pud = <PIN_PULL_NONE>; - }; - - keypad_row2_1: keypad-row2-1 { - samsung,pins = "gpn-2"; - samsung,pin-function = <3>; - samsung,pin-pud = <PIN_PULL_NONE>; - }; - - keypad_row3_1: keypad-row3-1 { - samsung,pins = "gpn-3"; - samsung,pin-function = <3>; - samsung,pin-pud = <PIN_PULL_NONE>; - }; - - keypad_row4_1: keypad-row4-1 { - samsung,pins = "gpn-4"; - samsung,pin-function = <3>; - samsung,pin-pud = <PIN_PULL_NONE>; - }; - - keypad_row5_1: keypad-row5-1 { - samsung,pins = "gpn-5"; - samsung,pin-function = <3>; - samsung,pin-pud = <PIN_PULL_NONE>; - }; - - keypad_row6_1: keypad-row6-1 { - samsung,pins = "gpn-6"; - samsung,pin-function = <3>; - samsung,pin-pud = <PIN_PULL_NONE>; - }; - - keypad_row7_1: keypad-row7-1 { - samsung,pins = "gpn-7"; - samsung,pin-function = <3>; - samsung,pin-pud = <PIN_PULL_NONE>; - }; - - lcd_ctrl: lcd-ctrl { - samsung,pins = "gpj-8", "gpj-9", "gpj-10", "gpj-11"; - samsung,pin-function = <2>; - samsung,pin-pud = <PIN_PULL_NONE>; - }; - - lcd_data16: lcd-data-width16 { - samsung,pins = "gpi-3", "gpi-4", "gpi-5", "gpi-6", - "gpi-7", "gpi-10", "gpi-11", "gpi-12", - "gpi-13", "gpi-14", "gpi-15", "gpj-3", - "gpj-4", "gpj-5", "gpj-6", "gpj-7"; - samsung,pin-function = <2>; - samsung,pin-pud = <PIN_PULL_NONE>; - }; - - lcd_data18: lcd-data-width18 { - samsung,pins = "gpi-2", "gpi-3", "gpi-4", "gpi-5", - "gpi-6", "gpi-7", "gpi-10", "gpi-11", - "gpi-12", "gpi-13", "gpi-14", "gpi-15", - "gpj-2", "gpj-3", "gpj-4", "gpj-5", - "gpj-6", "gpj-7"; - samsung,pin-function = <2>; - samsung,pin-pud = <PIN_PULL_NONE>; - }; - - lcd_data24: lcd-data-width24 { - samsung,pins = "gpi-0", "gpi-1", "gpi-2", "gpi-3", - "gpi-4", "gpi-5", "gpi-6", "gpi-7", - "gpi-8", "gpi-9", "gpi-10", "gpi-11", - "gpi-12", "gpi-13", "gpi-14", "gpi-15", - "gpj-0", "gpj-1", "gpj-2", "gpj-3", - "gpj-4", "gpj-5", "gpj-6", "gpj-7"; - samsung,pin-function = <2>; - samsung,pin-pud = <PIN_PULL_NONE>; - }; - - hsi_bus: hsi-bus { - samsung,pins = "gpk-0", "gpk-1", "gpk-2", "gpk-3", - "gpk-4", "gpk-5", "gpk-6", "gpk-7"; - samsung,pin-function = <3>; - samsung,pin-pud = <PIN_PULL_NONE>; - }; -}; diff --git a/arch/arm/boot/dts/s3c64xx.dtsi b/arch/arm/boot/dts/s3c64xx.dtsi deleted file mode 100644 index 4e3be4d..0000000 --- a/arch/arm/boot/dts/s3c64xx.dtsi +++ /dev/null @@ -1,199 +0,0 @@ -/* - * Samsung's S3C64xx SoC series common device tree source - * - * Copyright (c) 2013 Tomasz Figa <tomasz.figa@gmail.com> - * - * Samsung's S3C64xx SoC series device nodes are listed in this file. - * Particular SoCs from S3C64xx series can include this file and provide - * values for SoCs specfic bindings. - * - * Note: This file does not include device nodes for all the controllers in - * S3C64xx SoCs. As device tree coverage for S3C64xx increases, additional - * nodes can be added to this file. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include "skeleton.dtsi" -#include <dt-bindings/clock/samsung,s3c64xx-clock.h> - -/ { - aliases { - i2c0 = &i2c0; - pinctrl0 = &pinctrl0; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu@0 { - device_type = "cpu"; - compatible = "arm,arm1176jzf-s", "arm,arm1176"; - reg = <0x0>; - }; - }; - - soc: soc { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; - ranges; - - vic0: interrupt-controller@71200000 { - compatible = "arm,pl192-vic"; - interrupt-controller; - reg = <0x71200000 0x1000>; - #interrupt-cells = <1>; - }; - - vic1: interrupt-controller@71300000 { - compatible = "arm,pl192-vic"; - interrupt-controller; - reg = <0x71300000 0x1000>; - #interrupt-cells = <1>; - }; - - sdhci0: sdhci@7c200000 { - compatible = "samsung,s3c6410-sdhci"; - reg = <0x7c200000 0x100>; - interrupt-parent = <&vic1>; - interrupts = <24>; - clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.2"; - clocks = <&clocks HCLK_HSMMC0>, <&clocks HCLK_HSMMC0>, - <&clocks SCLK_MMC0>; - status = "disabled"; - }; - - sdhci1: sdhci@7c300000 { - compatible = "samsung,s3c6410-sdhci"; - reg = <0x7c300000 0x100>; - interrupt-parent = <&vic1>; - interrupts = <25>; - clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.2"; - clocks = <&clocks HCLK_HSMMC1>, <&clocks HCLK_HSMMC1>, - <&clocks SCLK_MMC1>; - status = "disabled"; - }; - - sdhci2: sdhci@7c400000 { - compatible = "samsung,s3c6410-sdhci"; - reg = <0x7c400000 0x100>; - interrupt-parent = <&vic1>; - interrupts = <17>; - clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.2"; - clocks = <&clocks HCLK_HSMMC2>, <&clocks HCLK_HSMMC2>, - <&clocks SCLK_MMC2>; - status = "disabled"; - }; - - watchdog: watchdog@7e004000 { - compatible = "samsung,s3c2410-wdt"; - reg = <0x7e004000 0x1000>; - interrupt-parent = <&vic0>; - interrupts = <26>; - clock-names = "watchdog"; - clocks = <&clocks PCLK_WDT>; - status = "disabled"; - }; - - i2c0: i2c@7f004000 { - compatible = "samsung,s3c2440-i2c"; - reg = <0x7f004000 0x1000>; - interrupt-parent = <&vic1>; - interrupts = <18>; - clock-names = "i2c"; - clocks = <&clocks PCLK_IIC0>; - status = "disabled"; - #address-cells = <1>; - #size-cells = <0>; - }; - - uart0: serial@7f005000 { - compatible = "samsung,s3c6400-uart"; - reg = <0x7f005000 0x100>; - interrupt-parent = <&vic1>; - interrupts = <5>; - clock-names = "uart", "clk_uart_baud2", - "clk_uart_baud3"; - clocks = <&clocks PCLK_UART0>, <&clocks PCLK_UART0>, - <&clocks SCLK_UART>; - status = "disabled"; - }; - - uart1: serial@7f005400 { - compatible = "samsung,s3c6400-uart"; - reg = <0x7f005400 0x100>; - interrupt-parent = <&vic1>; - interrupts = <6>; - clock-names = "uart", "clk_uart_baud2", - "clk_uart_baud3"; - clocks = <&clocks PCLK_UART1>, <&clocks PCLK_UART1>, - <&clocks SCLK_UART>; - status = "disabled"; - }; - - uart2: serial@7f005800 { - compatible = "samsung,s3c6400-uart"; - reg = <0x7f005800 0x100>; - interrupt-parent = <&vic1>; - interrupts = <7>; - clock-names = "uart", "clk_uart_baud2", - "clk_uart_baud3"; - clocks = <&clocks PCLK_UART2>, <&clocks PCLK_UART2>, - <&clocks SCLK_UART>; - status = "disabled"; - }; - - uart3: serial@7f005c00 { - compatible = "samsung,s3c6400-uart"; - reg = <0x7f005c00 0x100>; - interrupt-parent = <&vic1>; - interrupts = <8>; - clock-names = "uart", "clk_uart_baud2", - "clk_uart_baud3"; - clocks = <&clocks PCLK_UART3>, <&clocks PCLK_UART3>, - <&clocks SCLK_UART>; - status = "disabled"; - }; - - pwm: pwm@7f006000 { - compatible = "samsung,s3c6400-pwm"; - reg = <0x7f006000 0x1000>; - interrupt-parent = <&vic0>; - interrupts = <23>, <24>, <25>, <27>, <28>; - clock-names = "timers"; - clocks = <&clocks PCLK_PWM>; - samsung,pwm-outputs = <0>, <1>; - #pwm-cells = <3>; - status = "disabled"; - }; - - pinctrl0: pinctrl@7f008000 { - compatible = "samsung,s3c64xx-pinctrl"; - reg = <0x7f008000 0x1000>; - interrupt-parent = <&vic1>; - interrupts = <21>; - - pctrl_int_map: pinctrl-interrupt-map { - interrupt-map = <0 &vic0 0>, - <1 &vic0 1>, - <2 &vic1 0>, - <3 &vic1 1>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <1>; - }; - - wakeup-interrupt-controller { - compatible = "samsung,s3c64xx-wakeup-eint"; - interrupts = <0>, <1>, <2>, <3>; - interrupt-parent = <&pctrl_int_map>; - }; - }; - }; -}; - -#include "s3c64xx-pinctrl.dtsi" diff --git a/arch/arm/boot/dts/sama5d3.dtsi b/arch/arm/boot/dts/sama5d3.dtsi index 5cdaba4..b7f4961 100644 --- a/arch/arm/boot/dts/sama5d3.dtsi +++ b/arch/arm/boot/dts/sama5d3.dtsi @@ -31,6 +31,7 @@ gpio3 = &pioD; gpio4 = &pioE; tcb0 = &tcb0; + tcb1 = &tcb1; i2c0 = &i2c0; i2c1 = &i2c1; i2c2 = &i2c2; @@ -104,6 +105,15 @@ status = "disabled"; }; + can0: can@f000c000 { + compatible = "atmel,at91sam9x5-can"; + reg = <0xf000c000 0x300>; + interrupts = <40 IRQ_TYPE_LEVEL_HIGH 3>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_can0_rx_tx>; + status = "disabled"; + }; + tcb0: timer@f0010000 { compatible = "atmel,at91sam9x5-tcb"; reg = <0xf0010000 0x100>; @@ -156,6 +166,15 @@ status = "disabled"; }; + macb0: ethernet@f0028000 { + compatible = "cdns,pc302-gem", "cdns,gem"; + reg = <0xf0028000 0x100>; + interrupts = <34 IRQ_TYPE_LEVEL_HIGH 3>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_macb0_data_rgmii &pinctrl_macb0_signal_rgmii>; + status = "disabled"; + }; + isi: isi@f0034000 { compatible = "atmel,at91sam9g45-isi"; reg = <0xf0034000 0x4000>; @@ -176,6 +195,19 @@ #size-cells = <0>; }; + mmc2: mmc@f8004000 { + compatible = "atmel,hsmci"; + reg = <0xf8004000 0x600>; + interrupts = <23 IRQ_TYPE_LEVEL_HIGH 0>; + dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(1)>; + dma-names = "rxtx"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_mmc2_clk_cmd_dat0 &pinctrl_mmc2_dat1_3>; + status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; + }; + spi1: spi@f8008000 { #address-cells = <1>; #size-cells = <0>; @@ -199,6 +231,20 @@ status = "disabled"; }; + can1: can@f8010000 { + compatible = "atmel,at91sam9x5-can"; + reg = <0xf8010000 0x300>; + interrupts = <41 IRQ_TYPE_LEVEL_HIGH 3>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_can1_rx_tx>; + }; + + tcb1: timer@f8014000 { + compatible = "atmel,at91sam9x5-tcb"; + reg = <0xf8014000 0x100>; + interrupts = <27 IRQ_TYPE_LEVEL_HIGH 0>; + }; + adc0: adc@f8018000 { compatible = "atmel,at91sam9260-adc"; reg = <0xf8018000 0x100>; @@ -295,6 +341,15 @@ status = "disabled"; }; + macb1: ethernet@f802c000 { + compatible = "cdns,at32ap7000-macb", "cdns,macb"; + reg = <0xf802c000 0x100>; + interrupts = <35 IRQ_TYPE_LEVEL_HIGH 3>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_macb1_rmii>; + status = "disabled"; + }; + sha@f8034000 { compatible = "atmel,sam9g46-sha"; reg = <0xf8034000 0x100>; @@ -419,6 +474,22 @@ }; }; + can0 { + pinctrl_can0_rx_tx: can0_rx_tx { + atmel,pins = + <AT91_PIOD 14 AT91_PERIPH_C AT91_PINCTRL_NONE /* PD14 periph C RX, conflicts with SCK0, SPI0_NPCS1 */ + AT91_PIOD 15 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PD15 periph C TX, conflicts with CTS0, SPI0_NPCS2 */ + }; + }; + + can1 { + pinctrl_can1_rx_tx: can1_rx_tx { + atmel,pins = + <AT91_PIOB 14 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB14 periph B RX, conflicts with GCRS */ + AT91_PIOB 15 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB15 periph B TX, conflicts with GCOL */ + }; + }; + dbgu { pinctrl_dbgu: dbgu-0 { atmel,pins = @@ -466,6 +537,107 @@ }; }; + lcd { + pinctrl_lcd: lcd-0 { + atmel,pins = + <AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA24 periph A LCDPWM */ + AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA26 periph A LCDVSYNC */ + AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA27 periph A LCDHSYNC */ + AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA25 periph A LCDDISP */ + AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA29 periph A LCDDEN */ + AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA28 periph A LCDPCK */ + AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA0 periph A LCDD0 pin */ + AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA1 periph A LCDD1 pin */ + AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA2 periph A LCDD2 pin */ + AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA3 periph A LCDD3 pin */ + AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA4 periph A LCDD4 pin */ + AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA5 periph A LCDD5 pin */ + AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA6 periph A LCDD6 pin */ + AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA7 periph A LCDD7 pin */ + AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA8 periph A LCDD8 pin */ + AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA9 periph A LCDD9 pin */ + AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA10 periph A LCDD10 pin */ + AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA11 periph A LCDD11 pin */ + AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA12 periph A LCDD12 pin */ + AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA13 periph A LCDD13 pin */ + AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA14 periph A LCDD14 pin */ + AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA15 periph A LCDD15 pin */ + AT91_PIOC 14 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC14 periph C LCDD16 pin */ + AT91_PIOC 13 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC13 periph C LCDD17 pin */ + AT91_PIOC 12 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC12 periph C LCDD18 pin */ + AT91_PIOC 11 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC11 periph C LCDD19 pin */ + AT91_PIOC 10 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC10 periph C LCDD20 pin */ + AT91_PIOC 15 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC15 periph C LCDD21 pin */ + AT91_PIOE 27 AT91_PERIPH_C AT91_PINCTRL_NONE /* PE27 periph C LCDD22 pin */ + AT91_PIOE 28 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PE28 periph C LCDD23 pin */ + }; + }; + + macb0 { + pinctrl_macb0_data_rgmii: macb0_data_rgmii { + atmel,pins = + <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB0 periph A GTX0, conflicts with PWMH0 */ + AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB1 periph A GTX1, conflicts with PWML0 */ + AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB2 periph A GTX2, conflicts with TK1 */ + AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB3 periph A GTX3, conflicts with TF1 */ + AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB4 periph A GRX0, conflicts with PWMH1 */ + AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB5 periph A GRX1, conflicts with PWML1 */ + AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB6 periph A GRX2, conflicts with TD1 */ + AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB7 periph A GRX3, conflicts with RK1 */ + }; + pinctrl_macb0_data_gmii: macb0_data_gmii { + atmel,pins = + <AT91_PIOB 19 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB19 periph B GTX4, conflicts with MCI1_CDA */ + AT91_PIOB 20 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB20 periph B GTX5, conflicts with MCI1_DA0 */ + AT91_PIOB 21 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB21 periph B GTX6, conflicts with MCI1_DA1 */ + AT91_PIOB 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB22 periph B GTX7, conflicts with MCI1_DA2 */ + AT91_PIOB 23 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB23 periph B GRX4, conflicts with MCI1_DA3 */ + AT91_PIOB 24 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB24 periph B GRX5, conflicts with MCI1_CK */ + AT91_PIOB 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB25 periph B GRX6, conflicts with SCK1 */ + AT91_PIOB 26 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB26 periph B GRX7, conflicts with CTS1 */ + }; + pinctrl_macb0_signal_rgmii: macb0_signal_rgmii { + atmel,pins = + <AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB8 periph A GTXCK, conflicts with PWMH2 */ + AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB9 periph A GTXEN, conflicts with PWML2 */ + AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB11 periph A GRXCK, conflicts with RD1 */ + AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB13 periph A GRXER, conflicts with PWML3 */ + AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB16 periph A GMDC */ + AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB17 periph A GMDIO */ + AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB18 periph A G125CK */ + }; + pinctrl_macb0_signal_gmii: macb0_signal_gmii { + atmel,pins = + <AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB9 periph A GTXEN, conflicts with PWML2 */ + AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB10 periph A GTXER, conflicts with RF1 */ + AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB11 periph A GRXCK, conflicts with RD1 */ + AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB12 periph A GRXDV, conflicts with PWMH3 */ + AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB13 periph A GRXER, conflicts with PWML3 */ + AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB14 periph A GCRS, conflicts with CANRX1 */ + AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB15 periph A GCOL, conflicts with CANTX1 */ + AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB16 periph A GMDC */ + AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB17 periph A GMDIO */ + AT91_PIOB 27 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB27 periph B G125CKO */ + }; + + }; + + macb1 { + pinctrl_macb1_rmii: macb1_rmii-0 { + atmel,pins = + <AT91_PIOC 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC0 periph A ETX0, conflicts with TIOA3 */ + AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC1 periph A ETX1, conflicts with TIOB3 */ + AT91_PIOC 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC2 periph A ERX0, conflicts with TCLK3 */ + AT91_PIOC 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC3 periph A ERX1, conflicts with TIOA4 */ + AT91_PIOC 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC4 periph A ETXEN, conflicts with TIOB4 */ + AT91_PIOC 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC5 periph A ECRSDV,conflicts with TCLK4 */ + AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC6 periph A ERXER, conflicts with TIOA5 */ + AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC7 periph A EREFCK, conflicts with TIOB5 */ + AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC8 periph A EMDC, conflicts with TCLK5 */ + AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC9 periph A EMDIO */ + }; + }; + mmc0 { pinctrl_mmc0_clk_cmd_dat0: mmc0_clk_cmd_dat0 { atmel,pins = @@ -503,6 +675,21 @@ }; }; + mmc2 { + pinctrl_mmc2_clk_cmd_dat0: mmc2_clk_cmd_dat0 { + atmel,pins = + <AT91_PIOC 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC15 periph A MCI2_CK, conflicts with PCK2 */ + AT91_PIOC 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PC10 periph A MCI2_CDA with pullup */ + AT91_PIOC 11 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PC11 periph A MCI2_DA0 with pullup */ + }; + pinctrl_mmc2_dat1_3: mmc2_dat1_3 { + atmel,pins = + <AT91_PIOC 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC12 periph A MCI2_DA1 with pullup, conflicts with TIOA1 */ + AT91_PIOC 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC13 periph A MCI2_DA2 with pullup, conflicts with TIOB1 */ + AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC14 periph A MCI2_DA3 with pullup, conflicts with TCLK1 */ + }; + }; + nand0 { pinctrl_nand0_ale_cle: nand0_ale_cle-0 { atmel,pins = @@ -561,6 +748,22 @@ }; }; + uart0 { + pinctrl_uart0: uart0-0 { + atmel,pins = + <AT91_PIOC 29 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC29 periph A, conflicts with PWMFI2, ISI_D8 */ + AT91_PIOC 30 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PC30 periph A with pullup, conflicts with ISI_PCK */ + }; + }; + + uart1 { + pinctrl_uart1: uart1-0 { + atmel,pins = + <AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA30 periph B, conflicts with TWD0, ISI_VSYNC */ + AT91_PIOA 31 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA31 periph B with pullup, conflicts with TWCK0, ISI_HSYNC */ + }; + }; + usart0 { pinctrl_usart0: usart0-0 { atmel,pins = diff --git a/arch/arm/boot/dts/sama5d31.dtsi b/arch/arm/boot/dts/sama5d31.dtsi deleted file mode 100644 index 7997dc9..0000000 --- a/arch/arm/boot/dts/sama5d31.dtsi +++ /dev/null @@ -1,16 +0,0 @@ -/* - * sama5d31.dtsi - Device Tree Include file for SAMA5D31 SoC - * - * Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com> - * - * Licensed under GPLv2 or later. - */ -#include "sama5d3.dtsi" -#include "sama5d3_lcd.dtsi" -#include "sama5d3_emac.dtsi" -#include "sama5d3_mci2.dtsi" -#include "sama5d3_uart.dtsi" - -/ { - compatible = "atmel,samad31", "atmel,sama5d3", "atmel,sama5"; -}; diff --git a/arch/arm/boot/dts/sama5d31ek.dts b/arch/arm/boot/dts/sama5d31ek.dts index 04eec0d..027bac7 100644 --- a/arch/arm/boot/dts/sama5d31ek.dts +++ b/arch/arm/boot/dts/sama5d31ek.dts @@ -7,13 +7,12 @@ * Licensed under GPLv2 or later. */ /dts-v1/; -#include "sama5d31.dtsi" #include "sama5d3xmb.dtsi" #include "sama5d3xdm.dtsi" / { model = "Atmel SAMA5D31-EK"; - compatible = "atmel,sama5d31ek", "atmel,sama5d3xmb", "atmel,sama5d3xcm", "atmel,sama5d31", "atmel,sama5d3", "atmel,sama5"; + compatible = "atmel,sama5d31ek", "atmel,sama5d3xmb", "atmel,sama5d3xcm", "atmel,sama5d3", "atmel,sama5"; ahb { apb { diff --git a/arch/arm/boot/dts/sama5d33.dtsi b/arch/arm/boot/dts/sama5d33.dtsi deleted file mode 100644 index 39f8322..0000000 --- a/arch/arm/boot/dts/sama5d33.dtsi +++ /dev/null @@ -1,14 +0,0 @@ -/* - * sama5d33.dtsi - Device Tree Include file for SAMA5D33 SoC - * - * Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com> - * - * Licensed under GPLv2 or later. - */ -#include "sama5d3.dtsi" -#include "sama5d3_lcd.dtsi" -#include "sama5d3_gmac.dtsi" - -/ { - compatible = "atmel,samad33", "atmel,sama5d3", "atmel,sama5"; -}; diff --git a/arch/arm/boot/dts/sama5d33ek.dts b/arch/arm/boot/dts/sama5d33ek.dts index cbd6a3f..99bd0c8 100644 --- a/arch/arm/boot/dts/sama5d33ek.dts +++ b/arch/arm/boot/dts/sama5d33ek.dts @@ -7,13 +7,12 @@ * Licensed under GPLv2 or later. */ /dts-v1/; -#include "sama5d33.dtsi" #include "sama5d3xmb.dtsi" #include "sama5d3xdm.dtsi" / { model = "Atmel SAMA5D33-EK"; - compatible = "atmel,sama5d33ek", "atmel,sama5d3xmb", "atmel,sama5d3xcm", "atmel,sama5d33", "atmel,sama5d3", "atmel,sama5"; + compatible = "atmel,sama5d33ek", "atmel,sama5d3xmb", "atmel,sama5d3xcm", "atmel,sama5d3", "atmel,sama5"; ahb { apb { diff --git a/arch/arm/boot/dts/sama5d34.dtsi b/arch/arm/boot/dts/sama5d34.dtsi deleted file mode 100644 index 89cda2c..0000000 --- a/arch/arm/boot/dts/sama5d34.dtsi +++ /dev/null @@ -1,16 +0,0 @@ -/* - * sama5d34.dtsi - Device Tree Include file for SAMA5D34 SoC - * - * Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com> - * - * Licensed under GPLv2 or later. - */ -#include "sama5d3.dtsi" -#include "sama5d3_lcd.dtsi" -#include "sama5d3_gmac.dtsi" -#include "sama5d3_can.dtsi" -#include "sama5d3_mci2.dtsi" - -/ { - compatible = "atmel,samad34", "atmel,sama5d3", "atmel,sama5"; -}; diff --git a/arch/arm/boot/dts/sama5d34ek.dts b/arch/arm/boot/dts/sama5d34ek.dts index 878aa16..fb8ee11 100644 --- a/arch/arm/boot/dts/sama5d34ek.dts +++ b/arch/arm/boot/dts/sama5d34ek.dts @@ -7,13 +7,12 @@ * Licensed under GPLv2 or later. */ /dts-v1/; -#include "sama5d34.dtsi" #include "sama5d3xmb.dtsi" #include "sama5d3xdm.dtsi" / { model = "Atmel SAMA5D34-EK"; - compatible = "atmel,sama5d34ek", "atmel,sama5d3xmb", "atmel,sama5d3xcm", "atmel,sama5d34", "atmel,sama5d3", "atmel,sama5"; + compatible = "atmel,sama5d34ek", "atmel,sama5d3xmb", "atmel,sama5d3xcm", "atmel,sama5d3", "atmel,sama5"; ahb { apb { diff --git a/arch/arm/boot/dts/sama5d35.dtsi b/arch/arm/boot/dts/sama5d35.dtsi deleted file mode 100644 index d20cd71..0000000 --- a/arch/arm/boot/dts/sama5d35.dtsi +++ /dev/null @@ -1,18 +0,0 @@ -/* - * sama5d35.dtsi - Device Tree Include file for SAMA5D35 SoC - * - * Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com> - * - * Licensed under GPLv2 or later. - */ -#include "sama5d3.dtsi" -#include "sama5d3_gmac.dtsi" -#include "sama5d3_emac.dtsi" -#include "sama5d3_can.dtsi" -#include "sama5d3_mci2.dtsi" -#include "sama5d3_uart.dtsi" -#include "sama5d3_tcb1.dtsi" - -/ { - compatible = "atmel,samad35", "atmel,sama5d3", "atmel,sama5"; -}; diff --git a/arch/arm/boot/dts/sama5d35ek.dts b/arch/arm/boot/dts/sama5d35ek.dts index 9089c7c..509a53d 100644 --- a/arch/arm/boot/dts/sama5d35ek.dts +++ b/arch/arm/boot/dts/sama5d35ek.dts @@ -7,12 +7,11 @@ * Licensed under GPLv2 or later. */ /dts-v1/; -#include "sama5d35.dtsi" #include "sama5d3xmb.dtsi" / { model = "Atmel SAMA5D35-EK"; - compatible = "atmel,sama5d35ek", "atmel,sama5d3xmb", "atmel,sama5d3xcm", "atmel,sama5d35", "atmel,sama5d3", "atmel,sama5"; + compatible = "atmel,sama5d35ek", "atmel,sama5d3xmb", "atmel,sama5d3xcm", "atmel,sama5d3", "atmel,sama5"; ahb { apb { diff --git a/arch/arm/boot/dts/sama5d3_can.dtsi b/arch/arm/boot/dts/sama5d3_can.dtsi deleted file mode 100644 index 8ed3260..0000000 --- a/arch/arm/boot/dts/sama5d3_can.dtsi +++ /dev/null @@ -1,54 +0,0 @@ -/* - * at91sama5d3_can.dtsi - Device Tree Include file for AT91SAM9x5 SoC with - * CAN support - * - * Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com> - * - * Licensed under GPLv2. - */ - -#include <dt-bindings/pinctrl/at91.h> -#include <dt-bindings/interrupt-controller/irq.h> - -/ { - ahb { - apb { - pinctrl@fffff200 { - can0 { - pinctrl_can0_rx_tx: can0_rx_tx { - atmel,pins = - <AT91_PIOD 14 AT91_PERIPH_C AT91_PINCTRL_NONE /* PD14 periph C RX, conflicts with SCK0, SPI0_NPCS1 */ - AT91_PIOD 15 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PD15 periph C TX, conflicts with CTS0, SPI0_NPCS2 */ - }; - }; - - can1 { - pinctrl_can1_rx_tx: can1_rx_tx { - atmel,pins = - <AT91_PIOB 14 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB14 periph B RX, conflicts with GCRS */ - AT91_PIOB 15 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB15 periph B TX, conflicts with GCOL */ - }; - }; - - }; - - can0: can@f000c000 { - compatible = "atmel,at91sam9x5-can"; - reg = <0xf000c000 0x300>; - interrupts = <40 IRQ_TYPE_LEVEL_HIGH 3>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_can0_rx_tx>; - status = "disabled"; - }; - - can1: can@f8010000 { - compatible = "atmel,at91sam9x5-can"; - reg = <0xf8010000 0x300>; - interrupts = <41 IRQ_TYPE_LEVEL_HIGH 3>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_can1_rx_tx>; - status = "disabled"; - }; - }; - }; -}; diff --git a/arch/arm/boot/dts/sama5d3_emac.dtsi b/arch/arm/boot/dts/sama5d3_emac.dtsi deleted file mode 100644 index 4d4f351..0000000 --- a/arch/arm/boot/dts/sama5d3_emac.dtsi +++ /dev/null @@ -1,44 +0,0 @@ -/* - * at91sama5d3_emac.dtsi - Device Tree Include file for AT91SAM9x5 SoC with - * Ethernet. - * - * Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com> - * - * Licensed under GPLv2. - */ - -#include <dt-bindings/pinctrl/at91.h> -#include <dt-bindings/interrupt-controller/irq.h> - -/ { - ahb { - apb { - pinctrl@fffff200 { - macb1 { - pinctrl_macb1_rmii: macb1_rmii-0 { - atmel,pins = - <AT91_PIOC 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC0 periph A ETX0, conflicts with TIOA3 */ - AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC1 periph A ETX1, conflicts with TIOB3 */ - AT91_PIOC 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC2 periph A ERX0, conflicts with TCLK3 */ - AT91_PIOC 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC3 periph A ERX1, conflicts with TIOA4 */ - AT91_PIOC 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC4 periph A ETXEN, conflicts with TIOB4 */ - AT91_PIOC 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC5 periph A ECRSDV,conflicts with TCLK4 */ - AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC6 periph A ERXER, conflicts with TIOA5 */ - AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC7 periph A EREFCK, conflicts with TIOB5 */ - AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC8 periph A EMDC, conflicts with TCLK5 */ - AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC9 periph A EMDIO */ - }; - }; - }; - - macb1: ethernet@f802c000 { - compatible = "cdns,at32ap7000-macb", "cdns,macb"; - reg = <0xf802c000 0x100>; - interrupts = <35 IRQ_TYPE_LEVEL_HIGH 3>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_macb1_rmii>; - status = "disabled"; - }; - }; - }; -}; diff --git a/arch/arm/boot/dts/sama5d3_gmac.dtsi b/arch/arm/boot/dts/sama5d3_gmac.dtsi deleted file mode 100644 index 0ba8be3..0000000 --- a/arch/arm/boot/dts/sama5d3_gmac.dtsi +++ /dev/null @@ -1,77 +0,0 @@ -/* - * at91sama5d3_gmac.dtsi - Device Tree Include file for AT91SAM9x5 SoC with - * Gigabit Ethernet. - * - * Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com> - * - * Licensed under GPLv2. - */ - -#include <dt-bindings/pinctrl/at91.h> -#include <dt-bindings/interrupt-controller/irq.h> - -/ { - ahb { - apb { - pinctrl@fffff200 { - macb0 { - pinctrl_macb0_data_rgmii: macb0_data_rgmii { - atmel,pins = - <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB0 periph A GTX0, conflicts with PWMH0 */ - AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB1 periph A GTX1, conflicts with PWML0 */ - AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB2 periph A GTX2, conflicts with TK1 */ - AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB3 periph A GTX3, conflicts with TF1 */ - AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB4 periph A GRX0, conflicts with PWMH1 */ - AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB5 periph A GRX1, conflicts with PWML1 */ - AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB6 periph A GRX2, conflicts with TD1 */ - AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB7 periph A GRX3, conflicts with RK1 */ - }; - pinctrl_macb0_data_gmii: macb0_data_gmii { - atmel,pins = - <AT91_PIOB 19 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB19 periph B GTX4, conflicts with MCI1_CDA */ - AT91_PIOB 20 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB20 periph B GTX5, conflicts with MCI1_DA0 */ - AT91_PIOB 21 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB21 periph B GTX6, conflicts with MCI1_DA1 */ - AT91_PIOB 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB22 periph B GTX7, conflicts with MCI1_DA2 */ - AT91_PIOB 23 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB23 periph B GRX4, conflicts with MCI1_DA3 */ - AT91_PIOB 24 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB24 periph B GRX5, conflicts with MCI1_CK */ - AT91_PIOB 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB25 periph B GRX6, conflicts with SCK1 */ - AT91_PIOB 26 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB26 periph B GRX7, conflicts with CTS1 */ - }; - pinctrl_macb0_signal_rgmii: macb0_signal_rgmii { - atmel,pins = - <AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB8 periph A GTXCK, conflicts with PWMH2 */ - AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB9 periph A GTXEN, conflicts with PWML2 */ - AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB11 periph A GRXCK, conflicts with RD1 */ - AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB13 periph A GRXER, conflicts with PWML3 */ - AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB16 periph A GMDC */ - AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB17 periph A GMDIO */ - AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB18 periph A G125CK */ - }; - pinctrl_macb0_signal_gmii: macb0_signal_gmii { - atmel,pins = - <AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB9 periph A GTXEN, conflicts with PWML2 */ - AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB10 periph A GTXER, conflicts with RF1 */ - AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB11 periph A GRXCK, conflicts with RD1 */ - AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB12 periph A GRXDV, conflicts with PWMH3 */ - AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB13 periph A GRXER, conflicts with PWML3 */ - AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB14 periph A GCRS, conflicts with CANRX1 */ - AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB15 periph A GCOL, conflicts with CANTX1 */ - AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB16 periph A GMDC */ - AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB17 periph A GMDIO */ - AT91_PIOB 27 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB27 periph B G125CKO */ - }; - - }; - }; - - macb0: ethernet@f0028000 { - compatible = "cdns,pc302-gem", "cdns,gem"; - reg = <0xf0028000 0x100>; - interrupts = <34 IRQ_TYPE_LEVEL_HIGH 3>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_macb0_data_rgmii &pinctrl_macb0_signal_rgmii>; - status = "disabled"; - }; - }; - }; -}; diff --git a/arch/arm/boot/dts/sama5d3_lcd.dtsi b/arch/arm/boot/dts/sama5d3_lcd.dtsi deleted file mode 100644 index 01f52a7..0000000 --- a/arch/arm/boot/dts/sama5d3_lcd.dtsi +++ /dev/null @@ -1,55 +0,0 @@ -/* - * at91sama5d3_lcd.dtsi - Device Tree Include file for AT91SAM9x5 SoC with - * LCD support - * - * Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com> - * - * Licensed under GPLv2. - */ - -#include <dt-bindings/pinctrl/at91.h> -#include <dt-bindings/interrupt-controller/irq.h> - -/ { - ahb { - apb { - pinctrl@fffff200 { - lcd { - pinctrl_lcd: lcd-0 { - atmel,pins = - <AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA24 periph A LCDPWM */ - AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA26 periph A LCDVSYNC */ - AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA27 periph A LCDHSYNC */ - AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA25 periph A LCDDISP */ - AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA29 periph A LCDDEN */ - AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA28 periph A LCDPCK */ - AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA0 periph A LCDD0 pin */ - AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA1 periph A LCDD1 pin */ - AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA2 periph A LCDD2 pin */ - AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA3 periph A LCDD3 pin */ - AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA4 periph A LCDD4 pin */ - AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA5 periph A LCDD5 pin */ - AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA6 periph A LCDD6 pin */ - AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA7 periph A LCDD7 pin */ - AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA8 periph A LCDD8 pin */ - AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA9 periph A LCDD9 pin */ - AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA10 periph A LCDD10 pin */ - AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA11 periph A LCDD11 pin */ - AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA12 periph A LCDD12 pin */ - AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA13 periph A LCDD13 pin */ - AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA14 periph A LCDD14 pin */ - AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA15 periph A LCDD15 pin */ - AT91_PIOC 14 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC14 periph C LCDD16 pin */ - AT91_PIOC 13 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC13 periph C LCDD17 pin */ - AT91_PIOC 12 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC12 periph C LCDD18 pin */ - AT91_PIOC 11 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC11 periph C LCDD19 pin */ - AT91_PIOC 10 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC10 periph C LCDD20 pin */ - AT91_PIOC 15 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC15 periph C LCDD21 pin */ - AT91_PIOE 27 AT91_PERIPH_C AT91_PINCTRL_NONE /* PE27 periph C LCDD22 pin */ - AT91_PIOE 28 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PE28 periph C LCDD23 pin */ - }; - }; - }; - }; - }; -}; diff --git a/arch/arm/boot/dts/sama5d3_mci2.dtsi b/arch/arm/boot/dts/sama5d3_mci2.dtsi deleted file mode 100644 index 38e88e3..0000000 --- a/arch/arm/boot/dts/sama5d3_mci2.dtsi +++ /dev/null @@ -1,47 +0,0 @@ -/* - * at91sama5d3_mci2.dtsi - Device Tree Include file for AT91SAM9x5 SoC with - * 3 MMC ports - * - * Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com> - * - * Licensed under GPLv2. - */ - -#include <dt-bindings/pinctrl/at91.h> -#include <dt-bindings/interrupt-controller/irq.h> - -/ { - ahb { - apb { - pinctrl@fffff200 { - mmc2 { - pinctrl_mmc2_clk_cmd_dat0: mmc2_clk_cmd_dat0 { - atmel,pins = - <AT91_PIOC 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC15 periph A MCI2_CK, conflicts with PCK2 */ - AT91_PIOC 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PC10 periph A MCI2_CDA with pullup */ - AT91_PIOC 11 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PC11 periph A MCI2_DA0 with pullup */ - }; - pinctrl_mmc2_dat1_3: mmc2_dat1_3 { - atmel,pins = - <AT91_PIOC 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC12 periph A MCI2_DA1 with pullup, conflicts with TIOA1 */ - AT91_PIOC 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC13 periph A MCI2_DA2 with pullup, conflicts with TIOB1 */ - AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC14 periph A MCI2_DA3 with pullup, conflicts with TCLK1 */ - }; - }; - }; - - mmc2: mmc@f8004000 { - compatible = "atmel,hsmci"; - reg = <0xf8004000 0x600>; - interrupts = <23 IRQ_TYPE_LEVEL_HIGH 0>; - dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(1)>; - dma-names = "rxtx"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_mmc2_clk_cmd_dat0 &pinctrl_mmc2_dat1_3>; - status = "disabled"; - #address-cells = <1>; - #size-cells = <0>; - }; - }; - }; -}; diff --git a/arch/arm/boot/dts/sama5d3_tcb1.dtsi b/arch/arm/boot/dts/sama5d3_tcb1.dtsi deleted file mode 100644 index 5264bb4..0000000 --- a/arch/arm/boot/dts/sama5d3_tcb1.dtsi +++ /dev/null @@ -1,27 +0,0 @@ -/* - * at91sama5d3_tcb1.dtsi - Device Tree Include file for AT91SAM9x5 SoC with - * 2 TC blocks. - * - * Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com> - * - * Licensed under GPLv2. - */ - -#include <dt-bindings/pinctrl/at91.h> -#include <dt-bindings/interrupt-controller/irq.h> - -/ { - aliases { - tcb1 = &tcb1; - }; - - ahb { - apb { - tcb1: timer@f8014000 { - compatible = "atmel,at91sam9x5-tcb"; - reg = <0xf8014000 0x100>; - interrupts = <27 IRQ_TYPE_LEVEL_HIGH 0>; - }; - }; - }; -}; diff --git a/arch/arm/boot/dts/sama5d3_uart.dtsi b/arch/arm/boot/dts/sama5d3_uart.dtsi deleted file mode 100644 index 98fcb2d..0000000 --- a/arch/arm/boot/dts/sama5d3_uart.dtsi +++ /dev/null @@ -1,53 +0,0 @@ -/* - * at91sama5d3_uart.dtsi - Device Tree Include file for AT91SAM9x5 SoC with - * UART support - * - * Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com> - * - * Licensed under GPLv2. - */ - -#include <dt-bindings/pinctrl/at91.h> -#include <dt-bindings/interrupt-controller/irq.h> - -/ { - ahb { - apb { - pinctrl@fffff200 { - uart0 { - pinctrl_uart0: uart0-0 { - atmel,pins = - <AT91_PIOC 29 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC29 periph A, conflicts with PWMFI2, ISI_D8 */ - AT91_PIOC 30 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PC30 periph A with pullup, conflicts with ISI_PCK */ - }; - }; - - uart1 { - pinctrl_uart1: uart1-0 { - atmel,pins = - <AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA30 periph B, conflicts with TWD0, ISI_VSYNC */ - AT91_PIOA 31 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA31 periph B with pullup, conflicts with TWCK0, ISI_HSYNC */ - }; - }; - }; - - uart0: serial@f0024000 { - compatible = "atmel,at91sam9260-usart"; - reg = <0xf0024000 0x200>; - interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart0>; - status = "disabled"; - }; - - uart1: serial@f8028000 { - compatible = "atmel,at91sam9260-usart"; - reg = <0xf8028000 0x200>; - interrupts = <17 IRQ_TYPE_LEVEL_HIGH 5>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart1>; - status = "disabled"; - }; - }; - }; -}; diff --git a/arch/arm/boot/dts/sama5d3xcm.dtsi b/arch/arm/boot/dts/sama5d3xcm.dtsi index 726a0f3..31ed9e3 100644 --- a/arch/arm/boot/dts/sama5d3xcm.dtsi +++ b/arch/arm/boot/dts/sama5d3xcm.dtsi @@ -6,6 +6,7 @@ * * Licensed under GPLv2 or later. */ +#include "sama5d3.dtsi" / { compatible = "atmel,samad3xcm", "atmel,sama5d3", "atmel,sama5"; diff --git a/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts b/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts index 8ee06dd..2122306 100644 --- a/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts +++ b/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts @@ -108,7 +108,6 @@ }; &i2c0 { - status = "okay"; as3711@40 { compatible = "ams,as3711"; reg = <0x40>; @@ -184,7 +183,6 @@ &i2c3 { pinctrl-0 = <&i2c3_pins>; pinctrl-names = "default"; - status = "okay"; }; &mmcif { diff --git a/arch/arm/boot/dts/sh73a0.dtsi b/arch/arm/boot/dts/sh73a0.dtsi index fcf2688..3955c76 100644 --- a/arch/arm/boot/dts/sh73a0.dtsi +++ b/arch/arm/boot/dts/sh73a0.dtsi @@ -135,7 +135,6 @@ 0 168 0x4 0 169 0x4 0 170 0x4>; - status = "disabled"; }; i2c1: i2c@e6822000 { @@ -148,7 +147,6 @@ 0 52 0x4 0 53 0x4 0 54 0x4>; - status = "disabled"; }; i2c2: i2c@e6824000 { @@ -161,7 +159,6 @@ 0 172 0x4 0 173 0x4 0 174 0x4>; - status = "disabled"; }; i2c3: i2c@e6826000 { @@ -174,7 +171,6 @@ 0 184 0x4 0 185 0x4 0 186 0x4>; - status = "disabled"; }; i2c4: i2c@e6828000 { @@ -187,7 +183,6 @@ 0 188 0x4 0 189 0x4 0 190 0x4>; - status = "disabled"; }; mmcif: mmcif@e6bd0000 { diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi index f936476..e273fa9 100644 --- a/arch/arm/boot/dts/socfpga.dtsi +++ b/arch/arm/boot/dts/socfpga.dtsi @@ -147,7 +147,7 @@ reg = <0x58>; }; - cfg_h2f_usr0_clk: cfg_h2f_usr0_clk { + cfg_s2f_usr0_clk: cfg_s2f_usr0_clk { #clock-cells = <0>; compatible = "altr,socfpga-perip-clk"; clocks = <&main_pll>; @@ -198,7 +198,7 @@ reg = <0x98>; }; - h2f_usr1_clk: h2f_usr1_clk { + s2f_usr1_clk: s2f_usr1_clk { #clock-cells = <0>; compatible = "altr,socfpga-perip-clk"; clocks = <&periph_pll>; @@ -235,7 +235,7 @@ reg = <0xD0>; }; - h2f_usr2_clk: h2f_usr2_clk { + s2f_usr2_clk: s2f_usr2_clk { #clock-cells = <0>; compatible = "altr,socfpga-perip-clk"; clocks = <&sdram_pll>; @@ -243,198 +243,197 @@ }; }; - mpu_periph_clk: mpu_periph_clk { - #clock-cells = <0>; - compatible = "altr,socfpga-perip-clk"; - clocks = <&mpuclk>; - fixed-divider = <4>; + mpu_periph_clk: mpu_periph_clk { + #clock-cells = <0>; + compatible = "altr,socfpga-gate-clk"; + clocks = <&mpuclk>; + fixed-divider = <4>; }; - mpu_l2_ram_clk: mpu_l2_ram_clk { - #clock-cells = <0>; - compatible = "altr,socfpga-perip-clk"; - clocks = <&mpuclk>; - fixed-divider = <2>; + mpu_l2_ram_clk: mpu_l2_ram_clk { + #clock-cells = <0>; + compatible = "altr,socfpga-gate-clk"; + clocks = <&mpuclk>; + fixed-divider = <2>; }; - l4_main_clk: l4_main_clk { - #clock-cells = <0>; - compatible = "altr,socfpga-gate-clk"; - clocks = <&mainclk>; - clk-gate = <0x60 0>; + l4_main_clk: l4_main_clk { + #clock-cells = <0>; + compatible = "altr,socfpga-gate-clk"; + clocks = <&mainclk>; + clk-gate = <0x60 0>; }; - l3_main_clk: l3_main_clk { - #clock-cells = <0>; - compatible = "altr,socfpga-perip-clk"; - clocks = <&mainclk>; - fixed-divider = <1>; + l3_main_clk: l3_main_clk { + #clock-cells = <0>; + compatible = "altr,socfpga-gate-clk"; + clocks = <&mainclk>; }; - l3_mp_clk: l3_mp_clk { - #clock-cells = <0>; - compatible = "altr,socfpga-gate-clk"; - clocks = <&mainclk>; - div-reg = <0x64 0 2>; - clk-gate = <0x60 1>; + l3_mp_clk: l3_mp_clk { + #clock-cells = <0>; + compatible = "altr,socfpga-gate-clk"; + clocks = <&mainclk>; + div-reg = <0x64 0 2>; + clk-gate = <0x60 1>; }; - l3_sp_clk: l3_sp_clk { - #clock-cells = <0>; - compatible = "altr,socfpga-gate-clk"; - clocks = <&mainclk>; - div-reg = <0x64 2 2>; - }; + l3_sp_clk: l3_sp_clk { + #clock-cells = <0>; + compatible = "altr,socfpga-gate-clk"; + clocks = <&mainclk>; + div-reg = <0x64 2 2>; + }; - l4_mp_clk: l4_mp_clk { - #clock-cells = <0>; - compatible = "altr,socfpga-gate-clk"; - clocks = <&mainclk>, <&per_base_clk>; - div-reg = <0x64 4 3>; - clk-gate = <0x60 2>; + l4_mp_clk: l4_mp_clk { + #clock-cells = <0>; + compatible = "altr,socfpga-gate-clk"; + clocks = <&mainclk>, <&per_base_clk>; + div-reg = <0x64 4 3>; + clk-gate = <0x60 2>; }; - l4_sp_clk: l4_sp_clk { - #clock-cells = <0>; - compatible = "altr,socfpga-gate-clk"; - clocks = <&mainclk>, <&per_base_clk>; - div-reg = <0x64 7 3>; - clk-gate = <0x60 3>; + l4_sp_clk: l4_sp_clk { + #clock-cells = <0>; + compatible = "altr,socfpga-gate-clk"; + clocks = <&mainclk>, <&per_base_clk>; + div-reg = <0x64 7 3>; + clk-gate = <0x60 3>; }; - dbg_at_clk: dbg_at_clk { - #clock-cells = <0>; - compatible = "altr,socfpga-gate-clk"; - clocks = <&dbg_base_clk>; - div-reg = <0x68 0 2>; - clk-gate = <0x60 4>; + dbg_at_clk: dbg_at_clk { + #clock-cells = <0>; + compatible = "altr,socfpga-gate-clk"; + clocks = <&dbg_base_clk>; + div-reg = <0x68 0 2>; + clk-gate = <0x60 4>; }; - dbg_clk: dbg_clk { - #clock-cells = <0>; - compatible = "altr,socfpga-gate-clk"; - clocks = <&dbg_base_clk>; - div-reg = <0x68 2 2>; - clk-gate = <0x60 5>; + dbg_clk: dbg_clk { + #clock-cells = <0>; + compatible = "altr,socfpga-gate-clk"; + clocks = <&dbg_base_clk>; + div-reg = <0x68 2 2>; + clk-gate = <0x60 5>; }; - dbg_trace_clk: dbg_trace_clk { - #clock-cells = <0>; - compatible = "altr,socfpga-gate-clk"; - clocks = <&dbg_base_clk>; - div-reg = <0x6C 0 3>; - clk-gate = <0x60 6>; + dbg_trace_clk: dbg_trace_clk { + #clock-cells = <0>; + compatible = "altr,socfpga-gate-clk"; + clocks = <&dbg_base_clk>; + div-reg = <0x6C 0 3>; + clk-gate = <0x60 6>; }; - dbg_timer_clk: dbg_timer_clk { - #clock-cells = <0>; - compatible = "altr,socfpga-gate-clk"; - clocks = <&dbg_base_clk>; - clk-gate = <0x60 7>; + dbg_timer_clk: dbg_timer_clk { + #clock-cells = <0>; + compatible = "altr,socfpga-gate-clk"; + clocks = <&dbg_base_clk>; + clk-gate = <0x60 7>; }; - cfg_clk: cfg_clk { - #clock-cells = <0>; - compatible = "altr,socfpga-gate-clk"; - clocks = <&cfg_h2f_usr0_clk>; - clk-gate = <0x60 8>; + cfg_clk: cfg_clk { + #clock-cells = <0>; + compatible = "altr,socfpga-gate-clk"; + clocks = <&cfg_s2f_usr0_clk>; + clk-gate = <0x60 8>; }; - h2f_user0_clk: h2f_user0_clk { - #clock-cells = <0>; - compatible = "altr,socfpga-gate-clk"; - clocks = <&cfg_h2f_usr0_clk>; - clk-gate = <0x60 9>; + s2f_user0_clk: s2f_user0_clk { + #clock-cells = <0>; + compatible = "altr,socfpga-gate-clk"; + clocks = <&cfg_s2f_usr0_clk>; + clk-gate = <0x60 9>; }; - emac_0_clk: emac_0_clk { - #clock-cells = <0>; - compatible = "altr,socfpga-gate-clk"; - clocks = <&emac0_clk>; - clk-gate = <0xa0 0>; + emac_0_clk: emac_0_clk { + #clock-cells = <0>; + compatible = "altr,socfpga-gate-clk"; + clocks = <&emac0_clk>; + clk-gate = <0xa0 0>; }; - emac_1_clk: emac_1_clk { - #clock-cells = <0>; - compatible = "altr,socfpga-gate-clk"; - clocks = <&emac1_clk>; - clk-gate = <0xa0 1>; + emac_1_clk: emac_1_clk { + #clock-cells = <0>; + compatible = "altr,socfpga-gate-clk"; + clocks = <&emac1_clk>; + clk-gate = <0xa0 1>; }; - usb_mp_clk: usb_mp_clk { - #clock-cells = <0>; - compatible = "altr,socfpga-gate-clk"; - clocks = <&per_base_clk>; - clk-gate = <0xa0 2>; - div-reg = <0xa4 0 3>; + usb_mp_clk: usb_mp_clk { + #clock-cells = <0>; + compatible = "altr,socfpga-gate-clk"; + clocks = <&per_base_clk>; + clk-gate = <0xa0 2>; + div-reg = <0xa4 0 3>; }; - spi_m_clk: spi_m_clk { - #clock-cells = <0>; - compatible = "altr,socfpga-gate-clk"; - clocks = <&per_base_clk>; - clk-gate = <0xa0 3>; - div-reg = <0xa4 3 3>; + spi_m_clk: spi_m_clk { + #clock-cells = <0>; + compatible = "altr,socfpga-gate-clk"; + clocks = <&per_base_clk>; + clk-gate = <0xa0 3>; + div-reg = <0xa4 3 3>; }; - can0_clk: can0_clk { - #clock-cells = <0>; - compatible = "altr,socfpga-gate-clk"; - clocks = <&per_base_clk>; - clk-gate = <0xa0 4>; - div-reg = <0xa4 6 3>; + can0_clk: can0_clk { + #clock-cells = <0>; + compatible = "altr,socfpga-gate-clk"; + clocks = <&per_base_clk>; + clk-gate = <0xa0 4>; + div-reg = <0xa4 6 3>; }; - can1_clk: can1_clk { - #clock-cells = <0>; - compatible = "altr,socfpga-gate-clk"; - clocks = <&per_base_clk>; - clk-gate = <0xa0 5>; - div-reg = <0xa4 9 3>; + can1_clk: can1_clk { + #clock-cells = <0>; + compatible = "altr,socfpga-gate-clk"; + clocks = <&per_base_clk>; + clk-gate = <0xa0 5>; + div-reg = <0xa4 9 3>; }; - gpio_db_clk: gpio_db_clk { - #clock-cells = <0>; - compatible = "altr,socfpga-gate-clk"; - clocks = <&per_base_clk>; - clk-gate = <0xa0 6>; - div-reg = <0xa8 0 24>; + gpio_db_clk: gpio_db_clk { + #clock-cells = <0>; + compatible = "altr,socfpga-gate-clk"; + clocks = <&per_base_clk>; + clk-gate = <0xa0 6>; + div-reg = <0xa8 0 24>; }; - h2f_user1_clk: h2f_user1_clk { - #clock-cells = <0>; - compatible = "altr,socfpga-gate-clk"; - clocks = <&h2f_usr1_clk>; - clk-gate = <0xa0 7>; + s2f_user1_clk: s2f_user1_clk { + #clock-cells = <0>; + compatible = "altr,socfpga-gate-clk"; + clocks = <&s2f_usr1_clk>; + clk-gate = <0xa0 7>; }; - sdmmc_clk: sdmmc_clk { - #clock-cells = <0>; - compatible = "altr,socfpga-gate-clk"; - clocks = <&f2s_periph_ref_clk>, <&main_nand_sdmmc_clk>, <&per_nand_mmc_clk>; - clk-gate = <0xa0 8>; + sdmmc_clk: sdmmc_clk { + #clock-cells = <0>; + compatible = "altr,socfpga-gate-clk"; + clocks = <&f2s_periph_ref_clk>, <&main_nand_sdmmc_clk>, <&per_nand_mmc_clk>; + clk-gate = <0xa0 8>; }; - nand_x_clk: nand_x_clk { - #clock-cells = <0>; - compatible = "altr,socfpga-gate-clk"; - clocks = <&f2s_periph_ref_clk>, <&main_nand_sdmmc_clk>, <&per_nand_mmc_clk>; - clk-gate = <0xa0 9>; + nand_x_clk: nand_x_clk { + #clock-cells = <0>; + compatible = "altr,socfpga-gate-clk"; + clocks = <&f2s_periph_ref_clk>, <&main_nand_sdmmc_clk>, <&per_nand_mmc_clk>; + clk-gate = <0xa0 9>; }; - nand_clk: nand_clk { - #clock-cells = <0>; - compatible = "altr,socfpga-gate-clk"; - clocks = <&f2s_periph_ref_clk>, <&main_nand_sdmmc_clk>, <&per_nand_mmc_clk>; - clk-gate = <0xa0 10>; - fixed-divider = <4>; + nand_clk: nand_clk { + #clock-cells = <0>; + compatible = "altr,socfpga-gate-clk"; + clocks = <&f2s_periph_ref_clk>, <&main_nand_sdmmc_clk>, <&per_nand_mmc_clk>; + clk-gate = <0xa0 10>; + fixed-divider = <4>; }; - qspi_clk: qspi_clk { - #clock-cells = <0>; - compatible = "altr,socfpga-gate-clk"; - clocks = <&f2s_periph_ref_clk>, <&main_qspi_clk>, <&per_qspi_clk>; - clk-gate = <0xa0 11>; + qspi_clk: qspi_clk { + #clock-cells = <0>; + compatible = "altr,socfpga-gate-clk"; + clocks = <&f2s_periph_ref_clk>, <&main_qspi_clk>, <&per_qspi_clk>; + clk-gate = <0xa0 11>; }; }; }; @@ -474,7 +473,6 @@ compatible = "arm,cortex-a9-twd-timer"; reg = <0xfffec600 0x100>; interrupts = <1 13 0xf04>; - clocks = <&mpu_periph_clk>; }; timer0: timer0@ffc08000 { @@ -518,9 +516,9 @@ }; rstmgr@ffd05000 { - compatible = "altr,rst-mgr"; - reg = <0xffd05000 0x1000>; - }; + compatible = "altr,rst-mgr"; + reg = <0xffd05000 0x1000>; + }; sysmgr@ffd08000 { compatible = "altr,sys-mgr"; diff --git a/arch/arm/boot/dts/socfpga_arria5.dtsi b/arch/arm/boot/dts/socfpga_arria5.dtsi deleted file mode 100644 index a85b404..0000000 --- a/arch/arm/boot/dts/socfpga_arria5.dtsi +++ /dev/null @@ -1,58 +0,0 @@ -/* - * Copyright (C) 2013 Altera Corporation <www.altera.com> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program. If not, see <http://www.gnu.org/licenses/>. - */ - -/dts-v1/; -/include/ "socfpga.dtsi" - -/ { - soc { - clkmgr@ffd04000 { - clocks { - osc1 { - clock-frequency = <25000000>; - }; - }; - }; - - serial0@ffc02000 { - clock-frequency = <100000000>; - }; - - serial1@ffc03000 { - clock-frequency = <100000000>; - }; - - sysmgr@ffd08000 { - cpu1-start-addr = <0xffd080c4>; - }; - - timer0@ffc08000 { - clock-frequency = <100000000>; - }; - - timer1@ffc09000 { - clock-frequency = <100000000>; - }; - - timer2@ffd00000 { - clock-frequency = <25000000>; - }; - - timer3@ffd01000 { - clock-frequency = <25000000>; - }; - }; -}; diff --git a/arch/arm/boot/dts/socfpga_arria5_socdk.dts b/arch/arm/boot/dts/socfpga_arria5_socdk.dts deleted file mode 100644 index 5beffb2..0000000 --- a/arch/arm/boot/dts/socfpga_arria5_socdk.dts +++ /dev/null @@ -1,40 +0,0 @@ -/* - * Copyright (C) 2013 Altera Corporation <www.altera.com> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see <http://www.gnu.org/licenses/>. - */ - -/include/ "socfpga_arria5.dtsi" - -/ { - model = "Altera SOCFPGA Arria V SoC Development Kit"; - compatible = "altr,socfpga-arria5", "altr,socfpga"; - - chosen { - bootargs = "console=ttyS0,115200"; - }; - - memory { - name = "memory"; - device_type = "memory"; - reg = <0x0 0x40000000>; /* 1GB */ - }; - - aliases { - /* this allow the ethaddr uboot environmnet variable contents - * to be added to the gmac1 device tree blob. - */ - ethernet0 = &gmac1; - }; -}; diff --git a/arch/arm/boot/dts/socfpga_cyclone5.dtsi b/arch/arm/boot/dts/socfpga_cyclone5.dts index a8716f6..973999d 100644 --- a/arch/arm/boot/dts/socfpga_cyclone5.dtsi +++ b/arch/arm/boot/dts/socfpga_cyclone5.dts @@ -19,6 +19,26 @@ /include/ "socfpga.dtsi" / { + model = "Altera SOCFPGA Cyclone V"; + compatible = "altr,socfpga-cyclone5", "altr,socfpga"; + + chosen { + bootargs = "console=ttyS0,57600"; + }; + + memory { + name = "memory"; + device_type = "memory"; + reg = <0x0 0x40000000>; /* 1GB */ + }; + + aliases { + /* this allow the ethaddr uboot environmnet variable contents + * to be added to the gmac1 device tree blob. + */ + ethernet0 = &gmac1; + }; + soc { clkmgr@ffd04000 { clocks { diff --git a/arch/arm/boot/dts/socfpga_cyclone5_socdk.dts b/arch/arm/boot/dts/socfpga_cyclone5_socdk.dts deleted file mode 100644 index 2ee52ab..0000000 --- a/arch/arm/boot/dts/socfpga_cyclone5_socdk.dts +++ /dev/null @@ -1,40 +0,0 @@ -/* - * Copyright (C) 2012 Altera Corporation <www.altera.com> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see <http://www.gnu.org/licenses/>. - */ - -/include/ "socfpga_cyclone5.dtsi" - -/ { - model = "Altera SOCFPGA Cyclone V SoC Development Kit"; - compatible = "altr,socfpga-cyclone5", "altr,socfpga"; - - chosen { - bootargs = "console=ttyS0,115200"; - }; - - memory { - name = "memory"; - device_type = "memory"; - reg = <0x0 0x40000000>; /* 1GB */ - }; - - aliases { - /* this allow the ethaddr uboot environmnet variable contents - * to be added to the gmac1 device tree blob. - */ - ethernet0 = &gmac1; - }; -}; diff --git a/arch/arm/boot/dts/socfpga_cyclone5_sockit.dts b/arch/arm/boot/dts/socfpga_cyclone5_sockit.dts deleted file mode 100644 index 50b99a2..0000000 --- a/arch/arm/boot/dts/socfpga_cyclone5_sockit.dts +++ /dev/null @@ -1,37 +0,0 @@ -/* - * Copyright (C) 2013 Steffen Trumtrar <s.trumtrar@pengutronix.de> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see <http://www.gnu.org/licenses/>. - */ - -/include/ "socfpga_cyclone5.dtsi" - -/ { - model = "Terasic SoCkit"; - compatible = "altr,socfpga-cyclone5", "altr,socfpga"; - - chosen { - bootargs = "console=ttyS0,115200"; - }; - - memory { - name = "memory"; - device_type = "memory"; - reg = <0x0 0x40000000>; /* 1GB */ - }; -}; - -&gmac1 { - status = "okay"; -}; diff --git a/arch/arm/boot/dts/ste-dbx5x0.dtsi b/arch/arm/boot/dts/ste-dbx5x0.dtsi index 7da99fe..1c1091e 100644 --- a/arch/arm/boot/dts/ste-dbx5x0.dtsi +++ b/arch/arm/boot/dts/ste-dbx5x0.dtsi @@ -10,7 +10,6 @@ */ #include <dt-bindings/interrupt-controller/irq.h> -#include <dt-bindings/mfd/dbx500-prcmu.h> #include "skeleton.dtsi" / { @@ -43,56 +42,16 @@ interrupts = <0 7 IRQ_TYPE_LEVEL_HIGH>; }; - - clocks { - compatible = "stericsson,u8500-clks"; - - prcmu_clk: prcmu-clock { - #clock-cells = <1>; - }; - - prcc_pclk: prcc-periph-clock { - #clock-cells = <2>; - }; - - prcc_kclk: prcc-kernel-clock { - #clock-cells = <2>; - }; - - rtc_clk: rtc32k-clock { - #clock-cells = <0>; - }; - - smp_twd_clk: smp-twd-clock { - #clock-cells = <0>; - }; - }; - - mtu@a03c6000 { - /* Nomadik System Timer */ - compatible = "st,nomadik-mtu"; - reg = <0xa03c6000 0x1000>; - interrupts = <0 4 IRQ_TYPE_LEVEL_HIGH>; - - clocks = <&prcmu_clk PRCMU_TIMCLK>, <&prcc_pclk 6 6>; - clock-names = "timclk", "apb_pclk"; - }; - timer@a0410600 { compatible = "arm,cortex-a9-twd-timer"; reg = <0xa0410600 0x20>; interrupts = <1 13 0x304>; /* IRQ level high per-CPU */ - - clocks = <&smp_twd_clk>; }; rtc@80154000 { compatible = "arm,rtc-pl031", "arm,primecell"; reg = <0x80154000 0x1000>; interrupts = <0 18 IRQ_TYPE_LEVEL_HIGH>; - - clocks = <&rtc_clk>; - clock-names = "apb_pclk"; }; gpio0: gpio@8012e000 { @@ -106,8 +65,6 @@ gpio-controller; #gpio-cells = <2>; gpio-bank = <0>; - - clocks = <&prcc_pclk 1 9>; }; gpio1: gpio@8012e080 { @@ -121,8 +78,6 @@ gpio-controller; #gpio-cells = <2>; gpio-bank = <1>; - - clocks = <&prcc_pclk 1 9>; }; gpio2: gpio@8000e000 { @@ -136,8 +91,6 @@ gpio-controller; #gpio-cells = <2>; gpio-bank = <2>; - - clocks = <&prcc_pclk 3 8>; }; gpio3: gpio@8000e080 { @@ -151,8 +104,6 @@ gpio-controller; #gpio-cells = <2>; gpio-bank = <3>; - - clocks = <&prcc_pclk 3 8>; }; gpio4: gpio@8000e100 { @@ -166,8 +117,6 @@ gpio-controller; #gpio-cells = <2>; gpio-bank = <4>; - - clocks = <&prcc_pclk 3 8>; }; gpio5: gpio@8000e180 { @@ -181,8 +130,6 @@ gpio-controller; #gpio-cells = <2>; gpio-bank = <5>; - - clocks = <&prcc_pclk 3 8>; }; gpio6: gpio@8011e000 { @@ -196,8 +143,6 @@ gpio-controller; #gpio-cells = <2>; gpio-bank = <6>; - - clocks = <&prcc_pclk 2 11>; }; gpio7: gpio@8011e080 { @@ -211,8 +156,6 @@ gpio-controller; #gpio-cells = <2>; gpio-bank = <7>; - - clocks = <&prcc_pclk 2 11>; }; gpio8: gpio@a03fe000 { @@ -226,8 +169,6 @@ gpio-controller; #gpio-cells = <2>; gpio-bank = <8>; - - clocks = <&prcc_pclk 5 1>; }; pinctrl { @@ -236,7 +177,8 @@ }; usb_per5@a03e0000 { - compatible = "stericsson,db8500-musb"; + compatible = "stericsson,db8500-musb", + "mentor,musb"; reg = <0xa03e0000 0x10000>; interrupts = <0 23 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "mc"; @@ -268,8 +210,6 @@ "iep_6_14", "oep_6_14", "iep_7_15", "oep_7_15", "iep_8", "oep_8"; - - clocks = <&prcc_pclk 5 0>; }; dma: dma-controller@801C0000 { @@ -280,8 +220,6 @@ #dma-cells = <3>; memcpy-channels = <56 57 58 59 60>; - - clocks = <&prcmu_clk PRCMU_DMACLK>; }; prcmu: prcmu@80157000 { @@ -300,13 +238,6 @@ reg = <0x80157450 0xC>; }; - cpufreq { - compatible = "stericsson,cpufreq-ux500"; - clocks = <&prcmu_clk PRCMU_ARMSS>; - clock-names = "armss"; - status = "disabled"; - }; - thermal@801573c0 { compatible = "stericsson,db8500-thermal"; reg = <0x801573c0 0x40>; @@ -628,74 +559,65 @@ compatible = "stericsson,db8500-i2c", "st,nomadik-i2c", "arm,primecell"; reg = <0x80004000 0x1000>; interrupts = <0 21 IRQ_TYPE_LEVEL_HIGH>; + arm,primecell-periphid = <0x180024>; #address-cells = <1>; #size-cells = <0>; v-i2c-supply = <&db8500_vape_reg>; clock-frequency = <400000>; - clocks = <&prcc_kclk 3 3>, <&prcc_pclk 3 3>; - clock-names = "i2cclk", "apb_pclk"; }; i2c@80122000 { compatible = "stericsson,db8500-i2c", "st,nomadik-i2c", "arm,primecell"; reg = <0x80122000 0x1000>; interrupts = <0 22 IRQ_TYPE_LEVEL_HIGH>; + arm,primecell-periphid = <0x180024>; #address-cells = <1>; #size-cells = <0>; v-i2c-supply = <&db8500_vape_reg>; clock-frequency = <400000>; - - clocks = <&prcc_kclk 1 2>, <&prcc_pclk 1 2>; - clock-names = "i2cclk", "apb_pclk"; }; i2c@80128000 { compatible = "stericsson,db8500-i2c", "st,nomadik-i2c", "arm,primecell"; reg = <0x80128000 0x1000>; interrupts = <0 55 IRQ_TYPE_LEVEL_HIGH>; + arm,primecell-periphid = <0x180024>; #address-cells = <1>; #size-cells = <0>; v-i2c-supply = <&db8500_vape_reg>; clock-frequency = <400000>; - - clocks = <&prcc_kclk 1 6>, <&prcc_pclk 1 6>; - clock-names = "i2cclk", "apb_pclk"; }; i2c@80110000 { compatible = "stericsson,db8500-i2c", "st,nomadik-i2c", "arm,primecell"; reg = <0x80110000 0x1000>; interrupts = <0 12 IRQ_TYPE_LEVEL_HIGH>; + arm,primecell-periphid = <0x180024>; #address-cells = <1>; #size-cells = <0>; v-i2c-supply = <&db8500_vape_reg>; clock-frequency = <400000>; - - clocks = <&prcc_kclk 2 0>, <&prcc_pclk 2 0>; - clock-names = "i2cclk", "apb_pclk"; }; i2c@8012a000 { compatible = "stericsson,db8500-i2c", "st,nomadik-i2c", "arm,primecell"; reg = <0x8012a000 0x1000>; interrupts = <0 51 IRQ_TYPE_LEVEL_HIGH>; + arm,primecell-periphid = <0x180024>; #address-cells = <1>; #size-cells = <0>; v-i2c-supply = <&db8500_vape_reg>; clock-frequency = <400000>; - - clocks = <&prcc_kclk 1 9>, <&prcc_pclk 1 10>; - clock-names = "i2cclk", "apb_pclk"; }; ssp@80002000 { @@ -704,80 +626,7 @@ interrupts = <0 14 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; - clocks = <&prcc_kclk 3 1>, <&prcc_pclk 3 1>; - clock-names = "ssp0clk", "apb_pclk"; - dmas = <&dma 8 0 0x2>, /* Logical - DevToMem */ - <&dma 8 0 0x0>; /* Logical - MemToDev */ - dma-names = "rx", "tx"; - }; - - ssp@80003000 { - compatible = "arm,pl022", "arm,primecell"; - reg = <0x80003000 0x1000>; - interrupts = <0 52 IRQ_TYPE_LEVEL_HIGH>; - #address-cells = <1>; - #size-cells = <0>; - clocks = <&prcc_kclk 3 2>, <&prcc_pclk 3 2>; - clock-names = "ssp1clk", "apb_pclk"; - dmas = <&dma 9 0 0x2>, /* Logical - DevToMem */ - <&dma 9 0 0x0>; /* Logical - MemToDev */ - dma-names = "rx", "tx"; - }; - - spi@8011a000 { - compatible = "arm,pl022", "arm,primecell"; - reg = <0x8011a000 0x1000>; - interrupts = <0 8 IRQ_TYPE_LEVEL_HIGH>; - #address-cells = <1>; - #size-cells = <0>; - /* Same clock wired to kernel and pclk */ - clocks = <&prcc_pclk 2 8>, <&prcc_pclk 2 8>; - clock-names = "spi0clk", "apb_pclk"; - dmas = <&dma 0 0 0x2>, /* Logical - DevToMem */ - <&dma 0 0 0x0>; /* Logical - MemToDev */ - dma-names = "rx", "tx"; - }; - - spi@80112000 { - compatible = "arm,pl022", "arm,primecell"; - reg = <0x80112000 0x1000>; - interrupts = <0 96 IRQ_TYPE_LEVEL_HIGH>; - #address-cells = <1>; - #size-cells = <0>; - /* Same clock wired to kernel and pclk */ - clocks = <&prcc_pclk 2 2>, <&prcc_pclk 2 2>; - clock-names = "spi1clk", "apb_pclk"; - dmas = <&dma 35 0 0x2>, /* Logical - DevToMem */ - <&dma 35 0 0x0>; /* Logical - MemToDev */ - dma-names = "rx", "tx"; - }; - - spi@80111000 { - compatible = "arm,pl022", "arm,primecell"; - reg = <0x80111000 0x1000>; - interrupts = <0 6 IRQ_TYPE_LEVEL_HIGH>; - #address-cells = <1>; - #size-cells = <0>; - /* Same clock wired to kernel and pclk */ - clocks = <&prcc_pclk 2 1>, <&prcc_pclk 2 1>; - clock-names = "spi2clk", "apb_pclk"; - dmas = <&dma 33 0 0x2>, /* Logical - DevToMem */ - <&dma 33 0 0x0>; /* Logical - MemToDev */ - dma-names = "rx", "tx"; - }; - - spi@80129000 { - compatible = "arm,pl022", "arm,primecell"; - reg = <0x80129000 0x1000>; - interrupts = <0 49 IRQ_TYPE_LEVEL_HIGH>; - #address-cells = <1>; - #size-cells = <0>; - /* Same clock wired to kernel and pclk */ - clocks = <&prcc_pclk 1 7>, <&prcc_pclk 1 7>; - clock-names = "spi3clk", "apb_pclk"; - dmas = <&dma 40 0 0x2>, /* Logical - DevToMem */ - <&dma 40 0 0x0>; /* Logical - MemToDev */ - dma-names = "rx", "tx"; + status = "disabled"; }; uart@80120000 { @@ -789,9 +638,6 @@ <&dma 13 0 0x0>; /* Logical - MemToDev */ dma-names = "rx", "tx"; - clocks = <&prcc_kclk 1 0>, <&prcc_pclk 1 0>; - clock-names = "uart", "apb_pclk"; - status = "disabled"; }; @@ -804,9 +650,6 @@ <&dma 12 0 0x0>; /* Logical - MemToDev */ dma-names = "rx", "tx"; - clocks = <&prcc_kclk 1 1>, <&prcc_pclk 1 1>; - clock-names = "uart", "apb_pclk"; - status = "disabled"; }; @@ -819,9 +662,6 @@ <&dma 11 0 0x0>; /* Logical - MemToDev */ dma-names = "rx", "tx"; - clocks = <&prcc_kclk 3 6>, <&prcc_pclk 3 6>; - clock-names = "uart", "apb_pclk"; - status = "disabled"; }; @@ -834,9 +674,6 @@ <&dma 29 0 0x0>; /* Logical - MemToDev */ dma-names = "rx", "tx"; - clocks = <&prcc_kclk 1 5>, <&prcc_pclk 1 5>; - clock-names = "sdi", "apb_pclk"; - status = "disabled"; }; @@ -849,9 +686,6 @@ <&dma 32 0 0x0>; /* Logical - MemToDev */ dma-names = "rx", "tx"; - clocks = <&prcc_kclk 2 4>, <&prcc_pclk 2 6>; - clock-names = "sdi", "apb_pclk"; - status = "disabled"; }; @@ -864,9 +698,6 @@ <&dma 28 0 0x0>; /* Logical - MemToDev */ dma-names = "rx", "tx"; - clocks = <&prcc_kclk 3 4>, <&prcc_pclk 3 4>; - clock-names = "sdi", "apb_pclk"; - status = "disabled"; }; @@ -874,10 +705,6 @@ compatible = "arm,pl18x", "arm,primecell"; reg = <0x80119000 0x1000>; interrupts = <0 59 IRQ_TYPE_LEVEL_HIGH>; - - clocks = <&prcc_kclk 2 5>, <&prcc_pclk 2 7>; - clock-names = "sdi", "apb_pclk"; - status = "disabled"; }; @@ -890,9 +717,6 @@ <&dma 42 0 0x0>; /* Logical - MemToDev */ dma-names = "rx", "tx"; - clocks = <&prcc_kclk 2 2>, <&prcc_pclk 2 4>; - clock-names = "sdi", "apb_pclk"; - status = "disabled"; }; @@ -900,10 +724,6 @@ compatible = "arm,pl18x", "arm,primecell"; reg = <0x80008000 0x1000>; interrupts = <0 100 IRQ_TYPE_LEVEL_HIGH>; - - clocks = <&prcc_kclk 3 7>, <&prcc_pclk 3 7>; - clock-names = "sdi", "apb_pclk"; - status = "disabled"; }; @@ -912,10 +732,6 @@ reg = <0x80123000 0x1000>; interrupts = <0 31 IRQ_TYPE_LEVEL_HIGH>; v-ape-supply = <&db8500_vape_reg>; - - clocks = <&prcc_kclk 1 3>, <&prcc_pclk 1 3>; - clock-names = "msp", "apb_pclk"; - status = "disabled"; }; @@ -924,10 +740,6 @@ reg = <0x80124000 0x1000>; interrupts = <0 62 IRQ_TYPE_LEVEL_HIGH>; v-ape-supply = <&db8500_vape_reg>; - - clocks = <&prcc_kclk 1 4>, <&prcc_pclk 1 4>; - clock-names = "msp", "apb_pclk"; - status = "disabled"; }; @@ -937,10 +749,6 @@ reg = <0x80117000 0x1000>; interrupts = <0 98 IRQ_TYPE_LEVEL_HIGH>; v-ape-supply = <&db8500_vape_reg>; - - clocks = <&prcc_kclk 2 3>, <&prcc_pclk 2 5>; - clock-names = "msp", "apb_pclk"; - status = "disabled"; }; @@ -949,10 +757,6 @@ reg = <0x80125000 0x1000>; interrupts = <0 62 IRQ_TYPE_LEVEL_HIGH>; v-ape-supply = <&db8500_vape_reg>; - - clocks = <&prcc_kclk 1 10>, <&prcc_pclk 1 11>; - clock-names = "msp", "apb_pclk"; - status = "disabled"; }; @@ -968,7 +772,7 @@ cpufreq-cooling { compatible = "stericsson,db8500-cpufreq-cooling"; status = "disabled"; - }; + }; vmmci: regulator-gpio { compatible = "regulator-gpio"; @@ -993,7 +797,6 @@ interrupts = <0 15 IRQ_TYPE_LEVEL_HIGH>; v-ape-supply = <&db8500_vape_reg>; - clocks = <&prcc_pclk 6 1>; }; hash@a03c2000 { @@ -1001,7 +804,6 @@ reg = <0xa03c2000 0x1000>; v-ape-supply = <&db8500_vape_reg>; - clocks = <&prcc_pclk 6 2>; }; }; }; diff --git a/arch/arm/boot/dts/ste-href-tvk1281618.dtsi b/arch/arm/boot/dts/ste-href-tvk1281618.dtsi deleted file mode 100644 index 76d3ef1..0000000 --- a/arch/arm/boot/dts/ste-href-tvk1281618.dtsi +++ /dev/null @@ -1,41 +0,0 @@ -/* - * Copyright 2012 ST-Ericsson AB - * - * The code contained herein is licensed under the GNU General Public - * License. You may obtain a copy of the GNU General Public License - * Version 2 or later at the following locations: - * - * http://www.opensource.org/licenses/gpl-license.html - * http://www.gnu.org/copyleft/gpl.html - * - * Device Tree for the TVK1281618 UIB - */ - -#include <dt-bindings/interrupt-controller/irq.h> - -/ { - soc { - /* Add Synaptics touch screen, TC35892 keypad etc here */ - i2c@80004000 { - tc3589x@44 { - compatible = "tc3589x"; - reg = <0x44>; - interrupt-parent = <&gpio6>; - interrupts = <26 IRQ_TYPE_EDGE_RISING>; - - interrupt-controller; - #interrupt-cells = <2>; - - tc3589x_gpio { - compatible = "tc3589x-gpio"; - interrupts = <0 IRQ_TYPE_EDGE_RISING>; - - interrupt-controller; - #interrupt-cells = <2>; - gpio-controller; - #gpio-cells = <2>; - }; - }; - }; - }; -}; diff --git a/arch/arm/boot/dts/ste-href.dtsi b/arch/arm/boot/dts/ste-href.dtsi index aa3f020..370e03f 100644 --- a/arch/arm/boot/dts/ste-href.dtsi +++ b/arch/arm/boot/dts/ste-href.dtsi @@ -41,6 +41,28 @@ status = "okay"; }; + i2c@80004000 { + tc3589x@42 { + compatible = "tc3589x"; + reg = <0x42>; + interrupt-parent = <&gpio6>; + interrupts = <25 IRQ_TYPE_EDGE_RISING>; + + interrupt-controller; + #interrupt-cells = <2>; + + tc3589x_gpio: tc3589x_gpio { + compatible = "tc3589x-gpio"; + interrupts = <0 IRQ_TYPE_EDGE_RISING>; + + interrupt-controller; + #interrupt-cells = <2>; + gpio-controller; + #gpio-cells = <2>; + }; + }; + }; + i2c@80128000 { lp5521@33 { compatible = "national,lp5521"; @@ -50,7 +72,6 @@ chan0 { led-cur = /bits/ 8 <0x2f>; max-cur = /bits/ 8 <0x5f>; - linux,default-trigger = "heartbeat"; }; chan1 { led-cur = /bits/ 8 <0x2f>; @@ -81,7 +102,7 @@ }; bh1780@29 { compatible = "rohm,bh1780gli"; - reg = <0x29>; + reg = <0x33>; }; }; @@ -146,11 +167,89 @@ }; prcmu@80157000 { - ab8500 { - ab8500-gpio { - compatible = "stericsson,ab8500-gpio"; + db8500-prcmu-regulators { + db8500_vape_reg: db8500_vape { + regulator-name = "db8500-vape"; + }; + + db8500_varm_reg: db8500_varm { + regulator-name = "db8500-varm"; + }; + + db8500_vmodem_reg: db8500_vmodem { + regulator-name = "db8500-vmodem"; + }; + + db8500_vpll_reg: db8500_vpll { + regulator-name = "db8500-vpll"; + }; + + db8500_vsmps1_reg: db8500_vsmps1 { + regulator-name = "db8500-vsmps1"; + }; + + db8500_vsmps2_reg: db8500_vsmps2 { + regulator-name = "db8500-vsmps2"; + }; + + db8500_vsmps3_reg: db8500_vsmps3 { + regulator-name = "db8500-vsmps3"; + }; + + db8500_vrf1_reg: db8500_vrf1 { + regulator-name = "db8500-vrf1"; + }; + + db8500_sva_mmdsp_reg: db8500_sva_mmdsp { + regulator-name = "db8500-sva-mmdsp"; + }; + + db8500_sva_mmdsp_ret_reg: db8500_sva_mmdsp_ret { + regulator-name = "db8500-sva-mmdsp-ret"; + }; + + db8500_sva_pipe_reg: db8500_sva_pipe { + regulator-name = "db8500_sva_pipe"; + }; + + db8500_sia_mmdsp_reg: db8500_sia_mmdsp { + regulator-name = "db8500_sia_mmdsp"; + }; + + db8500_sia_mmdsp_ret_reg: db8500_sia_mmdsp_ret { + regulator-name = "db8500-sia-mmdsp-ret"; + }; + + db8500_sia_pipe_reg: db8500_sia_pipe { + regulator-name = "db8500-sia-pipe"; }; + db8500_sga_reg: db8500_sga { + regulator-name = "db8500-sga"; + }; + + db8500_b2r2_mcde_reg: db8500_b2r2_mcde { + regulator-name = "db8500-b2r2-mcde"; + }; + + db8500_esram12_reg: db8500_esram12 { + regulator-name = "db8500-esram12"; + }; + + db8500_esram12_ret_reg: db8500_esram12_ret { + regulator-name = "db8500-esram12-ret"; + }; + + db8500_esram34_reg: db8500_esram34 { + regulator-name = "db8500-esram34"; + }; + + db8500_esram34_ret_reg: db8500_esram34_ret { + regulator-name = "db8500-esram34-ret"; + }; + }; + + ab8500 { ab8500-regulators { ab8500_ldo_aux1_reg: ab8500_ldo_aux1 { regulator-name = "V-DISPLAY"; diff --git a/arch/arm/boot/dts/ste-hrefprev60-stuib.dts b/arch/arm/boot/dts/ste-hrefprev60-stuib.dts deleted file mode 100644 index 2b1cb5b..0000000 --- a/arch/arm/boot/dts/ste-hrefprev60-stuib.dts +++ /dev/null @@ -1,34 +0,0 @@ -/* - * Copyright 2012 ST-Ericsson AB - * - * The code contained herein is licensed under the GNU General Public - * License. You may obtain a copy of the GNU General Public License - * Version 2 or later at the following locations: - * - * http://www.opensource.org/licenses/gpl-license.html - * http://www.gnu.org/copyleft/gpl.html - */ - -/dts-v1/; -#include "ste-hrefprev60.dtsi" -#include "ste-href-stuib.dtsi" - -/ { - model = "ST-Ericsson HREF (pre-v60) and ST UIB"; - compatible = "st-ericsson,mop500", "st-ericsson,u8500"; - - soc { - /* Reset line for the BU21013 touchscreen */ - i2c@80110000 { - /* Only one of these will be used */ - bu21013_tp@5c { - touch-gpio = <&gpio2 12 0x4>; - reset-gpio = <&tc3589x_gpio 13 0x4>; - }; - bu21013_tp@5d { - touch-gpio = <&gpio2 12 0x4>; - reset-gpio = <&tc3589x_gpio 13 0x4>; - }; - }; - }; -}; diff --git a/arch/arm/boot/dts/ste-hrefprev60-tvk.dts b/arch/arm/boot/dts/ste-hrefprev60-tvk.dts deleted file mode 100644 index 59523f8..0000000 --- a/arch/arm/boot/dts/ste-hrefprev60-tvk.dts +++ /dev/null @@ -1,19 +0,0 @@ -/* - * Copyright 2012 ST-Ericsson AB - * - * The code contained herein is licensed under the GNU General Public - * License. You may obtain a copy of the GNU General Public License - * Version 2 or later at the following locations: - * - * http://www.opensource.org/licenses/gpl-license.html - * http://www.gnu.org/copyleft/gpl.html - */ - -/dts-v1/; -#include "ste-hrefprev60.dtsi" -#include "ste-href-tvk1281618.dtsi" - -/ { - model = "ST-Ericsson HREF (pre-v60) and TVK1281618 UIB"; - compatible = "st-ericsson,mop500", "st-ericsson,u8500"; -}; diff --git a/arch/arm/boot/dts/ste-hrefprev60.dtsi b/arch/arm/boot/dts/ste-hrefprev60.dts index b2cd7bc..d8d3b99 100644 --- a/arch/arm/boot/dts/ste-hrefprev60.dtsi +++ b/arch/arm/boot/dts/ste-hrefprev60.dts @@ -7,14 +7,17 @@ * * http://www.opensource.org/licenses/gpl-license.html * http://www.gnu.org/copyleft/gpl.html - * - * Device Tree for the HREF+ prior to the v60 variant. */ +/dts-v1/; #include "ste-dbx5x0.dtsi" #include "ste-href.dtsi" +#include "ste-stuib.dtsi" / { + model = "ST-Ericsson HREF (pre-v60) platform with Device Tree"; + compatible = "st-ericsson,mop500", "st-ericsson,u8500"; + gpio_keys { button@1 { gpios = <&tc3589x_gpio 7 0x4>; @@ -22,30 +25,24 @@ }; soc { + prcmu@80157000 { + ab8500@5 { + ab8500-gpio { + compatible = "stericsson,ab8500-gpio"; + }; + }; + }; + i2c@80004000 { tps61052@33 { compatible = "tps61052"; reg = <0x33>; }; + }; - tc3589x@42 { - compatible = "tc3589x"; - reg = <0x42>; - interrupt-parent = <&gpio6>; - interrupts = <25 IRQ_TYPE_EDGE_RISING>; - - interrupt-controller; - #interrupt-cells = <2>; - - tc3589x_gpio: tc3589x_gpio { - compatible = "tc3589x-gpio"; - interrupts = <0 IRQ_TYPE_EDGE_RISING>; - - interrupt-controller; - #interrupt-cells = <2>; - gpio-controller; - #gpio-cells = <2>; - }; + i2c@80110000 { + bu21013_tp@5c { + reset-gpio = <&tc3589x_gpio 13 0x4>; }; }; diff --git a/arch/arm/boot/dts/ste-hrefv60plus-stuib.dts b/arch/arm/boot/dts/ste-hrefv60plus-stuib.dts deleted file mode 100644 index 8c6a2de..0000000 --- a/arch/arm/boot/dts/ste-hrefv60plus-stuib.dts +++ /dev/null @@ -1,36 +0,0 @@ -/* - * Copyright 2012 ST-Ericsson AB - * - * The code contained herein is licensed under the GNU General Public - * License. You may obtain a copy of the GNU General Public License - * Version 2 or later at the following locations: - * - * http://www.opensource.org/licenses/gpl-license.html - * http://www.gnu.org/copyleft/gpl.html - * - * Device Tree for the HREF version 60 or later with the ST UIB - */ - -/dts-v1/; -#include "ste-hrefv60plus.dtsi" -#include "ste-href-stuib.dtsi" - -/ { - model = "ST-Ericsson HREF (v60+) and ST UIB"; - compatible = "st-ericsson,hrefv60+", "st-ericsson,u8500"; - - soc { - /* Reset line for the BU21013 touchscreen */ - i2c@80110000 { - /* Only one of these will be used */ - bu21013_tp@5c { - touch-gpio = <&gpio2 20 0x4>; - reset-gpio = <&gpio4 17 0x4>; - }; - bu21013_tp@5d { - touch-gpio = <&gpio2 20 0x4>; - reset-gpio = <&gpio4 17 0x4>; - }; - }; - }; -}; diff --git a/arch/arm/boot/dts/ste-hrefv60plus-tvk.dts b/arch/arm/boot/dts/ste-hrefv60plus-tvk.dts deleted file mode 100644 index d53cccd..0000000 --- a/arch/arm/boot/dts/ste-hrefv60plus-tvk.dts +++ /dev/null @@ -1,21 +0,0 @@ -/* - * Copyright 2012 ST-Ericsson AB - * - * The code contained herein is licensed under the GNU General Public - * License. You may obtain a copy of the GNU General Public License - * Version 2 or later at the following locations: - * - * http://www.opensource.org/licenses/gpl-license.html - * http://www.gnu.org/copyleft/gpl.html - * - * Device Tree for the HREF version 60 or later with the TVK1281618 UIB - */ - -/dts-v1/; -#include "ste-hrefv60plus.dtsi" -#include "ste-href-tvk1281618.dtsi" - -/ { - model = "ST-Ericsson HREF (v60+) and TVK1281618 UIB"; - compatible = "st-ericsson,hrefv60+", "st-ericsson,u8500"; -}; diff --git a/arch/arm/boot/dts/ste-hrefv60plus.dts b/arch/arm/boot/dts/ste-hrefv60plus.dts new file mode 100644 index 0000000..6e52ebb --- /dev/null +++ b/arch/arm/boot/dts/ste-hrefv60plus.dts @@ -0,0 +1,210 @@ +/* + * Copyright 2012 ST-Ericsson AB + * + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/dts-v1/; +#include "ste-dbx5x0.dtsi" +#include "ste-href.dtsi" +#include "ste-stuib.dtsi" + +/ { + model = "ST-Ericsson HREF (v60+) platform with Device Tree"; + compatible = "st-ericsson,hrefv60+", "st-ericsson,u8500"; + + gpio_keys { + button@1 { + gpios = <&gpio6 25 0x4>; + }; + }; + + soc { + i2c@80110000 { + bu21013_tp@0x5c { + reset-gpio = <&gpio4 15 0x4>; + }; + }; + + // External Micro SD slot + sdi0_per1@80126000 { + arm,primecell-periphid = <0x10480180>; + max-frequency = <100000000>; + bus-width = <4>; + mmc-cap-sd-highspeed; + mmc-cap-mmc-highspeed; + vmmc-supply = <&ab8500_ldo_aux3_reg>; + + cd-gpios = <&tc3589x_gpio 3 0x4>; + + status = "okay"; + }; + + // WLAN SDIO channel + sdi1_per2@80118000 { + arm,primecell-periphid = <0x10480180>; + max-frequency = <100000000>; + bus-width = <4>; + + status = "okay"; + }; + + // PoP:ed eMMC + sdi2_per3@80005000 { + arm,primecell-periphid = <0x10480180>; + max-frequency = <100000000>; + bus-width = <8>; + mmc-cap-mmc-highspeed; + + status = "okay"; + }; + + // On-board eMMC + sdi4_per2@80114000 { + arm,primecell-periphid = <0x10480180>; + max-frequency = <100000000>; + bus-width = <8>; + mmc-cap-mmc-highspeed; + vmmc-supply = <&ab8500_ldo_aux2_reg>; + + status = "okay"; + }; + + prcmu@80157000 { + db8500-prcmu-regulators { + db8500_vape_reg: db8500_vape { + regulator-name = "db8500-vape"; + }; + + db8500_varm_reg: db8500_varm { + regulator-name = "db8500-varm"; + }; + + db8500_vmodem_reg: db8500_vmodem { + regulator-name = "db8500-vmodem"; + }; + + db8500_vpll_reg: db8500_vpll { + regulator-name = "db8500-vpll"; + }; + + db8500_vsmps1_reg: db8500_vsmps1 { + regulator-name = "db8500-vsmps1"; + }; + + db8500_vsmps2_reg: db8500_vsmps2 { + regulator-name = "db8500-vsmps2"; + }; + + db8500_vsmps3_reg: db8500_vsmps3 { + regulator-name = "db8500-vsmps3"; + }; + + db8500_vrf1_reg: db8500_vrf1 { + regulator-name = "db8500-vrf1"; + }; + + db8500_sva_mmdsp_reg: db8500_sva_mmdsp { + regulator-name = "db8500-sva-mmdsp"; + }; + + db8500_sva_mmdsp_ret_reg: db8500_sva_mmdsp_ret { + regulator-name = "db8500-sva-mmdsp-ret"; + }; + + db8500_sva_pipe_reg: db8500_sva_pipe { + regulator-name = "db8500_sva_pipe"; + }; + + db8500_sia_mmdsp_reg: db8500_sia_mmdsp { + regulator-name = "db8500_sia_mmdsp"; + }; + + db8500_sia_mmdsp_ret_reg: db8500_sia_mmdsp_ret { + regulator-name = "db8500-sia-mmdsp-ret"; + }; + + db8500_sia_pipe_reg: db8500_sia_pipe { + regulator-name = "db8500-sia-pipe"; + }; + + db8500_sga_reg: db8500_sga { + regulator-name = "db8500-sga"; + }; + + db8500_b2r2_mcde_reg: db8500_b2r2_mcde { + regulator-name = "db8500-b2r2-mcde"; + }; + + db8500_esram12_reg: db8500_esram12 { + regulator-name = "db8500-esram12"; + }; + + db8500_esram12_ret_reg: db8500_esram12_ret { + regulator-name = "db8500-esram12-ret"; + }; + + db8500_esram34_reg: db8500_esram34 { + regulator-name = "db8500-esram34"; + }; + + db8500_esram34_ret_reg: db8500_esram34_ret { + regulator-name = "db8500-esram34-ret"; + }; + }; + + ab8500 { + ab8500-regulators { + ab8500_ldo_aux1_reg: ab8500_ldo_aux1 { + regulator-name = "V-DISPLAY"; + }; + + ab8500_ldo_aux2_reg: ab8500_ldo_aux2 { + regulator-name = "V-eMMC1"; + }; + + ab8500_ldo_aux3_reg: ab8500_ldo_aux3 { + regulator-name = "V-MMC-SD"; + }; + + ab8500_ldo_intcore_reg: ab8500_ldo_intcore { + regulator-name = "V-INTCORE"; + }; + + ab8500_ldo_tvout_reg: ab8500_ldo_tvout { + regulator-name = "V-TVOUT"; + }; + + ab8500_ldo_usb_reg: ab8500_ldo_usb { + regulator-name = "dummy"; + }; + + ab8500_ldo_audio_reg: ab8500_ldo_audio { + regulator-name = "V-AUD"; + }; + + ab8500_ldo_anamic1_reg: ab8500_ldo_anamic1 { + regulator-name = "V-AMIC1"; + }; + + ab8500_ldo_anamic2_reg: ab8500_ldo_anamic2 { + regulator-name = "V-AMIC2"; + }; + + ab8500_ldo_dmic_reg: ab8500_ldo_dmic { + regulator-name = "V-DMIC"; + }; + + ab8500_ldo_ana_reg: ab8500_ldo_ana { + regulator-name = "V-CSI/DSI"; + }; + }; + }; + }; + }; +}; diff --git a/arch/arm/boot/dts/ste-hrefv60plus.dtsi b/arch/arm/boot/dts/ste-hrefv60plus.dtsi deleted file mode 100644 index aed511b..0000000 --- a/arch/arm/boot/dts/ste-hrefv60plus.dtsi +++ /dev/null @@ -1,70 +0,0 @@ -/* - * Copyright 2012 ST-Ericsson AB - * - * The code contained herein is licensed under the GNU General Public - * License. You may obtain a copy of the GNU General Public License - * Version 2 or later at the following locations: - * - * http://www.opensource.org/licenses/gpl-license.html - * http://www.gnu.org/copyleft/gpl.html - */ - -#include "ste-dbx5x0.dtsi" -#include "ste-href.dtsi" - -/ { - model = "ST-Ericsson HREF (v60+) platform with Device Tree"; - compatible = "st-ericsson,hrefv60+", "st-ericsson,u8500"; - - gpio_keys { - button@1 { - gpios = <&gpio5 25 0x4>; - }; - }; - - soc { - // External Micro SD slot - sdi0_per1@80126000 { - arm,primecell-periphid = <0x10480180>; - max-frequency = <100000000>; - bus-width = <4>; - mmc-cap-sd-highspeed; - mmc-cap-mmc-highspeed; - vmmc-supply = <&ab8500_ldo_aux3_reg>; - - cd-gpios = <&gpio2 31 0x4>; // 95 - - status = "okay"; - }; - - // WLAN SDIO channel - sdi1_per2@80118000 { - arm,primecell-periphid = <0x10480180>; - max-frequency = <100000000>; - bus-width = <4>; - - status = "okay"; - }; - - // PoP:ed eMMC - sdi2_per3@80005000 { - arm,primecell-periphid = <0x10480180>; - max-frequency = <100000000>; - bus-width = <8>; - mmc-cap-mmc-highspeed; - - status = "okay"; - }; - - // On-board eMMC - sdi4_per2@80114000 { - arm,primecell-periphid = <0x10480180>; - max-frequency = <100000000>; - bus-width = <8>; - mmc-cap-mmc-highspeed; - vmmc-supply = <&ab8500_ldo_aux2_reg>; - - status = "okay"; - }; - }; -}; diff --git a/arch/arm/boot/dts/ste-nomadik-stn8815.dtsi b/arch/arm/boot/dts/ste-nomadik-stn8815.dtsi index 79425e3..9169d30 100644 --- a/arch/arm/boot/dts/ste-nomadik-stn8815.dtsi +++ b/arch/arm/boot/dts/ste-nomadik-stn8815.dtsi @@ -653,7 +653,6 @@ reg-names = "fsmc_regs", "nand_data", "nand_addr", "nand_cmd"; clocks = <&hclksmc>; status = "okay"; - timings = /bits/ 8 <0 0 0 0x10 0x0a 0>; partition@0 { label = "X-Loader(NAND)"; @@ -708,14 +707,8 @@ pinctrl-0 = <&i2c0_default_mux>, <&i2c0_default_mode>; stw4811@2d { - compatible = "st,stw4811"; - reg = <0x2d>; - vmmc_regulator: vmmc { - compatible = "st,stw481x-vmmc"; - regulator-name = "VMMC"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - }; + compatible = "st,stw4811"; + reg = <0x2d>; }; }; @@ -846,7 +839,6 @@ cd-inverted; pinctrl-names = "default"; pinctrl-0 = <&mmcsd_default_mux>, <&mmcsd_default_mode>; - vmmc-supply = <&vmmc_regulator>; }; }; }; diff --git a/arch/arm/boot/dts/ste-snowball.dts b/arch/arm/boot/dts/ste-snowball.dts index f0b39f8..f1fc128 100644 --- a/arch/arm/boot/dts/ste-snowball.dts +++ b/arch/arm/boot/dts/ste-snowball.dts @@ -111,13 +111,12 @@ vdd33a-supply = <&en_3v3_reg>; vddvario-supply = <&db8500_vape_reg>; + reg-shift = <1>; reg-io-width = <2>; smsc,force-internal-phy; smsc,irq-active-high; smsc,irq-push-pull; - - clocks = <&prcc_pclk 3 0>; }; }; @@ -171,8 +170,86 @@ }; prcmu@80157000 { - cpufreq { - status = "okay"; + db8500-prcmu-regulators { + db8500_vape_reg: db8500_vape { + regulator-name = "db8500-vape"; + }; + + db8500_varm_reg: db8500_varm { + regulator-name = "db8500-varm"; + }; + + db8500_vmodem_reg: db8500_vmodem { + regulator-name = "db8500-vmodem"; + }; + + db8500_vpll_reg: db8500_vpll { + regulator-name = "db8500-vpll"; + }; + + db8500_vsmps1_reg: db8500_vsmps1 { + regulator-name = "db8500-vsmps1"; + }; + + db8500_vsmps2_reg: db8500_vsmps2 { + regulator-name = "db8500-vsmps2"; + }; + + db8500_vsmps3_reg: db8500_vsmps3 { + regulator-name = "db8500-vsmps3"; + }; + + db8500_vrf1_reg: db8500_vrf1 { + regulator-name = "db8500-vrf1"; + }; + + db8500_sva_mmdsp_reg: db8500_sva_mmdsp { + regulator-name = "db8500-sva-mmdsp"; + }; + + db8500_sva_mmdsp_ret_reg: db8500_sva_mmdsp_ret { + regulator-name = "db8500-sva-mmdsp-ret"; + }; + + db8500_sva_pipe_reg: db8500_sva_pipe { + regulator-name = "db8500_sva_pipe"; + }; + + db8500_sia_mmdsp_reg: db8500_sia_mmdsp { + regulator-name = "db8500_sia_mmdsp"; + }; + + db8500_sia_mmdsp_ret_reg: db8500_sia_mmdsp_ret { + regulator-name = "db8500-sia-mmdsp-ret"; + }; + + db8500_sia_pipe_reg: db8500_sia_pipe { + regulator-name = "db8500-sia-pipe"; + }; + + db8500_sga_reg: db8500_sga { + regulator-name = "db8500-sga"; + }; + + db8500_b2r2_mcde_reg: db8500_b2r2_mcde { + regulator-name = "db8500-b2r2-mcde"; + }; + + db8500_esram12_reg: db8500_esram12 { + regulator-name = "db8500-esram12"; + }; + + db8500_esram12_ret_reg: db8500_esram12_ret { + regulator-name = "db8500-esram12-ret"; + }; + + db8500_esram34_reg: db8500_esram34 { + regulator-name = "db8500-esram34"; + }; + + db8500_esram34_ret_reg: db8500_esram34_ret { + regulator-name = "db8500-esram34-ret"; + }; }; thermal@801573c0 { diff --git a/arch/arm/boot/dts/ste-href-stuib.dtsi b/arch/arm/boot/dts/ste-stuib.dtsi index 76704ec..524e332 100644 --- a/arch/arm/boot/dts/ste-href-stuib.dtsi +++ b/arch/arm/boot/dts/ste-stuib.dtsi @@ -57,6 +57,7 @@ bu21013_tp@5c { compatible = "rohm,bu21013_tp"; reg = <0x5c>; + touch-gpio = <&gpio2 20 0x4>; avdd-supply = <&ab8500_ldo_aux1_reg>; rohm,touch-max-x = <384>; @@ -67,6 +68,7 @@ bu21013_tp@5d { compatible = "rohm,bu21013_tp"; reg = <0x5d>; + touch-gpio = <&gpio2 20 0x4>; avdd-supply = <&ab8500_ldo_aux1_reg>; rohm,touch-max-x = <384>; diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi b/arch/arm/boot/dts/sun4i-a10.dtsi index 319cc6b..c32770a 100644 --- a/arch/arm/boot/dts/sun4i-a10.dtsi +++ b/arch/arm/boot/dts/sun4i-a10.dtsi @@ -266,11 +266,6 @@ reg = <0x01c20c90 0x10>; }; - sid: eeprom@01c23800 { - compatible = "allwinner,sun4i-sid"; - reg = <0x01c23800 0x10>; - }; - uart0: serial@01c28000 { compatible = "snps,dw-apb-uart"; reg = <0x01c28000 0x400>; diff --git a/arch/arm/boot/dts/sun5i-a10s.dtsi b/arch/arm/boot/dts/sun5i-a10s.dtsi index 5247674..3b4a057 100644 --- a/arch/arm/boot/dts/sun5i-a10s.dtsi +++ b/arch/arm/boot/dts/sun5i-a10s.dtsi @@ -255,11 +255,6 @@ reg = <0x01c20c90 0x10>; }; - sid: eeprom@01c23800 { - compatible = "allwinner,sun4i-sid"; - reg = <0x01c23800 0x10>; - }; - uart0: serial@01c28000 { compatible = "snps,dw-apb-uart"; reg = <0x01c28000 0x400>; diff --git a/arch/arm/boot/dts/sun5i-a13.dtsi b/arch/arm/boot/dts/sun5i-a13.dtsi index ce8ef2a..f6091dc 100644 --- a/arch/arm/boot/dts/sun5i-a13.dtsi +++ b/arch/arm/boot/dts/sun5i-a13.dtsi @@ -222,11 +222,6 @@ reg = <0x01c20c90 0x10>; }; - sid: eeprom@01c23800 { - compatible = "allwinner,sun4i-sid"; - reg = <0x01c23800 0x10>; - }; - uart1: serial@01c28400 { compatible = "snps,dw-apb-uart"; reg = <0x01c28400 0x400>; diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi b/arch/arm/boot/dts/sun6i-a31.dtsi index c1751a6..f244f5f 100644 --- a/arch/arm/boot/dts/sun6i-a31.dtsi +++ b/arch/arm/boot/dts/sun6i-a31.dtsi @@ -175,7 +175,7 @@ apb2_gates: apb2_gates@01c2006c { #clock-cells = <1>; compatible = "allwinner,sun6i-a31-apb2-gates-clk"; - reg = <0x01c2006c 0x4>; + reg = <0x01c2006c 0x8>; clocks = <&apb2>; clock-output-names = "apb2_i2c0", "apb2_i2c1", "apb2_i2c2", "apb2_i2c3", "apb2_uart0", diff --git a/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts b/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts index 5c51cb8..15e625e 100644 --- a/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts +++ b/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts @@ -48,18 +48,6 @@ pinctrl-0 = <&uart0_pins_a>; status = "okay"; }; - - i2c0: i2c@01c2ac00 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c0_pins_a>; - status = "okay"; - }; - - i2c1: i2c@01c2b000 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c1_pins_a>; - status = "okay"; - }; }; leds { diff --git a/arch/arm/boot/dts/sun7i-a20-cubietruck.dts b/arch/arm/boot/dts/sun7i-a20-cubietruck.dts deleted file mode 100644 index 8a1009d..0000000 --- a/arch/arm/boot/dts/sun7i-a20-cubietruck.dts +++ /dev/null @@ -1,63 +0,0 @@ -/* - * Copyright 2013 Oliver Schinagl - * - * Oliver Schinagl <oliver@schinagl.nl> - * - * The code contained herein is licensed under the GNU General Public - * License. You may obtain a copy of the GNU General Public License - * Version 2 or later at the following locations: - * - * http://www.opensource.org/licenses/gpl-license.html - * http://www.gnu.org/copyleft/gpl.html - */ - -/dts-v1/; -/include/ "sun7i-a20.dtsi" - -/ { - model = "Cubietech Cubietruck"; - compatible = "cubietech,cubietruck", "allwinner,sun7i-a20"; - - soc@01c00000 { - pinctrl@01c20800 { - led_pins_cubietruck: led_pins@0 { - allwinner,pins = "PH7", "PH11", "PH20", "PH21"; - allwinner,function = "gpio_out"; - allwinner,drive = <0>; - allwinner,pull = <0>; - }; - }; - - uart0: serial@01c28000 { - pinctrl-names = "default"; - pinctrl-0 = <&uart0_pins_a>; - status = "okay"; - }; - }; - - leds { - compatible = "gpio-leds"; - pinctrl-names = "default"; - pinctrl-0 = <&led_pins_cubietruck>; - - blue { - label = "cubietruck:blue:usr"; - gpios = <&pio 7 21 0>; - }; - - orange { - label = "cubietruck:orange:usr"; - gpios = <&pio 7 20 0>; - }; - - white { - label = "cubietruck:white:usr"; - gpios = <&pio 7 11 0>; - }; - - green { - label = "cubietruck:green:usr"; - gpios = <&pio 7 7 0>; - }; - }; -}; diff --git a/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts b/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts index ead3013..9e77855 100644 --- a/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts +++ b/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts @@ -60,24 +60,6 @@ pinctrl-0 = <&uart7_pins_a>; status = "okay"; }; - - i2c0: i2c@01c2ac00 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c0_pins_a>; - status = "okay"; - }; - - i2c1: i2c@01c2b000 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c1_pins_a>; - status = "okay"; - }; - - i2c2: i2c@01c2b400 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c2_pins_a>; - status = "okay"; - }; }; leds { diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi index e46cfed..80559cb 100644 --- a/arch/arm/boot/dts/sun7i-a20.dtsi +++ b/arch/arm/boot/dts/sun7i-a20.dtsi @@ -215,27 +215,6 @@ allwinner,pull = <0>; }; - i2c0_pins_a: i2c0@0 { - allwinner,pins = "PB0", "PB1"; - allwinner,function = "i2c0"; - allwinner,drive = <0>; - allwinner,pull = <0>; - }; - - i2c1_pins_a: i2c1@0 { - allwinner,pins = "PB18", "PB19"; - allwinner,function = "i2c1"; - allwinner,drive = <0>; - allwinner,pull = <0>; - }; - - i2c2_pins_a: i2c2@0 { - allwinner,pins = "PB20", "PB21"; - allwinner,function = "i2c2"; - allwinner,drive = <0>; - allwinner,pull = <0>; - }; - emac_pins_a: emac0@0 { allwinner,pins = "PA0", "PA1", "PA2", "PA3", "PA4", "PA5", "PA6", @@ -265,11 +244,6 @@ reg = <0x01c20c90 0x10>; }; - sid: eeprom@01c23800 { - compatible = "allwinner,sun7i-a20-sid"; - reg = <0x01c23800 0x200>; - }; - uart0: serial@01c28000 { compatible = "snps,dw-apb-uart"; reg = <0x01c28000 0x400>; @@ -350,51 +324,6 @@ status = "disabled"; }; - i2c0: i2c@01c2ac00 { - compatible = "allwinner,sun4i-i2c"; - reg = <0x01c2ac00 0x400>; - interrupts = <0 7 1>; - clocks = <&apb1_gates 0>; - clock-frequency = <100000>; - status = "disabled"; - }; - - i2c1: i2c@01c2b000 { - compatible = "allwinner,sun4i-i2c"; - reg = <0x01c2b000 0x400>; - interrupts = <0 8 1>; - clocks = <&apb1_gates 1>; - clock-frequency = <100000>; - status = "disabled"; - }; - - i2c2: i2c@01c2b400 { - compatible = "allwinner,sun4i-i2c"; - reg = <0x01c2b400 0x400>; - interrupts = <0 9 1>; - clocks = <&apb1_gates 2>; - clock-frequency = <100000>; - status = "disabled"; - }; - - i2c3: i2c@01c2b800 { - compatible = "allwinner,sun4i-i2c"; - reg = <0x01c2b800 0x400>; - interrupts = <0 88 1>; - clocks = <&apb1_gates 3>; - clock-frequency = <100000>; - status = "disabled"; - }; - - i2c4: i2c@01c2bc00 { - compatible = "allwinner,sun4i-i2c"; - reg = <0x01c2bc00 0x400>; - interrupts = <0 89 1>; - clocks = <&apb1_gates 15>; - clock-frequency = <100000>; - status = "disabled"; - }; - gic: interrupt-controller@01c81000 { compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic"; reg = <0x01c81000 0x1000>, diff --git a/arch/arm/boot/dts/tegra114-dalmore.dts b/arch/arm/boot/dts/tegra114-dalmore.dts index cb5ec23..6023028 100644 --- a/arch/arm/boot/dts/tegra114-dalmore.dts +++ b/arch/arm/boot/dts/tegra114-dalmore.dts @@ -1,6 +1,5 @@ /dts-v1/; -#include <dt-bindings/input/input.h> #include "tegra114.dtsi" / { @@ -739,14 +738,6 @@ realtek,ldo1-en-gpios = <&gpio TEGRA_GPIO(V, 3) GPIO_ACTIVE_HIGH>; }; - - temperature-sensor@4c { - compatible = "onnn,nct1008"; - reg = <0x4c>; - vcc-supply = <&palmas_ldo6_reg>; - interrupt-parent = <&gpio>; - interrupts = <TEGRA_GPIO(O, 4) IRQ_TYPE_LEVEL_LOW>; - }; }; i2c@7000d000 { @@ -956,7 +947,7 @@ regulator-max-microvolt = <1800000>; }; - palmas_ldo6_reg: ldo6 { + ldo6 { regulator-name = "vdd-sensor-2v85"; regulator-min-microvolt = <2850000>; regulator-max-microvolt = <2850000>; @@ -1020,19 +1011,6 @@ interrupt-parent = <&palmas>; interrupts = <8 0>; }; - - pinmux { - compatible = "ti,tps65913-pinctrl"; - pinctrl-names = "default"; - pinctrl-0 = <&palmas_default>; - - palmas_default: pinmux { - pin_gpio6 { - pins = "gpio6"; - function = "gpio"; - }; - }; - }; }; }; @@ -1103,26 +1081,26 @@ home { label = "Home"; gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>; - linux,code = <KEY_HOME>; + linux,code = <102>; /* KEY_HOME */ }; power { label = "Power"; gpios = <&gpio TEGRA_GPIO(Q, 0) GPIO_ACTIVE_LOW>; - linux,code = <KEY_POWER>; + linux,code = <116>; /* KEY_POWER */ gpio-key,wakeup; }; volume_down { label = "Volume Down"; gpios = <&gpio TEGRA_GPIO(R, 1) GPIO_ACTIVE_LOW>; - linux,code = <KEY_VOLUMEDOWN>; + linux,code = <114>; /* KEY_VOLUMEDOWN */ }; volume_up { label = "Volume Up"; gpios = <&gpio TEGRA_GPIO(R, 2) GPIO_ACTIVE_LOW>; - linux,code = <KEY_VOLUMEUP>; + linux,code = <115>; /* KEY_VOLUMEUP */ }; }; diff --git a/arch/arm/boot/dts/tegra114.dtsi b/arch/arm/boot/dts/tegra114.dtsi index 8d42787..2905145 100644 --- a/arch/arm/boot/dts/tegra114.dtsi +++ b/arch/arm/boot/dts/tegra114.dtsi @@ -318,9 +318,9 @@ iommu { compatible = "nvidia,tegra114-smmu", "nvidia,tegra30-smmu"; - reg = <0x70019010 0x02c - 0x700191f0 0x010 - 0x70019228 0x074>; + reg = <0x7000f010 0x02c + 0x7000f1f0 0x010 + 0x7000f228 0x074>; nvidia,#asids = <4>; dma-window = <0 0x40000000>; nvidia,swgroups = <0x18659fe>; diff --git a/arch/arm/boot/dts/tegra124-venice2.dts b/arch/arm/boot/dts/tegra124-venice2.dts deleted file mode 100644 index 431d67a..0000000 --- a/arch/arm/boot/dts/tegra124-venice2.dts +++ /dev/null @@ -1,27 +0,0 @@ -/dts-v1/; - -#include "tegra124.dtsi" - -/ { - model = "NVIDIA Tegra124 Venice2"; - compatible = "nvidia,venice2", "nvidia,tegra124"; - - memory { - reg = <0x80000000 0x80000000>; - }; - - serial@70006000 { - status = "okay"; - }; - - pmc@7000e400 { - nvidia,invert-interrupt; - nvidia,suspend-mode = <1>; - nvidia,cpu-pwr-good-time = <500>; - nvidia,cpu-pwr-off-time = <300>; - nvidia,core-pwr-good-time = <641 3845>; - nvidia,core-pwr-off-time = <61036>; - nvidia,core-power-req-active-high; - nvidia,sys-clock-req-active-high; - }; -}; diff --git a/arch/arm/boot/dts/tegra124.dtsi b/arch/arm/boot/dts/tegra124.dtsi deleted file mode 100644 index b741300..0000000 --- a/arch/arm/boot/dts/tegra124.dtsi +++ /dev/null @@ -1,149 +0,0 @@ -#include <dt-bindings/gpio/tegra-gpio.h> -#include <dt-bindings/interrupt-controller/arm-gic.h> - -#include "skeleton.dtsi" - -/ { - compatible = "nvidia,tegra124"; - interrupt-parent = <&gic>; - - gic: interrupt-controller@50041000 { - compatible = "arm,cortex-a15-gic"; - #interrupt-cells = <3>; - interrupt-controller; - reg = <0x50041000 0x1000>, - <0x50042000 0x1000>, - <0x50044000 0x2000>, - <0x50046000 0x2000>; - interrupts = <GIC_PPI 9 - (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; - }; - - timer@60005000 { - compatible = "nvidia,tegra124-timer", "nvidia,tegra20-timer"; - reg = <0x60005000 0x400>; - interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>; - }; - - gpio: gpio@6000d000 { - compatible = "nvidia,tegra124-gpio", "nvidia,tegra30-gpio"; - reg = <0x6000d000 0x1000>; - interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>; - #gpio-cells = <2>; - gpio-controller; - #interrupt-cells = <2>; - interrupt-controller; - }; - - /* - * There are two serial driver i.e. 8250 based simple serial - * driver and APB DMA based serial driver for higher baudrate - * and performace. To enable the 8250 based driver, the compatible - * is "nvidia,tegra124-uart", "nvidia,tegra20-uart" and to enable - * the APB DMA based serial driver, the comptible is - * "nvidia,tegra124-hsuart", "nvidia,tegra30-hsuart". - */ - serial@70006000 { - compatible = "nvidia,tegra124-uart", "nvidia,tegra20-uart"; - reg = <0x70006000 0x40>; - reg-shift = <2>; - interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; - status = "disabled"; - }; - - serial@70006040 { - compatible = "nvidia,tegra124-uart", "nvidia,tegra20-uart"; - reg = <0x70006040 0x40>; - reg-shift = <2>; - interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; - status = "disabled"; - }; - - serial@70006200 { - compatible = "nvidia,tegra124-uart", "nvidia,tegra20-uart"; - reg = <0x70006200 0x40>; - reg-shift = <2>; - interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>; - status = "disabled"; - }; - - serial@70006300 { - compatible = "nvidia,tegra124-uart", "nvidia,tegra20-uart"; - reg = <0x70006300 0x40>; - reg-shift = <2>; - interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>; - status = "disabled"; - }; - - serial@70006400 { - compatible = "nvidia,tegra124-uart", "nvidia,tegra20-uart"; - reg = <0x70006400 0x40>; - reg-shift = <2>; - interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>; - status = "disabled"; - }; - - rtc@7000e000 { - compatible = "nvidia,tegra124-rtc", "nvidia,tegra20-rtc"; - reg = <0x7000e000 0x100>; - interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>; - }; - - pmc@7000e400 { - compatible = "nvidia,tegra124-pmc"; - reg = <0x7000e400 0x400>; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu@0 { - device_type = "cpu"; - compatible = "arm,cortex-a15"; - reg = <0>; - }; - - cpu@1 { - device_type = "cpu"; - compatible = "arm,cortex-a15"; - reg = <1>; - }; - - cpu@2 { - device_type = "cpu"; - compatible = "arm,cortex-a15"; - reg = <2>; - }; - - cpu@3 { - device_type = "cpu"; - compatible = "arm,cortex-a15"; - reg = <3>; - }; - }; - - timer { - compatible = "arm,armv7-timer"; - interrupts = <GIC_PPI 13 - (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, - <GIC_PPI 14 - (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, - <GIC_PPI 11 - (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, - <GIC_PPI 10 - (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; - }; -}; diff --git a/arch/arm/boot/dts/tegra30-cardhu.dtsi b/arch/arm/boot/dts/tegra30-cardhu.dtsi index 5ea7dfa..e19dbf2 100644 --- a/arch/arm/boot/dts/tegra30-cardhu.dtsi +++ b/arch/arm/boot/dts/tegra30-cardhu.dtsi @@ -294,10 +294,9 @@ }; }; - temperature-sensor@4c { + nct1008 { compatible = "onnn,nct1008"; reg = <0x4c>; - vcc-supply = <&sys_3v3_reg>; interrupt-parent = <&gpio>; interrupts = <TEGRA_GPIO(CC, 2) IRQ_TYPE_LEVEL_LOW>; }; diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi index 2bd55cf..0022c12 100644 --- a/arch/arm/boot/dts/tegra30.dtsi +++ b/arch/arm/boot/dts/tegra30.dtsi @@ -136,13 +136,12 @@ gr3d { compatible = "nvidia,tegra30-gr3d"; reg = <0x54180000 0x00040000>; - clocks = <&tegra_car TEGRA30_CLK_GR3D - &tegra_car TEGRA30_CLK_GR3D2>; + clocks = <&tegra_car 24 &tegra_car 98>; clock-names = "3d", "3d2"; }; dc@54200000 { - compatible = "nvidia,tegra30-dc", "nvidia,tegra20-dc"; + compatible = "nvidia,tegra30-dc"; reg = <0x54200000 0x00040000>; interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; clocks = <&tegra_car TEGRA30_CLK_DISP1>, diff --git a/arch/arm/boot/dts/testcases/tests-interrupts.dtsi b/arch/arm/boot/dts/testcases/tests-interrupts.dtsi deleted file mode 100644 index c843720..0000000 --- a/arch/arm/boot/dts/testcases/tests-interrupts.dtsi +++ /dev/null @@ -1,58 +0,0 @@ - -/ { - testcase-data { - interrupts { - #address-cells = <1>; - #size-cells = <1>; - test_intc0: intc0 { - interrupt-controller; - #interrupt-cells = <1>; - }; - - test_intc1: intc1 { - interrupt-controller; - #interrupt-cells = <3>; - }; - - test_intc2: intc2 { - interrupt-controller; - #interrupt-cells = <2>; - }; - - test_intmap0: intmap0 { - #interrupt-cells = <1>; - #address-cells = <0>; - interrupt-map = <1 &test_intc0 9>, - <2 &test_intc1 10 11 12>, - <3 &test_intc2 13 14>, - <4 &test_intc2 15 16>; - }; - - test_intmap1: intmap1 { - #interrupt-cells = <2>; - interrupt-map = <0x5000 1 2 &test_intc0 15>; - }; - - interrupts0 { - interrupt-parent = <&test_intc0>; - interrupts = <1>, <2>, <3>, <4>; - }; - - interrupts1 { - interrupt-parent = <&test_intmap0>; - interrupts = <1>, <2>, <3>, <4>; - }; - - interrupts-extended0 { - reg = <0x5000 0x100>; - interrupts-extended = <&test_intc0 1>, - <&test_intc1 2 3 4>, - <&test_intc2 5 6>, - <&test_intmap0 1>, - <&test_intmap0 2>, - <&test_intmap0 3>, - <&test_intmap1 1 2>; - }; - }; - }; -}; diff --git a/arch/arm/boot/dts/testcases/tests.dtsi b/arch/arm/boot/dts/testcases/tests.dtsi index 3f123ec..a7c5067 100644 --- a/arch/arm/boot/dts/testcases/tests.dtsi +++ b/arch/arm/boot/dts/testcases/tests.dtsi @@ -1,2 +1 @@ /include/ "tests-phandle.dtsi" -/include/ "tests-interrupts.dtsi" diff --git a/arch/arm/boot/dts/twl4030.dtsi b/arch/arm/boot/dts/twl4030.dtsi index 4217096..ae6a17a 100644 --- a/arch/arm/boot/dts/twl4030.dtsi +++ b/arch/arm/boot/dts/twl4030.dtsi @@ -19,32 +19,10 @@ interrupts = <11>; }; - charger: bci { - compatible = "ti,twl4030-bci"; - interrupts = <9>, <2>; - bci3v1-supply = <&vusb3v1>; - }; - watchdog { compatible = "ti,twl4030-wdt"; }; - vaux1: regulator-vaux1 { - compatible = "ti,twl4030-vaux1"; - }; - - vaux2: regulator-vaux2 { - compatible = "ti,twl4030-vaux2"; - }; - - vaux3: regulator-vaux3 { - compatible = "ti,twl4030-vaux3"; - }; - - vaux4: regulator-vaux4 { - compatible = "ti,twl4030-vaux4"; - }; - vcc: regulator-vdd1 { compatible = "ti,twl4030-vdd1"; regulator-min-microvolt = <600000>; @@ -57,20 +35,10 @@ regulator-max-microvolt = <1800000>; }; - vio: regulator-vio { - compatible = "ti,twl4030-vio"; - }; - - vintana1: regulator-vintana1 { - compatible = "ti,twl4030-vintana1"; - }; - - vintana2: regulator-vintana2 { - compatible = "ti,twl4030-vintana2"; - }; - - vintdig: regulator-vintdig { - compatible = "ti,twl4030-vintdig"; + vpll2: regulator-vpll2 { + compatible = "ti,twl4030-vpll2"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; }; vmmc1: regulator-vmmc1 { @@ -97,16 +65,6 @@ compatible = "ti,twl4030-vusb3v1"; }; - vpll1: regulator-vpll1 { - compatible = "ti,twl4030-vpll1"; - }; - - vpll2: regulator-vpll2 { - compatible = "ti,twl4030-vpll2"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - }; - vsim: regulator-vsim { compatible = "ti,twl4030-vsim"; regulator-min-microvolt = <1800000>; @@ -128,7 +86,6 @@ usb1v8-supply = <&vusb1v8>; usb3v1-supply = <&vusb3v1>; usb_mode = <1>; - #phy-cells = <0>; }; twl_pwm: pwm { @@ -140,9 +97,4 @@ compatible = "ti,twl4030-pwmled"; #pwm-cells = <2>; }; - - twl_pwrbutton: pwrbutton { - compatible = "ti,twl4030-pwrbutton"; - interrupts = <8>; - }; }; diff --git a/arch/arm/boot/dts/twl6030_omap4.dtsi b/arch/arm/boot/dts/twl6030_omap4.dtsi deleted file mode 100644 index a4fa570..0000000 --- a/arch/arm/boot/dts/twl6030_omap4.dtsi +++ /dev/null @@ -1,38 +0,0 @@ -/* - * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/ - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -&twl { - /* - * On most OMAP4 platforms, the twl6030 IRQ line is connected - * to the SYS_NIRQ1 line on OMAP and the twl6030 MSECURE line is - * connected to the fref_clk0_out.sys_drm_msecure line. - * Therefore, configure the defaults for the SYS_NIRQ1 and - * fref_clk0_out.sys_drm_msecure pins here. - */ - pinctrl-names = "default"; - pinctrl-0 = < - &twl6030_pins - &twl6030_wkup_pins - >; -}; - -&omap4_pmx_wkup { - twl6030_wkup_pins: pinmux_twl6030_wkup_pins { - pinctrl-single,pins = < - 0x14 (PIN_OUTPUT | MUX_MODE2) /* fref_clk0_out.sys_drm_msecure */ - >; - }; -}; - -&omap4_pmx_core { - twl6030_pins: pinmux_twl6030_pins { - pinctrl-single,pins = < - 0x15e (WAKEUP_EN | PIN_INPUT_PULLUP | MUX_MODE0) /* sys_nirq1.sys_nirq1 */ - >; - }; -}; diff --git a/arch/arm/boot/dts/versatile-ab.dts b/arch/arm/boot/dts/versatile-ab.dts index e01e5a0..dde75ae 100644 --- a/arch/arm/boot/dts/versatile-ab.dts +++ b/arch/arm/boot/dts/versatile-ab.dts @@ -185,7 +185,7 @@ mmc@5000 { compatible = "arm,primecell"; reg = < 0x5000 0x1000>; - interrupts-extended = <&vic 22 &sic 2>; + interrupts = <22 34>; }; kmi@6000 { compatible = "arm,pl050", "arm,primecell"; diff --git a/arch/arm/boot/dts/versatile-pb.dts b/arch/arm/boot/dts/versatile-pb.dts index f43907c..7e81752 100644 --- a/arch/arm/boot/dts/versatile-pb.dts +++ b/arch/arm/boot/dts/versatile-pb.dts @@ -41,7 +41,7 @@ mmc@b000 { compatible = "arm,primecell"; reg = <0xb000 0x1000>; - interrupts-extended = <&vic 23 &sic 2>; + interrupts = <23 34>; }; }; }; diff --git a/arch/arm/boot/dts/vf610-cosmic.dts b/arch/arm/boot/dts/vf610-cosmic.dts deleted file mode 100644 index c42e4f9..0000000 --- a/arch/arm/boot/dts/vf610-cosmic.dts +++ /dev/null @@ -1,47 +0,0 @@ -/* - * Copyright 2013 Freescale Semiconductor, Inc. - * Copyright 2013 Linaro Limited - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - */ - -/dts-v1/; -#include "vf610.dtsi" - -/ { - model = "PHYTEC Cosmic/Cosmic+ Board"; - compatible = "phytec,vf610-cosmic", "fsl,vf610"; - - chosen { - bootargs = "console=ttyLP1,115200"; - }; - - memory { - reg = <0x80000000 0x10000000>; - }; - - clocks { - enet_ext { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <50000000>; - }; - }; - -}; - -&fec1 { - phy-mode = "rmii"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_fec1_1>; - status = "okay"; -}; - -&uart1 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart1_1>; - status = "okay"; -}; diff --git a/arch/arm/boot/dts/vf610-twr.dts b/arch/arm/boot/dts/vf610-twr.dts index c8047ca..1a58678 100644 --- a/arch/arm/boot/dts/vf610-twr.dts +++ b/arch/arm/boot/dts/vf610-twr.dts @@ -36,23 +36,6 @@ }; -&dspi0 { - bus-num = <0>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_dspi0_1>; - status = "okay"; - - sflash: at26df081a@0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "atmel,at26df081a"; - spi-max-frequency = <16000000>; - spi-cpol; - spi-cpha; - reg = <0>; - }; -}; - &fec0 { phy-mode = "rmii"; pinctrl-names = "default"; diff --git a/arch/arm/boot/dts/vf610.dtsi b/arch/arm/boot/dts/vf610.dtsi index d31ce1b..67d929c 100644 --- a/arch/arm/boot/dts/vf610.dtsi +++ b/arch/arm/boot/dts/vf610.dtsi @@ -123,18 +123,6 @@ status = "disabled"; }; - dspi0: dspi0@4002c000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,vf610-dspi"; - reg = <0x4002c000 0x1000>; - interrupts = <0 67 0x04>; - clocks = <&clks VF610_CLK_DSPI0>; - clock-names = "dspi"; - spi-num-chipselects = <5>; - status = "disabled"; - }; - sai2: sai@40031000 { compatible = "fsl,vf610-sai"; reg = <0x40031000 0x1000>; diff --git a/arch/arm/boot/dts/zynq-7000.dtsi b/arch/arm/boot/dts/zynq-7000.dtsi index e7f73b2..e32b92b 100644 --- a/arch/arm/boot/dts/zynq-7000.dtsi +++ b/arch/arm/boot/dts/zynq-7000.dtsi @@ -92,14 +92,6 @@ }; }; - global_timer: timer@f8f00200 { - compatible = "arm,cortex-a9-global-timer"; - reg = <0xf8f00200 0x20>; - interrupts = <1 11 0x301>; - interrupt-parent = <&intc>; - clocks = <&clkc 4>; - }; - ttc0: ttc0@f8001000 { interrupt-parent = <&intc>; interrupts = < 0 10 4 0 11 4 0 12 4 >; |