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| author | Jingchang Lu <jingchang.lu@freescale.com> | 2014-07-21 09:44:10 (GMT) |
|---|---|---|
| committer | Matthew Weigel <Matthew.Weigel@freescale.com> | 2014-12-11 18:35:44 (GMT) |
| commit | c77758fa1763ec4b0f68719d3b270d6ca9f5b23c (patch) | |
| tree | f0b08bd4f7a73ab434e1124b476126ba3d2fb201 /arch/arm | |
| parent | 138d7b8f762489543abf8290333b6fa69baff837 (diff) | |
| download | linux-fsl-qoriq-c77758fa1763ec4b0f68719d3b270d6ca9f5b23c.tar.xz | |
arm: dts: ls1021a-twr: add aliases for enet phy
This add aliases for enet phy to make it be found easily
in u-boot on dynamically change the enet "phy-handle" and
"phy-connection-type" property.
Signed-off-by: Jingchang Lu <jingchang.lu@freescale.com>
Change-Id: I60e19aa48856c9b9048415d1c8924b626d70332a
Reviewed-on: http://git.am.freescale.net:8181/17831
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Huan Wang <alison.wang@freescale.com>
Reviewed-by: Li Xiubo <Li.Xiubo@freescale.com>
Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
Diffstat (limited to 'arch/arm')
| -rwxr-xr-x | arch/arm/boot/dts/ls1021a-twr.dts | 24 |
1 files changed, 15 insertions, 9 deletions
diff --git a/arch/arm/boot/dts/ls1021a-twr.dts b/arch/arm/boot/dts/ls1021a-twr.dts index 7adc70b..6d2fd91 100755 --- a/arch/arm/boot/dts/ls1021a-twr.dts +++ b/arch/arm/boot/dts/ls1021a-twr.dts @@ -12,6 +12,12 @@ / { model = "LS1021A TWR Board"; + + aliases { + enet2_rgmii_phy = &rgmii_phy1; + enet0_sgmii_phy = &sgmii_phy2; + enet1_sgmii_phy = &sgmii_phy0; + }; }; &dspi1 { @@ -39,22 +45,22 @@ &enet0 { tbi-handle = <&tbi1>; - phy-handle = <&phy2>; + phy-handle = <&sgmii_phy2>; phy-connection-type = "sgmii"; - status = "ok"; + status = "okay"; }; &enet1 { tbi-handle = <&tbi1>; - phy-handle = <&phy0>; + phy-handle = <&sgmii_phy0>; phy-connection-type = "sgmii"; - status = "ok"; + status = "okay"; }; &enet2 { - phy-handle = <&phy1>; + phy-handle = <&rgmii_phy1>; phy-connection-type = "rgmii-id"; - status = "ok"; + status = "okay"; }; &i2c0 { @@ -136,13 +142,13 @@ }; &mdio0 { - phy0: ethernet-phy@0 { + sgmii_phy0: ethernet-phy@0 { reg = <0x0>; }; - phy1: ethernet-phy@1 { + rgmii_phy1: ethernet-phy@1 { reg = <0x1>; }; - phy2: ethernet-phy@2 { + sgmii_phy2: ethernet-phy@2 { reg = <0x2>; }; tbi1: tbi-phy@1f { |