Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cooloney/blackfin-2.6

* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cooloney/blackfin-2.6: (24 commits)
  [Blackfin] arch: import defines for BF547 -- it is just like the BF548, but no CAN
  [Blackfin] arch: fix build fails only include header files when enabled
  [Blackfin] arch: declare default INSTALL_PATH for Blackfin ports
  [Blackfin] arch: Encourage users to use the spidev character driver: Provide platform support
  [Blackfin] arch: Enable UART2 and UART3 for bf548
  [Blackfin] arch: Enable NET2272 on BF561-EZkit - remove request_mem_region
  [Blackfin] arch:Fix BUG [#3876] pfbutton test for BTN3 on bf533 don't show complete info
  [Blackfin] arch: remove duplicated definitions of the line discipline numbers N_* in asm-blackfin/termios.h
  [Blackfin] arch: fix building with mtd uclinux by putting the mtd_phys option into the function it actually gets used in
  [Blackfin] arch: simpler header and update dates
  [Blackfin] arch: move the init sections to the end of memory
  [Blackfin] arch: change the trace buffer control start/stop logic in the exception handlers
  [Blackfin] arch: fix typo in printk message
  [Blackfin] arch: this is an ezkit, not a stamp, so fixup the init function name
  [Blackfin] arch: add slightly better help text for CPLB_INFO
  [Blackfin] arch: Fix BUG - Enable ISP1362 driver to work ok with BF561
  [Blackfin] arch: Fix header file information
  [Blackfin] arch: Add Support for ISP1362
  [Blackfin] arch: add support for cmdline partitioning to the BF533-STAMP flash map driver and enable it as a module by default
  [Blackfin] arch: hook up set_irq_wake in Blackfin's irq code
  ...

1 files changed, 31 insertions, 1 deletions

diff --git a/arch/blackfin/mach-common/dpmc.S b/arch/blackfin/mach-common/dpmc.S
index b82c096e..b80ddd8 100644
--- a/arch/blackfin/mach-common/dpmc.S
+++ b/arch/blackfin/mach-common/dpmc.S
@@ -191,6 +191,9 @@ ENTRY(_sleep_mode)
 	call _test_pll_locked;
 
 	R0 = IWR_ENABLE(0);
+	R1 = IWR_DISABLE_ALL;
+	R2 = IWR_DISABLE_ALL;
+
 	call _set_sic_iwr;
 
 	P0.H = hi(PLL_CTL);
@@ -237,6 +240,10 @@ ENTRY(_deep_sleep)
 
 	CLI R4;
 
+	R0 = IWR_ENABLE(0);
+	R1 = IWR_DISABLE_ALL;
+	R2 = IWR_DISABLE_ALL;
+
 	call _set_sic_iwr;
 
 	call _set_dram_srfs;
@@ -261,6 +268,9 @@ ENTRY(_deep_sleep)
 	call _test_pll_locked;
 
 	R0 = IWR_ENABLE(0);
+	R1 = IWR_DISABLE_ALL;
+	R2 = IWR_DISABLE_ALL;
+
 	call _set_sic_iwr;
 
 	P0.H = hi(PLL_CTL);
@@ -286,7 +296,13 @@ ENTRY(_sleep_deeper)
 	CLI R4;
 
 	P3 = R0;
+	P4 = R1;
+	P5 = R2;
+
 	R0 = IWR_ENABLE(0);
+	R1 = IWR_DISABLE_ALL;
+	R2 = IWR_DISABLE_ALL;
+
 	call _set_sic_iwr;
 	call _set_dram_srfs;	/* Set SDRAM Self Refresh */
 
@@ -327,6 +343,8 @@ ENTRY(_sleep_deeper)
 	call _test_pll_locked;
 
 	R0 = P3;
+	R1 = P4;
+	R3 = P5;
 	call _set_sic_iwr;	/* Set Awake from IDLE */
 
 	P0.H = hi(PLL_CTL);
@@ -340,6 +358,9 @@ ENTRY(_sleep_deeper)
 	call _test_pll_locked;
 
 	R0 = IWR_ENABLE(0);
+	R1 = IWR_DISABLE_ALL;
+	R2 = IWR_DISABLE_ALL;
+
 	call _set_sic_iwr;	/* Set Awake from IDLE PLL */
 
 	P0.H = hi(VR_CTL);
@@ -417,14 +438,23 @@ ENTRY(_unset_dram_srfs)
 	RTS;
 
 ENTRY(_set_sic_iwr)
-#if defined(CONFIG_BF54x) || defined(CONFIG_BF52x)
+#if defined(CONFIG_BF54x) || defined(CONFIG_BF52x)  || defined(CONFIG_BF561)
 	P0.H = hi(SIC_IWR0);
 	P0.L = lo(SIC_IWR0);
+	P1.H = hi(SIC_IWR1);
+	P1.L = lo(SIC_IWR1);
+	[P1] = R1;
+#if defined(CONFIG_BF54x)
+	P1.H = hi(SIC_IWR2);
+	P1.L = lo(SIC_IWR2);
+	[P1] = R2;
+#endif
 #else
 	P0.H = hi(SIC_IWR);
 	P0.L = lo(SIC_IWR);
 #endif
 	[P0] = R0;
+
 	SSYNC;
 	RTS;