diff options
| author | Scott Wood <scottwood@freescale.com> | 2014-03-26 00:24:57 (GMT) |
|---|---|---|
| committer | Jose Rivera <German.Rivera@freescale.com> | 2014-04-03 00:12:42 (GMT) |
| commit | e69d7cf496b4a7f6dfb0c7c9acda1797c2a9e608 (patch) | |
| tree | 3beb4306ab958fdb8e861a381067b49e10433ec7 /arch/powerpc/include | |
| parent | e2d0d92f7a4b7d8b74ca9acd4527414f6bf2b41f (diff) | |
| download | linux-fsl-qoriq-e69d7cf496b4a7f6dfb0c7c9acda1797c2a9e608.tar.xz | |
Revert "powerpc/mpc85xx/e6500: work around CPU erratum A-006198"
This reverts commit f4c0e693ccc3422c5b809e7cc8f59b7637e3b7ab.
rev1 is no longer supported in the SDK, and the workaround for A-006198
conflicts with machine check support.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Change-Id: I64e1ce19eb59a6bba8649156597cc49ff9b62b1e
Reviewed-on: http://git.am.freescale.net:8181/10271
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Kim Phillips <Kim.Phillips@freescale.com>
Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
Diffstat (limited to 'arch/powerpc/include')
| -rw-r--r-- | arch/powerpc/include/asm/hw_irq.h | 47 | ||||
| -rw-r--r-- | arch/powerpc/include/asm/ppc_asm.h | 43 |
2 files changed, 2 insertions, 88 deletions
diff --git a/arch/powerpc/include/asm/hw_irq.h b/arch/powerpc/include/asm/hw_irq.h index 39d335b..10be1dd 100644 --- a/arch/powerpc/include/asm/hw_irq.h +++ b/arch/powerpc/include/asm/hw_irq.h @@ -89,31 +89,7 @@ static inline bool arch_irqs_disabled(void) #ifdef CONFIG_PPC_BOOK3E #define __hard_irq_enable() asm volatile("wrteei 1" : : : "memory") - -#ifdef CONFIG_FSL_ERRATUM_A_006198 -static inline void __hard_irq_disable(void) -{ - void fsl_erratum_a006198_return(void); - unsigned long tmp; - - asm volatile("bl 2f;" - "2: mflr %0;" - "addi %0, %0, 1f-2b;" - "mtlr %0;" - "mtspr %1, %4;" - "mfmsr %0;" - "rlwinm %0, %0, 0, ~%3;" - "mtspr %2, %0;" - "rfmci;" - "1: mtmsr %0" : "=&r" (tmp) : - "i" (SPRN_MCSRR0), "i" (SPRN_MCSRR1), - "i" (MSR_EE), "r" (*(u64 *)fsl_erratum_a006198_return) : - "memory", "lr"); -} -#else #define __hard_irq_disable() asm volatile("wrteei 0" : : : "memory") -#endif - #else #define __hard_irq_enable() __mtmsrd(local_paca->kernel_msr | MSR_EE, 1) #define __hard_irq_disable() __mtmsrd(local_paca->kernel_msr, 1) @@ -157,8 +133,6 @@ extern bool prep_irq_for_idle(void); #define SET_MSR_EE(x) mtmsr(x) -#define __hard_irq_disable() asm volatile("wrteei 0" : : : "memory") - static inline unsigned long arch_local_save_flags(void) { return mfmsr(); @@ -167,24 +141,7 @@ static inline unsigned long arch_local_save_flags(void) static inline void arch_local_irq_restore(unsigned long flags) { #if defined(CONFIG_BOOKE) -#ifdef CONFIG_FSL_ERRATUM_A_006198 - void fsl_erratum_a006198_return(void); - unsigned long tmp; - - asm volatile("bl 2f;" - "2: mflr %0;" - "addi %0, %0, 1f-2b;" - "mtlr %0;" - "mtspr %1, %3;" - "mtspr %2, %4;" - "rfmci;" - "1: mtmsr %3" : "=&r" (tmp) : - "i" (SPRN_MCSRR1), "i" (SPRN_MCSRR0), - "r" (flags), "r" (*(u64 *)fsl_erratum_a006198_return) : - "memory", "lr"); -#else asm volatile("wrtee %0" : : "r" (flags) : "memory"); -#endif #else mtmsr(flags); #endif @@ -194,7 +151,7 @@ static inline unsigned long arch_local_irq_save(void) { unsigned long flags = arch_local_save_flags(); #ifdef CONFIG_BOOKE - __hard_irq_disable(); + asm volatile("wrteei 0" : : : "memory"); #else SET_MSR_EE(flags & ~MSR_EE); #endif @@ -204,7 +161,7 @@ static inline unsigned long arch_local_irq_save(void) static inline void arch_local_irq_disable(void) { #ifdef CONFIG_BOOKE - __hard_irq_disable(); + asm volatile("wrteei 0" : : : "memory"); #else arch_local_irq_save(); #endif diff --git a/arch/powerpc/include/asm/ppc_asm.h b/arch/powerpc/include/asm/ppc_asm.h index e2f9a7a..f595b98 100644 --- a/arch/powerpc/include/asm/ppc_asm.h +++ b/arch/powerpc/include/asm/ppc_asm.h @@ -755,49 +755,6 @@ END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,945) #define N_SLINE 68 #define N_SO 100 -.macro fsl_erratum_a006198_mtmsr newmsr scratch1 scratch2 -#ifdef CONFIG_FSL_ERRATUM_A_006198 - mflr \scratch2 - LOAD_REG_IMMEDIATE(\scratch1, 237f) - mtlr \scratch1 - LOAD_REG_IMMEDIATE(\scratch1, .fsl_erratum_a006198_return) - mtspr SPRN_MCSRR1, \newmsr - mtspr SPRN_MCSRR0, \scratch1 - rfmci -237: mtmsr \newmsr - mtlr \scratch2 -#else - mtmsr \newmsr -#endif -.endm - -.macro fsl_erratum_a006198_wrteei0 scratch1 scratch2 -#ifdef CONFIG_FSL_ERRATUM_A_006198 - mflr \scratch2 - LOAD_REG_IMMEDIATE(\scratch1, 237f) - mtlr \scratch1 - LOAD_REG_IMMEDIATE(\scratch1, .fsl_erratum_a006198_return) - mtspr SPRN_MCSRR0, \scratch1 - mfmsr \scratch1 - rlwinm \scratch1, \scratch1, 0, ~MSR_EE - mtspr SPRN_MCSRR1, \scratch1 - rfmci -237: mtmsr \scratch1 - mtlr \scratch2 -#else - wrteei 0 -#endif -.endm - -.macro fsl_erratum_a006198_restore_srr scratch -#ifdef CONFIG_FSL_ERRATUM_A_006198 - LOAD_REG_IMMEDIATE(\scratch, .fsl_erratum_a006198_return) - mtspr SPRN_MCSRR0, \scratch - lis \scratch, MSR_CM@h - mtspr SPRN_MCSRR1, \scratch -#endif -.endm - /* * Create an endian fixup trampoline * |