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authorAndy Fleming <afleming@freescale.com>2013-03-30 00:10:12 (GMT)
committerEmil Medve <Emilian.Medve@Freescale.com>2013-04-02 09:48:02 (GMT)
commit03f8008a6a6e45015dddeada9d23ef949e98b6d3 (patch)
treeab75bcf3acad4314aaea8b671f83e4e4b18128aa /arch/powerpc
parent04ed5aa4a400dea723187b3668aa5cf57bdb8737 (diff)
downloadlinux-fsl-qoriq-03f8008a6a6e45015dddeada9d23ef949e98b6d3.tar.xz
powerpc: Update device trees to support DPAA
The Datapath Acceleration Architecture devices are added to the SOCs which make use of them. Compile-tested only. The big changes from 1.3: 1) PAMU support now updated in each device to reflect new architecture which specifies the PAMU topology. 2) Virtual MDIO drivers are now specified using the new generic architecture. Signed-off-by: Andy Fleming <afleming@freescale.com> Change-Id: Id287a528bf94067aa60f721916462f0797161d89 Reviewed-on: http://git.am.freescale.net:8181/911 Reviewed-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com> Tested-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
Diffstat (limited to 'arch/powerpc')
-rw-r--r--arch/powerpc/boot/dts/fsl/p1023si-post.dtsi121
-rw-r--r--arch/powerpc/boot/dts/fsl/p1023si-pre.dtsi1
-rw-r--r--arch/powerpc/boot/dts/fsl/p2041si-post.dtsi72
-rw-r--r--arch/powerpc/boot/dts/fsl/p2041si-pre.dtsi3
-rw-r--r--arch/powerpc/boot/dts/fsl/p3041si-post.dtsi70
-rw-r--r--arch/powerpc/boot/dts/fsl/p3041si-pre.dtsi3
-rw-r--r--arch/powerpc/boot/dts/fsl/p4080si-post.dtsi116
-rw-r--r--arch/powerpc/boot/dts/fsl/p4080si-pre.dtsi3
-rw-r--r--arch/powerpc/boot/dts/fsl/p5020si-post.dtsi75
-rw-r--r--arch/powerpc/boot/dts/fsl/p5020si-pre.dtsi3
-rw-r--r--arch/powerpc/boot/dts/fsl/p5040si-post.dtsi120
-rw-r--r--arch/powerpc/boot/dts/fsl/p5040si-pre.dtsi8
-rw-r--r--arch/powerpc/boot/dts/fsl/t4240si-post.dtsi152
-rw-r--r--arch/powerpc/boot/dts/fsl/t4240si-pre.dtsi38
-rw-r--r--arch/powerpc/boot/dts/p1023rds.dts39
-rw-r--r--arch/powerpc/boot/dts/p2041rdb.dts161
-rw-r--r--arch/powerpc/boot/dts/p3041ds.dts214
-rw-r--r--arch/powerpc/boot/dts/p4080ds.dts291
-rw-r--r--arch/powerpc/boot/dts/p5020ds.dts214
-rw-r--r--arch/powerpc/boot/dts/p5040ds.dts386
-rw-r--r--arch/powerpc/boot/dts/t4240qds.dts409
21 files changed, 2443 insertions, 56 deletions
diff --git a/arch/powerpc/boot/dts/fsl/p1023si-post.dtsi b/arch/powerpc/boot/dts/fsl/p1023si-post.dtsi
index 2f0ed36..3344f9a 100644
--- a/arch/powerpc/boot/dts/fsl/p1023si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p1023si-post.dtsi
@@ -1,7 +1,7 @@
/*
* P1023/P1017 Silicon/SoC Device Tree Source (post include)
*
- * Copyright 2011 Freescale Semiconductor Inc.
+ * Copyright 2011-2012 Freescale Semiconductor Inc.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
@@ -289,4 +289,123 @@
reg = <0xe0000 0x1000>;
fsl,has-rstcr;
};
+
+ fman0: fman@100000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ cell-index = <0>;
+ compatible = "fsl,fman", "simple-bus";
+ ranges = <0 0x100000 0x100000>;
+ reg = <0x100000 0x100000>;
+ clock-frequency = <0>;
+ interrupts = <
+ 24 2 0 0
+ 16 2 0 0>;
+ cc@0 {
+ compatible = "fsl,fman-cc";
+ };
+ muram@0 {
+ compatible = "fsl,fman-muram";
+ reg = <0x0 0x10000>;
+ };
+ bmi@80000 {
+ compatible = "fsl,fman-bmi";
+ reg = <0x80000 0x400>;
+ };
+ qmi@80400 {
+ compatible = "fsl,fman-qmi";
+ reg = <0x80400 0x400>;
+ };
+ policer@c0000 {
+ compatible = "fsl,fman-policer";
+ reg = <0xc0000 0x1000>;
+ };
+ keygen@c1000 {
+ compatible = "fsl,fman-keygen";
+ reg = <0xc1000 0x1000>;
+ };
+ dma@c2000 {
+ compatible = "fsl,fman-dma";
+ reg = <0xc2000 0x1000>;
+ };
+ fpm@c3000 {
+ compatible = "fsl,fman-fpm";
+ reg = <0xc3000 0x1000>;
+ };
+ parser@c7000 {
+ compatible = "fsl,fman-parser";
+ reg = <0xc7000 0x1000>;
+ };
+ fman0_rx0: port@88000 {
+ cell-index = <0>;
+ compatible = "fsl,fman-port-1g-rx";
+ reg = <0x88000 0x1000>;
+ };
+ fman0_rx1: port@89000 {
+ cell-index = <1>;
+ compatible = "fsl,fman-port-1g-rx";
+ reg = <0x89000 0x1000>;
+ };
+ fman0_tx0: port@a8000 {
+ cell-index = <0>;
+ compatible = "fsl,fman-port-1g-tx";
+ reg = <0xa8000 0x1000>;
+ fsl,qman-channel-id = <0x40>;
+ };
+ fman0_tx1: port@a9000 {
+ cell-index = <1>;
+ compatible = "fsl,fman-port-1g-tx";
+ reg = <0xa9000 0x1000>;
+ fsl,qman-channel-id = <0x41>;
+ };
+ fman0_oh1: port@82000 {
+ cell-index = <1>;
+ compatible = "fsl,fman-port-oh";
+ reg = <0x82000 0x1000>;
+ fsl,qman-channel-id = <0x43>;
+ };
+ fman0_oh2: port@83000 {
+ cell-index = <2>;
+ compatible = "fsl,fman-port-oh";
+ reg = <0x83000 0x1000>;
+ fsl,qman-channel-id = <0x44>;
+ };
+ fman0_oh3: port@84000 {
+ cell-index = <3>;
+ compatible = "fsl,fman-port-oh";
+ reg = <0x84000 0x1000>;
+ fsl,qman-channel-id = <0x45>;
+ };
+ fman0_oh4: port@85000 {
+ cell-index = <4>;
+ compatible = "fsl,fman-port-oh";
+ reg = <0x85000 0x1000>;
+ fsl,qman-channel-id = <0x46>;
+ };
+ enet0: ethernet@e0000 {
+ cell-index = <0>;
+ compatible = "fsl,fman-1g-mac";
+ reg = <0xe0000 0x1000>;
+ fsl,port-handles = <&fman0_rx0 &fman0_tx0>;
+ ptimer-handle = <&ptp_timer0>;
+ };
+ enet1: ethernet@e2000 {
+ cell-index = <1>;
+ compatible = "fsl,fman-1g-mac";
+ reg = <0xe2000 0x1000>;
+ fsl,port-handles = <&fman0_rx1 &fman0_tx1>;
+ ptimer-handle = <&ptp_timer0>;
+ };
+ mdio0: mdio@e1120 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,fman-mdio";
+ reg = <0xe1120 0xee0>;
+ interrupts = <26 1 0 0>;
+ };
+ ptp_timer0: rtc@fe000 {
+ compatible = "fsl,fman-rtc";
+ reg = <0xfe000 0x1000>;
+ };
+ };
};
diff --git a/arch/powerpc/boot/dts/fsl/p1023si-pre.dtsi b/arch/powerpc/boot/dts/fsl/p1023si-pre.dtsi
index 398df70..d07fdc2 100644
--- a/arch/powerpc/boot/dts/fsl/p1023si-pre.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p1023si-pre.dtsi
@@ -61,6 +61,7 @@
qman = &qman;
bman = &bman;
+ fman0 = &fman0;
};
cpus {
diff --git a/arch/powerpc/boot/dts/fsl/p2041si-post.dtsi b/arch/powerpc/boot/dts/fsl/p2041si-post.dtsi
index 217bb41..2c8881e 100644
--- a/arch/powerpc/boot/dts/fsl/p2041si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p2041si-post.dtsi
@@ -423,6 +423,10 @@
/include/ "qoriq-duart-0.dtsi"
/include/ "qoriq-duart-1.dtsi"
/include/ "qoriq-gpio-0.dtsi"
+/include/ "qoriq-rman-0.dtsi"
+ rman: rman@1e0000 {
+ fsl,qman-channels-id = <0x62 0x63>;
+ };
/include/ "qoriq-usb2-mph-0.dtsi"
usb0: usb@210000 {
compatible = "fsl-usb2-mph-v1.6", "fsl,mpc85xx-usb2-mph", "fsl-usb2-mph";
@@ -431,7 +435,6 @@
fsl,liodn-reg = <&guts 0x520>; /* USB1LIODNR */
port0;
};
-
/include/ "qoriq-usb2-dr-0.dtsi"
usb1: usb@211000 {
compatible = "fsl-usb2-dr-v1.6", "fsl,mpc85xx-usb2-dr", "fsl-usb2-dr";
@@ -440,29 +443,78 @@
dr_mode = "host";
phy_type = "utmi";
};
-
/include/ "qoriq-sata2-0.dtsi"
sata@220000 {
fsl,iommu-parent = <&pamu1>;
fsl,liodn-reg = <&guts 0x550>; /* SATA1LIODNR */
};
-
/include/ "qoriq-sata2-1.dtsi"
sata@221000 {
fsl,iommu-parent = <&pamu1>;
fsl,liodn-reg = <&guts 0x554>; /* SATA2LIODNR */
};
-
/include/ "qoriq-sec4.2-0.dtsi"
-crypto: crypto@300000 {
+ crypto: crypto@300000 {
fsl,iommu-parent = <&pamu1>;
};
-
+/include/ "qoriq-pme-0.dtsi"
/include/ "qoriq-qman1.dtsi"
/include/ "qoriq-bman1.dtsi"
-
-/include/ "qoriq-rman-0.dtsi"
- rman: rman@1e0000 {
- fsl,qman-channels-id = <0x62 0x63>;
+/include/ "qoriq-fman-0.dtsi"
+/include/ "qoriq-fman-0-1g-0.dtsi"
+/include/ "qoriq-fman-0-1g-1.dtsi"
+/include/ "qoriq-fman-0-1g-2.dtsi"
+/include/ "qoriq-fman-0-1g-3.dtsi"
+/include/ "qoriq-fman-0-1g-4.dtsi"
+/include/ "qoriq-fman-0-10g-0.dtsi"
+ fman0: fman@400000 {
+ /* tx - 1g - 0 */
+ port@a8000 {
+ fsl,qman-channel-id = <0x41>;
+ };
+ /* tx - 1g - 1 */
+ port@a9000 {
+ fsl,qman-channel-id = <0x42>;
+ };
+ /* tx - 1g - 2 */
+ port@aa000 {
+ fsl,qman-channel-id = <0x43>;
+ };
+ /* tx - 1g - 3 */
+ port@ab000 {
+ fsl,qman-channel-id = <0x44>;
+ };
+ /* tx - 1g - 4 */
+ port@ac000 {
+ fsl,qman-channel-id = <0x45>;
+ };
+ /* tx - 10g - 0 */
+ port@b0000 {
+ fsl,qman-channel-id = <0x40>;
+ };
+ /* offline 0 */
+ port@81000 {
+ fsl,qman-channel-id = <0x46>;
+ };
+ /* offline 1 */
+ port@82000 {
+ fsl,qman-channel-id = <0x47>;
+ };
+ /* offline 2 */
+ port@83000 {
+ fsl,qman-channel-id = <0x48>;
+ };
+ /* offline 3 */
+ port@84000 {
+ fsl,qman-channel-id = <0x49>;
+ };
+ /* offline 4 */
+ port@85000 {
+ fsl,qman-channel-id = <0x4a>;
+ };
+ /* offline 5 */
+ port@86000 {
+ fsl,qman-channel-id = <0x4b>;
+ };
};
};
diff --git a/arch/powerpc/boot/dts/fsl/p2041si-pre.dtsi b/arch/powerpc/boot/dts/fsl/p2041si-pre.dtsi
index 5eee654..9c2c945 100644
--- a/arch/powerpc/boot/dts/fsl/p2041si-pre.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p2041si-pre.dtsi
@@ -73,8 +73,11 @@
rtic_d = &rtic_d;
sec_mon = &sec_mon;
+ rman = &rman;
+ pme = &pme;
qman = &qman;
bman = &bman;
+ fman0 = &fman0;
};
cpus {
diff --git a/arch/powerpc/boot/dts/fsl/p3041si-post.dtsi b/arch/powerpc/boot/dts/fsl/p3041si-post.dtsi
index 20a241c0..a920414 100644
--- a/arch/powerpc/boot/dts/fsl/p3041si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p3041si-post.dtsi
@@ -450,6 +450,10 @@
/include/ "qoriq-duart-0.dtsi"
/include/ "qoriq-duart-1.dtsi"
/include/ "qoriq-gpio-0.dtsi"
+/include/ "qoriq-rman-0.dtsi"
+ rman: rman@1e0000 {
+ fsl,qman-channels-id = <0x62 0x63>;
+ };
/include/ "qoriq-usb2-mph-0.dtsi"
usb0: usb@210000 {
compatible = "fsl-usb2-mph-v1.6", "fsl-usb2-mph";
@@ -458,7 +462,6 @@
fsl,liodn-reg = <&guts 0x520>; /* USB1LIODNR */
port0;
};
-
/include/ "qoriq-usb2-dr-0.dtsi"
usb1: usb@211000 {
compatible = "fsl-usb2-dr-v1.6", "fsl,mpc85xx-usb2-dr", "fsl-usb2-dr";
@@ -467,29 +470,78 @@
dr_mode = "host";
phy_type = "utmi";
};
-
/include/ "qoriq-sata2-0.dtsi"
sata@220000 {
fsl,iommu-parent = <&pamu1>;
fsl,liodn-reg = <&guts 0x550>; /* SATA1LIODNR */
};
-
/include/ "qoriq-sata2-1.dtsi"
sata@221000 {
fsl,iommu-parent = <&pamu1>;
fsl,liodn-reg = <&guts 0x554>; /* SATA2LIODNR */
};
-
/include/ "qoriq-sec4.2-0.dtsi"
crypto: crypto@300000 {
fsl,iommu-parent = <&pamu1>;
};
-
+/include/ "qoriq-pme-0.dtsi"
/include/ "qoriq-qman1.dtsi"
/include/ "qoriq-bman1.dtsi"
-
-/include/ "qoriq-rman-0.dtsi"
- rman: rman@1e0000 {
- fsl,qman-channels-id = <0x62 0x63>;
+/include/ "qoriq-fman-0.dtsi"
+/include/ "qoriq-fman-0-1g-0.dtsi"
+/include/ "qoriq-fman-0-1g-1.dtsi"
+/include/ "qoriq-fman-0-1g-2.dtsi"
+/include/ "qoriq-fman-0-1g-3.dtsi"
+/include/ "qoriq-fman-0-1g-4.dtsi"
+/include/ "qoriq-fman-0-10g-0.dtsi"
+ fman0: fman@400000 {
+ /* tx - 1g - 0 */
+ port@a8000 {
+ fsl,qman-channel-id = <0x41>;
+ };
+ /* tx - 1g - 1 */
+ port@a9000 {
+ fsl,qman-channel-id = <0x42>;
+ };
+ /* tx - 1g - 2 */
+ port@aa000 {
+ fsl,qman-channel-id = <0x43>;
+ };
+ /* tx - 1g - 3 */
+ port@ab000 {
+ fsl,qman-channel-id = <0x44>;
+ };
+ /* tx - 1g - 4 */
+ port@ac000 {
+ fsl,qman-channel-id = <0x45>;
+ };
+ /* tx - 10g - 0 */
+ port@b0000 {
+ fsl,qman-channel-id = <0x40>;
+ };
+ /* offline 0 */
+ port@81000 {
+ fsl,qman-channel-id = <0x46>;
+ };
+ /* offline 1 */
+ port@82000 {
+ fsl,qman-channel-id = <0x47>;
+ };
+ /* offline 2 */
+ port@83000 {
+ fsl,qman-channel-id = <0x48>;
+ };
+ /* offline 3 */
+ port@84000 {
+ fsl,qman-channel-id = <0x49>;
+ };
+ /* offline 4 */
+ port@85000 {
+ fsl,qman-channel-id = <0x4a>;
+ };
+ /* offline 5 */
+ port@86000 {
+ fsl,qman-channel-id = <0x4b>;
+ };
};
};
diff --git a/arch/powerpc/boot/dts/fsl/p3041si-pre.dtsi b/arch/powerpc/boot/dts/fsl/p3041si-pre.dtsi
index eb5a499..07a21d8 100644
--- a/arch/powerpc/boot/dts/fsl/p3041si-pre.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p3041si-pre.dtsi
@@ -74,8 +74,11 @@
rtic_d = &rtic_d;
sec_mon = &sec_mon;
+ rman = &rman;
+ pme = &pme;
qman = &qman;
bman = &bman;
+ fman0 = &fman0;
};
cpus {
diff --git a/arch/powerpc/boot/dts/fsl/p4080si-post.dtsi b/arch/powerpc/boot/dts/fsl/p4080si-post.dtsi
index 3e0b4ec..23b20a7 100644
--- a/arch/powerpc/boot/dts/fsl/p4080si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p4080si-post.dtsi
@@ -525,8 +525,120 @@
/include/ "qoriq-sec4.0-0.dtsi"
crypto: crypto@300000 {
fsl,iommu-parent = <&pamu1>;
- };
-
+};
+/include/ "qoriq-pme-0.dtsi"
/include/ "qoriq-qman1.dtsi"
/include/ "qoriq-bman1.dtsi"
+/include/ "qoriq-fman-0.dtsi"
+/include/ "qoriq-fman-0-1g-0.dtsi"
+/include/ "qoriq-fman-0-1g-1.dtsi"
+/include/ "qoriq-fman-0-1g-2.dtsi"
+/include/ "qoriq-fman-0-1g-3.dtsi"
+/include/ "qoriq-fman-0-10g-0.dtsi"
+ fman0: fman@400000 {
+ /* tx - 1g - 0 */
+ port@a8000 {
+ fsl,qman-channel-id = <0x41>;
+ };
+ /* tx - 1g - 1 */
+ port@a9000 {
+ fsl,qman-channel-id = <0x42>;
+ };
+ /* tx - 1g - 2 */
+ port@aa000 {
+ fsl,qman-channel-id = <0x43>;
+ };
+ /* tx - 1g - 3 */
+ port@ab000 {
+ fsl,qman-channel-id = <0x44>;
+ };
+ /* tx - 10g - 0 */
+ port@b0000 {
+ fsl,qman-channel-id = <0x40>;
+ };
+ /* offline 0 */
+ port@81000 {
+ fsl,qman-channel-id = <0x45>;
+ };
+ /* offline 1 */
+ port@82000 {
+ fsl,qman-channel-id = <0x46>;
+ };
+ /* offline 2 */
+ port@83000 {
+ fsl,qman-channel-id = <0x47>;
+ };
+ /* offline 3 */
+ port@84000 {
+ fsl,qman-channel-id = <0x48>;
+ };
+ /* offline 4 */
+ port@85000 {
+ fsl,qman-channel-id = <0x49>;
+ };
+ /* offline 5 */
+ port@86000 {
+ fsl,qman-channel-id = <0x4a>;
+ };
+ /* offline 6 */
+ port@87000 {
+ fsl,qman-channel-id = <0x4b>;
+ };
+ };
+/include/ "qoriq-fman-1.dtsi"
+/include/ "qoriq-fman-1-1g-0.dtsi"
+/include/ "qoriq-fman-1-1g-1.dtsi"
+/include/ "qoriq-fman-1-1g-2.dtsi"
+/include/ "qoriq-fman-1-1g-3.dtsi"
+/include/ "qoriq-fman-1-10g-0.dtsi"
+ fman1: fman@500000 {
+ /* tx - 1g - 0 */
+ port@a8000 {
+ fsl,qman-channel-id = <0x61>;
+ };
+ /* tx - 1g - 1 */
+ port@a9000 {
+ fsl,qman-channel-id = <0x62>;
+ };
+ /* tx - 1g - 2 */
+ port@aa000 {
+ fsl,qman-channel-id = <0x63>;
+ };
+ /* tx - 1g - 3 */
+ port@ab000 {
+ fsl,qman-channel-id = <0x64>;
+ };
+ /* tx - 10g - 0 */
+ port@b0000 {
+ fsl,qman-channel-id = <0x60>;
+ };
+ /* offline 0 */
+ port@81000 {
+ fsl,qman-channel-id = <0x65>;
+ };
+ /* offline 1 */
+ port@82000 {
+ fsl,qman-channel-id = <0x66>;
+ };
+ /* offline 2 */
+ port@83000 {
+ fsl,qman-channel-id = <0x67>;
+ };
+ /* offline 3 */
+ port@84000 {
+ fsl,qman-channel-id = <0x68>;
+ };
+ /* offline 4 */
+ port@85000 {
+ fsl,qman-channel-id = <0x69>;
+ };
+ /* offline 5 */
+ port@86000 {
+ fsl,qman-channel-id = <0x6a>;
+ };
+ /* offline 6 */
+ port@87000 {
+ fsl,qman-channel-id = <0x6b>;
+ };
+ };
};
diff --git a/arch/powerpc/boot/dts/fsl/p4080si-pre.dtsi b/arch/powerpc/boot/dts/fsl/p4080si-pre.dtsi
index a4afea1..dee237a 100644
--- a/arch/powerpc/boot/dts/fsl/p4080si-pre.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p4080si-pre.dtsi
@@ -73,8 +73,11 @@
rtic_d = &rtic_d;
sec_mon = &sec_mon;
+ pme = &pme;
qman = &qman;
bman = &bman;
+ fman0 = &fman0;
+ fman1 = &fman1;
};
cpus {
diff --git a/arch/powerpc/boot/dts/fsl/p5020si-post.dtsi b/arch/powerpc/boot/dts/fsl/p5020si-post.dtsi
index 8946d0e..5fc2e4b 100644
--- a/arch/powerpc/boot/dts/fsl/p5020si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p5020si-post.dtsi
@@ -435,6 +435,10 @@
/include/ "qoriq-duart-0.dtsi"
/include/ "qoriq-duart-1.dtsi"
/include/ "qoriq-gpio-0.dtsi"
+/include/ "qoriq-rman-0.dtsi"
+ rman: rman@1e0000 {
+ fsl,qman-channels-id = <0x62 0x63>;
+ };
/include/ "qoriq-usb2-mph-0.dtsi"
usb0: usb@210000 {
compatible = "fsl-usb2-mph-v1.6", "fsl,mpc85xx-usb2-mph", "fsl-usb2-mph";
@@ -443,7 +447,6 @@
phy_type = "utmi";
port0;
};
-
/include/ "qoriq-usb2-dr-0.dtsi"
usb1: usb@211000 {
compatible = "fsl-usb2-dr-v1.6", "fsl,mpc85xx-usb2-dr", "fsl-usb2-dr";
@@ -452,13 +455,11 @@
dr_mode = "host";
phy_type = "utmi";
};
-
/include/ "qoriq-sata2-0.dtsi"
sata@220000 {
fsl,iommu-parent = <&pamu1>;
fsl,liodn-reg = <&guts 0x550>; /* SATA1LIODNR */
};
-
/include/ "qoriq-sata2-1.dtsi"
sata@221000 {
fsl,iommu-parent = <&pamu1>;
@@ -468,17 +469,69 @@
crypto@300000 {
fsl,iommu-parent = <&pamu1>;
};
-
-/include/ "qoriq-qman1.dtsi"
-/include/ "qoriq-bman1.dtsi"
-
/include/ "qoriq-raid1.0-0.dtsi"
raideng@320000 {
fsl,iommu-parent = <&pamu1>;
};
-
-/include/ "qoriq-rman-0.dtsi"
- rman: rman@1e0000 {
- fsl,qman-channels-id = <0x62 0x63>;
+/include/ "qoriq-pme-0.dtsi"
+/include/ "qoriq-qman1.dtsi"
+/include/ "qoriq-bman1.dtsi"
+/include/ "qoriq-fman-0.dtsi"
+/include/ "qoriq-fman-0-1g-0.dtsi"
+/include/ "qoriq-fman-0-1g-1.dtsi"
+/include/ "qoriq-fman-0-1g-2.dtsi"
+/include/ "qoriq-fman-0-1g-3.dtsi"
+/include/ "qoriq-fman-0-1g-4.dtsi"
+/include/ "qoriq-fman-0-10g-0.dtsi"
+ fman0: fman@400000 {
+ /* tx - 1g - 0 */
+ port@a8000 {
+ fsl,qman-channel-id = <0x41>;
+ };
+ /* tx - 1g - 1 */
+ port@a9000 {
+ fsl,qman-channel-id = <0x42>;
+ };
+ /* tx - 1g - 2 */
+ port@aa000 {
+ fsl,qman-channel-id = <0x43>;
+ };
+ /* tx - 1g - 3 */
+ port@ab000 {
+ fsl,qman-channel-id = <0x44>;
+ };
+ /* tx - 1g - 4 */
+ port@ac000 {
+ fsl,qman-channel-id = <0x45>;
+ };
+ /* tx - 10g - 0 */
+ port@b0000 {
+ fsl,qman-channel-id = <0x40>;
+ };
+ /* offline 0 */
+ port@81000 {
+ fsl,qman-channel-id = <0x46>;
+ };
+ /* offline 1 */
+ port@82000 {
+ fsl,qman-channel-id = <0x47>;
+ };
+ /* offline 2 */
+ port@83000 {
+ fsl,qman-channel-id = <0x48>;
+ };
+ /* offline 3 */
+ port@84000 {
+ fsl,qman-channel-id = <0x49>;
+ };
+ /* offline 4 */
+ port@85000 {
+ fsl,qman-channel-id = <0x4a>;
+ };
+ /* offline 5 */
+ port@86000 {
+ fsl,qman-channel-id = <0x4b>;
+ };
};
+/include/ "qoriq-raid1.0-0.dtsi"
};
diff --git a/arch/powerpc/boot/dts/fsl/p5020si-pre.dtsi b/arch/powerpc/boot/dts/fsl/p5020si-pre.dtsi
index 3cf83ff..ee4b45f 100644
--- a/arch/powerpc/boot/dts/fsl/p5020si-pre.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p5020si-pre.dtsi
@@ -74,8 +74,11 @@
rtic_d = &rtic_d;
sec_mon = &sec_mon;
+ rman = &rman;
+ pme = &pme;
qman = &qman;
bman = &bman;
+ fman0 = &fman0;
raideng = &raideng;
raideng_jr0 = &raideng_jr0;
diff --git a/arch/powerpc/boot/dts/fsl/p5040si-post.dtsi b/arch/powerpc/boot/dts/fsl/p5040si-post.dtsi
index 820ed07..4a57371 100644
--- a/arch/powerpc/boot/dts/fsl/p5040si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p5040si-post.dtsi
@@ -415,7 +415,6 @@
phy_type = "utmi";
port0;
};
-
/include/ "qoriq-usb2-dr-0.dtsi"
usb1: usb@211000 {
compatible = "fsl-usb2-dr-v1.6", "fsl,mpc85xx-usb2-dr", "fsl-usb2-dr";
@@ -424,24 +423,135 @@
dr_mode = "host";
phy_type = "utmi";
};
-
/include/ "qoriq-sata2-0.dtsi"
sata@220000 {
fsl,iommu-parent = <&pamu4>;
fsl,liodn-reg = <&guts 0x550>; /* SATA1LIODNR */
};
-
/include/ "qoriq-sata2-1.dtsi"
sata@221000 {
fsl,iommu-parent = <&pamu4>;
fsl,liodn-reg = <&guts 0x554>; /* SATA2LIODNR */
};
-
/include/ "qoriq-sec5.2-0.dtsi"
crypto@300000 {
fsl,iommu-parent = <&pamu4>;
};
-
+/include/ "qoriq-raid1.0-0.dtsi"
/include/ "qoriq-qman1.dtsi"
/include/ "qoriq-bman1.dtsi"
+/include/ "qoriq-fman-0.dtsi"
+/include/ "qoriq-fman-0-1g-0.dtsi"
+/include/ "qoriq-fman-0-1g-1.dtsi"
+/include/ "qoriq-fman-0-1g-2.dtsi"
+/include/ "qoriq-fman-0-1g-3.dtsi"
+/include/ "qoriq-fman-0-1g-4.dtsi"
+/include/ "qoriq-fman-0-10g-0.dtsi"
+ fman0: fman@400000 {
+ /* tx - 1g - 0 */
+ port@a8000 {
+ fsl,qman-channel-id = <0x41>;
+ };
+ /* tx - 1g - 1 */
+ port@a9000 {
+ fsl,qman-channel-id = <0x42>;
+ };
+ /* tx - 1g - 2 */
+ port@aa000 {
+ fsl,qman-channel-id = <0x43>;
+ };
+ /* tx - 1g - 3 */
+ port@ab000 {
+ fsl,qman-channel-id = <0x44>;
+ };
+ /* tx - 1g - 4 */
+ port@ac000 {
+ fsl,qman-channel-id = <0x45>;
+ };
+ /* tx - 10g - 0 */
+ port@b0000 {
+ fsl,qman-channel-id = <0x40>;
+ };
+ /* offline 0 */
+ port@81000 {
+ fsl,qman-channel-id = <0x46>;
+ };
+ /* offline 1 */
+ port@82000 {
+ fsl,qman-channel-id = <0x47>;
+ };
+ /* offline 2 */
+ port@83000 {
+ fsl,qman-channel-id = <0x48>;
+ };
+ /* offline 3 */
+ port@84000 {
+ fsl,qman-channel-id = <0x49>;
+ };
+ /* offline 4 */
+ port@85000 {
+ fsl,qman-channel-id = <0x4a>;
+ };
+ /* offline 5 */
+ port@86000 {
+ fsl,qman-channel-id = <0x4b>;
+ };
+ };
+/include/ "qoriq-fman-1.dtsi"
+/include/ "qoriq-fman-1-1g-0.dtsi"
+/include/ "qoriq-fman-1-1g-1.dtsi"
+/include/ "qoriq-fman-1-1g-2.dtsi"
+/include/ "qoriq-fman-1-1g-3.dtsi"
+/include/ "qoriq-fman-1-1g-4.dtsi"
+/include/ "qoriq-fman-1-10g-0.dtsi"
+ fman1: fman@500000 {
+ /* tx - 1g - 0 */
+ port@a8000 {
+ fsl,qman-channel-id = <0x61>;
+ };
+ /* tx - 1g - 1 */
+ port@a9000 {
+ fsl,qman-channel-id = <0x62>;
+ };
+ /* tx - 1g - 2 */
+ port@aa000 {
+ fsl,qman-channel-id = <0x63>;
+ };
+ /* tx - 1g - 3 */
+ port@ab000 {
+ fsl,qman-channel-id = <0x64>;
+ };
+ /* tx - 1g - 4 */
+ port@ac000 {
+ fsl,qman-channel-id = <0x65>;
+ };
+ /* tx - 10g - 0 */
+ port@b0000 {
+ fsl,qman-channel-id = <0x60>;
+ };
+ /* offline 0 */
+ port@81000 {
+ fsl,qman-channel-id = <0x66>;
+ };
+ /* offline 1 */
+ port@82000 {
+ fsl,qman-channel-id = <0x67>;
+ };
+ /* offline 2 */
+ port@83000 {
+ fsl,qman-channel-id = <0x68>;
+ };
+ /* offline 3 */
+ port@84000 {
+ fsl,qman-channel-id = <0x69>;
+ };
+ /* offline 4 */
+ port@85000 {
+ fsl,qman-channel-id = <0x6a>;
+ };
+ /* offline 5 */
+ port@86000 {
+ fsl,qman-channel-id = <0x6b>;
+ };
+ };
};
diff --git a/arch/powerpc/boot/dts/fsl/p5040si-pre.dtsi b/arch/powerpc/boot/dts/fsl/p5040si-pre.dtsi
index a0a7129..33a37d1 100644
--- a/arch/powerpc/boot/dts/fsl/p5040si-pre.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p5040si-pre.dtsi
@@ -73,8 +73,16 @@
rtic_d = &rtic_d;
sec_mon = &sec_mon;
+ raideng = &raideng;
+ raideng_jr0 = &raideng_jr0;
+ raideng_jr1 = &raideng_jr1;
+ raideng_jr2 = &raideng_jr2;
+ raideng_jr3 = &raideng_jr3;
+
qman = &qman;
bman = &bman;
+ fman0 = &fman0;
+ fman1 = &fman1;
};
cpus {
diff --git a/arch/powerpc/boot/dts/fsl/t4240si-post.dtsi b/arch/powerpc/boot/dts/fsl/t4240si-post.dtsi
index 9df6f83..d65e7e2 100644
--- a/arch/powerpc/boot/dts/fsl/t4240si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/t4240si-post.dtsi
@@ -20,7 +20,7 @@
* Foundation, either version 2 of that License or (at your option) any
* later version.
*
- * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor "AS IS" AND ANY
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
@@ -298,6 +298,10 @@
/include/ "qoriq-qman2-portals.dtsi"
};
+&lportals {
+/include/ "interlaken-lac-portals.dtsi"
+};
+
&soc {
#address-cells = <1>;
#size-cells = <1>;
@@ -487,6 +491,10 @@
/include/ "qoriq-gpio-1.dtsi"
/include/ "qoriq-gpio-2.dtsi"
/include/ "qoriq-gpio-3.dtsi"
+/include/ "qoriq-rman-0.dtsi"
+ rman: rman@1e0000 {
+ fsl,qman-channels-id = <0x880 0x881>;
+ };
/include/ "qoriq-usb2-mph-0.dtsi"
usb0: usb@210000 {
compatible = "fsl-usb2-mph-v2.4", "fsl-usb2-mph";
@@ -501,9 +509,146 @@
};
/include/ "qoriq-sata2-0.dtsi"
/include/ "qoriq-sata2-1.dtsi"
+/include/ "interlaken-lac.dtsi"
/include/ "qoriq-sec5.0-0.dtsi"
+/include/ "qoriq-dce-0.dtsi"
+/include/ "qoriq-pme-0.dtsi"
/include/ "qoriq-qman1.dtsi"
/include/ "qoriq-bman1.dtsi"
+/include/ "qoriq-fman3-0.dtsi"
+/include/ "qoriq-fman3-0-1g-0.dtsi"
+/include/ "qoriq-fman3-0-1g-1.dtsi"
+/include/ "qoriq-fman3-0-1g-2.dtsi"
+/include/ "qoriq-fman3-0-1g-3.dtsi"
+/include/ "qoriq-fman3-0-1g-4.dtsi"
+/include/ "qoriq-fman3-0-1g-5.dtsi"
+/include/ "qoriq-fman3-0-10g-0.dtsi"
+/include/ "qoriq-fman3-0-10g-1.dtsi"
+ fman0: fman@400000 {
+ /* tx - 1g - 0 */
+ port@a8000 {
+ fsl,qman-channel-id = <0x802>;
+ };
+ /* tx - 1g - 1 */
+ port@a9000 {
+ fsl,qman-channel-id = <0x803>;
+ };
+ /* tx - 1g - 2 */
+ port@aa000 {
+ fsl,qman-channel-id = <0x804>;
+ };
+ /* tx - 1g - 3 */
+ port@ab000 {
+ fsl,qman-channel-id = <0x805>;
+ };
+ /* tx - 1g - 4 */
+ port@ac000 {
+ fsl,qman-channel-id = <0x806>;
+ };
+ /* tx - 1g - 5 */
+ port@ad000 {
+ fsl,qman-channel-id = <0x807>;
+ };
+ /* tx - 10g - 0 */
+ port@b0000 {
+ fsl,qman-channel-id = <0x800>;
+ };
+ /* tx - 10g - 1 */
+ port@b1000 {
+ fsl,qman-channel-id = <0x801>;
+ };
+ /* offline - 1 */
+ port@82000 {
+ fsl,qman-channel-id = <0x809>;
+ };
+ /* offline - 2 */
+ port@83000 {
+ fsl,qman-channel-id = <0x80a>;
+ };
+ /* offline - 3 */
+ port@84000 {
+ fsl,qman-channel-id = <0x80b>;
+ };
+ /* offline - 4 */
+ port@85000 {
+ fsl,qman-channel-id = <0x80c>;
+ };
+ /* offline - 5 */
+ port@86000 {
+ fsl,qman-channel-id = <0x80d>;
+ };
+ /* offline - 6 */
+ port@87000 {
+ fsl,qman-channel-id = <0x80e>;
+ };
+ };
+/include/ "qoriq-fman3-1.dtsi"
+/include/ "qoriq-fman3-1-1g-0.dtsi"
+/include/ "qoriq-fman3-1-1g-1.dtsi"
+/include/ "qoriq-fman3-1-1g-2.dtsi"
+/include/ "qoriq-fman3-1-1g-3.dtsi"
+/include/ "qoriq-fman3-1-1g-4.dtsi"
+/include/ "qoriq-fman3-1-1g-5.dtsi"
+/include/ "qoriq-fman3-1-10g-0.dtsi"
+/include/ "qoriq-fman3-1-10g-1.dtsi"
+ fman1: fman@500000 {
+ /* tx - 1g - 0 */
+ port@a8000 {
+ fsl,qman-channel-id = <0x822>;
+ };
+ /* tx - 1g - 1 */
+ port@a9000 {
+ fsl,qman-channel-id = <0x823>;
+ };
+ /* tx - 1g - 2 */
+ port@aa000 {
+ fsl,qman-channel-id = <0x824>;
+ };
+ /* tx - 1g - 3 */
+ port@ab000 {
+ fsl,qman-channel-id = <0x825>;
+ };
+ /* tx - 1g - 4 */
+ port@ac000 {
+ fsl,qman-channel-id = <0x826>;
+ };
+ /* tx - 1g - 5 */
+ port@ad000 {
+ fsl,qman-channel-id = <0x827>;
+ };
+ /* tx - 10g - 0 */
+ port@b0000 {
+ fsl,qman-channel-id = <0x820>;
+ };
+ /* tx - 10g - 1 */
+ port@b1000 {
+ fsl,qman-channel-id = <0x821>;
+ };
+ /* offline - 1 */
+ port@82000 {
+ fsl,qman-channel-id = <0x829>;
+ };
+ /* offline - 2 */
+ port@83000 {
+ fsl,qman-channel-id = <0x82a>;
+ };
+ /* offline - 3 */
+ port@84000 {
+ fsl,qman-channel-id = <0x82b>;
+ };
+ /* offline - 4 */
+ port@85000 {
+ fsl,qman-channel-id = <0x82c>;
+ };
+ /* offline - 5 */
+ port@86000 {
+ fsl,qman-channel-id = <0x82d>;
+ };
+ /* offline - 6 */
+ port@87000 {
+ fsl,qman-channel-id = <0x82e>;
+ };
+ };
L2_1: l2-cache-controller@c20000 {
compatible = "fsl,t4240-l2-cache-controller";
@@ -520,9 +665,4 @@
reg = <0xca0000 0x40000>;
next-level-cache = <&cpc>;
};
-
-/include/ "qoriq-rman-0.dtsi"
- rman: rman@1e0000 {
- fsl,qman-channels-id = <0x880 0x881>;
- };
};
diff --git a/arch/powerpc/boot/dts/fsl/t4240si-pre.dtsi b/arch/powerpc/boot/dts/fsl/t4240si-pre.dtsi
index 590e487..07dba1d 100644
--- a/arch/powerpc/boot/dts/fsl/t4240si-pre.dtsi
+++ b/arch/powerpc/boot/dts/fsl/t4240si-pre.dtsi
@@ -20,7 +20,7 @@
* Foundation, either version 2 of that License or (at your option) any
* later version.
*
- * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor "AS IS" AND ANY
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
@@ -50,7 +50,33 @@
serial1 = &serial1;
serial2 = &serial2;
serial3 = &serial3;
+
+ rman = &rman;
+ lac = &lac;
crypto = &crypto;
+ dce = &dce;
+ pme = &pme;
+ qman = &qman;
+ bman = &bman;
+ fman0 = &fman0;
+ fman1 = &fman1;
+ ethernet0 = &enet0;
+ ethernet1 = &enet1;
+ ethernet2 = &enet2;
+ ethernet3 = &enet3;
+ ethernet4 = &enet4;
+ ethernet5 = &enet5;
+ ethernet6 = &enet6;
+ ethernet7 = &enet7;
+ ethernet8 = &enet8;
+ ethernet9 = &enet9;
+ ethernet10 = &enet10;
+ ethernet11 = &enet11;
+ ethernet12 = &enet12;
+ ethernet13 = &enet13;
+ ethernet14 = &enet14;
+ ethernet15 = &enet15;
+
pci0 = &pci0;
pci1 = &pci1;
pci2 = &pci2;
@@ -58,15 +84,17 @@
dma0 = &dma0;
dma1 = &dma1;
sdhc = &sdhc;
-
- qman = &qman;
- bman = &bman;
};
cpus {
#address-cells = <1>;
#size-cells = <0>;
+ /*
+ * Temporarily add next-level-cache info in each cpu node so
+ * that uboot can do L2 cache fixup. This can be removed once
+ * u-boot can create cpu node with cache info.
+ */
cpu0: PowerPC,e6500@0 {
device_type = "cpu";
reg = <0 1>;
@@ -91,6 +119,7 @@
clocks = <&mux0>;
next-level-cache = <&L2_1>;
};
+
cpu4: PowerPC,e6500@4 {
device_type = "cpu";
reg = <8 9>;
@@ -115,6 +144,7 @@
clocks = <&mux1>;
next-level-cache = <&L2_2>;
};
+
cpu8: PowerPC,e6500@8 {
device_type = "cpu";
reg = <16 17>;
diff --git a/arch/powerpc/boot/dts/p1023rds.dts b/arch/powerpc/boot/dts/p1023rds.dts
index e896155..5888f3d 100644
--- a/arch/powerpc/boot/dts/p1023rds.dts
+++ b/arch/powerpc/boot/dts/p1023rds.dts
@@ -1,7 +1,7 @@
/*
* P1023 RDS Device Tree Source
*
- * Copyright 2010-2011 Freescale Semiconductor Inc.
+ * Copyright 2010-2012 Freescale Semiconductor Inc.
*
* Author: Roy Zang <tie-fei.zang@freescale.com>
*
@@ -43,6 +43,11 @@
#size-cells = <2>;
interrupt-parent = <&mpic>;
+ aliases {
+ ethernet0 = &enet0;
+ ethernet1 = &enet1;
+ };
+
memory {
device_type = "memory";
};
@@ -91,6 +96,25 @@
dr_mode = "host";
phy_type = "ulpi";
};
+
+ fman0: fman@100000 {
+ enet0: ethernet@e0000 {
+ phy-handle = <&phy0>;
+ phy-connection-type = "rgmii";
+ };
+ enet1: ethernet@e2000 {
+ phy-handle = <&phy1>;
+ phy-connection-type = "rgmii";
+ };
+ mdio0: mdio@e1120 {
+ phy0: ethernet-phy@2 {
+ reg = <0x02>;
+ };
+ phy1: ethernet-phy@7 {
+ reg = <0x07>;
+ };
+ };
+ };
};
lbc: localbus@ff605000 {
@@ -222,6 +246,19 @@
0x0 0x100000>;
};
};
+
+ fsl,dpaa {
+ compatible = "fsl,p1023-dpaa", "fsl,dpaa";
+
+ ethernet@0 {
+ compatible = "fsl,p1023-dpa-ethernet", "fsl,dpa-ethernet";
+ fsl,fman-mac = <&enet0>;
+ };
+ ethernet@1 {
+ compatible = "fsl,p1023-dpa-ethernet", "fsl,dpa-ethernet";
+ fsl,fman-mac = <&enet1>;
+ };
+ };
};
/include/ "fsl/p1023si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/p2041rdb.dts b/arch/powerpc/boot/dts/p2041rdb.dts
index 774c9f7..9412879 100644
--- a/arch/powerpc/boot/dts/p2041rdb.dts
+++ b/arch/powerpc/boot/dts/p2041rdb.dts
@@ -1,7 +1,7 @@
/*
* P2041RDB Device Tree Source
*
- * Copyright 2011 Freescale Semiconductor Inc.
+ * Copyright 2011-2012 Freescale Semiconductor Inc.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
@@ -41,6 +41,25 @@
#size-cells = <2>;
interrupt-parent = <&mpic>;
+ aliases {
+ ethernet0 = &enet0;
+ ethernet1 = &enet1;
+ ethernet2 = &enet2;
+ ethernet3 = &enet3;
+ ethernet4 = &enet4;
+ ethernet5 = &enet5;
+ phy_rgmii_0 = &phy_rgmii_0;
+ phy_rgmii_1 = &phy_rgmii_1;
+ phy_sgmii_2 = &phy_sgmii_2;
+ phy_sgmii_3 = &phy_sgmii_3;
+ phy_sgmii_4 = &phy_sgmii_4;
+ phy_sgmii_1c = &phy_sgmii_1c;
+ phy_sgmii_1d = &phy_sgmii_1d;
+ phy_sgmii_1e = &phy_sgmii_1e;
+ phy_sgmii_1f = &phy_sgmii_1f;
+ phy_xgmii_2 = &phy_xgmii_2;
+ };
+
memory {
device_type = "memory";
};
@@ -118,6 +137,117 @@
usb1: usb@211000 {
dr_mode = "host";
};
+
+ fman0: fman@400000 {
+ enet0: ethernet@e0000 {
+ tbi-handle = <&tbi0>;
+ phy-handle = <&phy_sgmii_2>;
+ phy-connection-type = "sgmii";
+ };
+
+ mdio0: mdio@e1120 {
+ tbi0: tbi-phy@8 {
+ reg = <0x8>;
+ device_type = "tbi-phy";
+ };
+
+ phy_rgmii_0: ethernet-phy@0 {
+ reg = <0x0>;
+ };
+ phy_rgmii_1: ethernet-phy@1 {
+ reg = <0x1>;
+ };
+ phy_sgmii_2: ethernet-phy@2 {
+ reg = <0x2>;
+ };
+ phy_sgmii_3: ethernet-phy@3 {
+ reg = <0x3>;
+ };
+ phy_sgmii_4: ethernet-phy@4 {
+ reg = <0x4>;
+ };
+ phy_sgmii_1c: ethernet-phy@1c {
+ reg = <0x1c>;
+ };
+ phy_sgmii_1d: ethernet-phy@1d {
+ reg = <0x1d>;
+ };
+ phy_sgmii_1e: ethernet-phy@1e {
+ reg = <0x1e>;
+ };
+ phy_sgmii_1f: ethernet-phy@1f {
+ reg = <0x1f>;
+ };
+ };
+
+ enet1: ethernet@e2000 {
+ tbi-handle = <&tbi1>;
+ phy-handle = <&phy_sgmii_3>;
+ phy-connection-type = "sgmii";
+ };
+
+ mdio@e3120 {
+ tbi1: tbi-phy@8 {
+ reg = <8>;
+ device_type = "tbi-phy";
+ };
+ };
+
+ enet2: ethernet@e4000 {
+ tbi-handle = <&tbi2>;
+ phy-handle = <&phy_sgmii_4>;
+ phy-connection-type = "sgmii";
+ };
+
+ mdio@e5120 {
+ tbi2: tbi-phy@8 {
+ reg = <8>;
+ device_type = "tbi-phy";
+ };
+ };
+
+ enet3: ethernet@e6000 {
+ tbi-handle = <&tbi3>;
+ phy-handle = <&phy_rgmii_1>;
+ phy-connection-type = "rgmii";
+ };
+
+ mdio@e7120 {
+ tbi3: tbi-phy@8 {
+ reg = <8>;
+ device_type = "tbi-phy";
+ };
+ };
+
+ enet4: ethernet@e8000 {
+ tbi-handle = <&tbi4>;
+ phy-handle = <&phy_rgmii_0>;
+ phy-connection-type = "rgmii";
+ };
+
+ mdio@e9120 {
+ tbi4: tbi-phy@8 {
+ reg = <8>;
+ device_type = "tbi-phy";
+ };
+ };
+
+ enet5: ethernet@f0000 {
+ /*
+ * phy-handle will be updated by U-Boot to
+ * reflect the actual slot the XAUI card is in.
+ */
+ phy-handle = <&phy_xgmii_2>;
+ phy-connection-type = "xgmii";
+ };
+
+ mdio@f1000 {
+ /* XAUI card in slot 2 */
+ phy_xgmii_2: ethernet-phy@0 {
+ reg = <0x0>;
+ };
+ };
+ };
};
rio: rapidio@ffe0c0000 {
@@ -226,6 +356,35 @@
0 0x00010000>;
};
};
+
+ fsl,dpaa {
+ compatible = "fsl,p2041-dpaa", "fsl,dpaa";
+
+ ethernet@0 {
+ compatible = "fsl,p2041-dpa-ethernet", "fsl,dpa-ethernet";
+ fsl,fman-mac = <&enet0>;
+ };
+ ethernet@1 {
+ compatible = "fsl,p2041-dpa-ethernet", "fsl,dpa-ethernet";
+ fsl,fman-mac = <&enet1>;
+ };
+ ethernet@2 {
+ compatible = "fsl,p2041-dpa-ethernet", "fsl,dpa-ethernet";
+ fsl,fman-mac = <&enet2>;
+ };
+ ethernet@3 {
+ compatible = "fsl,p2041-dpa-ethernet", "fsl,dpa-ethernet";
+ fsl,fman-mac = <&enet3>;
+ };
+ ethernet@4 {
+ compatible = "fsl,p2041-dpa-ethernet", "fsl,dpa-ethernet";
+ fsl,fman-mac = <&enet4>;
+ };
+ ethernet@5 {
+ compatible = "fsl,p2041-dpa-ethernet", "fsl,dpa-ethernet";
+ fsl,fman-mac = <&enet5>;
+ };
+ };
};
/include/ "fsl/p2041si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/p3041ds.dts b/arch/powerpc/boot/dts/p3041ds.dts
index 61557ec..276bb49 100644
--- a/arch/powerpc/boot/dts/p3041ds.dts
+++ b/arch/powerpc/boot/dts/p3041ds.dts
@@ -1,7 +1,7 @@
/*
* P3041DS Device Tree Source
*
- * Copyright 2010-2011 Freescale Semiconductor Inc.
+ * Copyright 2010-2012 Freescale Semiconductor Inc.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
@@ -41,6 +41,26 @@
#size-cells = <2>;
interrupt-parent = <&mpic>;
+ aliases {
+ ethernet0 = &enet0;
+ ethernet1 = &enet1;
+ ethernet2 = &enet2;
+ ethernet3 = &enet3;
+ ethernet4 = &enet4;
+ ethernet5 = &enet5;
+ phy_rgmii_0 = &phy_rgmii_0;
+ phy_rgmii_1 = &phy_rgmii_1;
+ phy_sgmii_1c = &phy_sgmii_1c;
+ phy_sgmii_1d = &phy_sgmii_1d;
+ phy_sgmii_1e = &phy_sgmii_1e;
+ phy_sgmii_1f = &phy_sgmii_1f;
+ phy_xgmii_1 = &phy_xgmii_1;
+ phy_xgmii_2 = &phy_xgmii_2;
+ emi1_rgmii = &hydra_mdio_rgmii;
+ emi1_sgmii = &hydra_mdio_sgmii;
+ emi2_xgmii = &hydra_mdio_xgmii;
+ };
+
memory {
device_type = "memory";
};
@@ -111,6 +131,110 @@
reg = <0x4c>;
};
};
+
+ fman0: fman@400000 {
+ enet0: ethernet@e0000 {
+ tbi-handle = <&tbi0>;
+ phy-handle = <&phy_sgmii_1c>;
+ phy-connection-type = "sgmii";
+ };
+
+ mdio0: mdio@e1120 {
+ tbi0: tbi-phy@8 {
+ reg = <0x8>;
+ device_type = "tbi-phy";
+ };
+ };
+
+ enet1: ethernet@e2000 {
+ tbi-handle = <&tbi1>;
+ phy-handle = <&phy_sgmii_1d>;
+ phy-connection-type = "sgmii";
+ };
+
+ mdio@e3120 {
+ tbi1: tbi-phy@8 {
+ reg = <8>;
+ device_type = "tbi-phy";
+ };
+ };
+
+ enet2: ethernet@e4000 {
+ tbi-handle = <&tbi2>;
+ phy-handle = <&phy_sgmii_1e>;
+ phy-connection-type = "sgmii";
+ };
+
+ mdio@e5120 {
+ tbi2: tbi-phy@8 {
+ reg = <8>;
+ device_type = "tbi-phy";
+ };
+ };
+
+ enet3: ethernet@e6000 {
+ tbi-handle = <&tbi3>;
+ phy-handle = <&phy_sgmii_1f>;
+ phy-connection-type = "sgmii";
+ };
+
+ mdio@e7120 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,fman-tbi";
+ reg = <0xe7120 0xee0>;
+ interrupts = <100 1 0 0>;
+
+ tbi3: tbi-phy@8 {
+ reg = <8>;
+ device_type = "tbi-phy";
+ };
+ };
+
+ enet4: ethernet@e8000 {
+ tbi-handle = <&tbi4>;
+ phy-handle = <&phy_rgmii_1>;
+ phy-connection-type = "rgmii";
+ };
+
+ mdio@e9120 {
+ tbi4: tbi-phy@8 {
+ reg = <8>;
+ device_type = "tbi-phy";
+ };
+ };
+
+ enet5: ethernet@f0000 {
+ /*
+ * phy-handle will be updated by U-Boot to
+ * reflect the actual slot the XAUI card is in.
+ */
+ phy-handle = <&phy_xgmii_1>;
+ phy-connection-type = "xgmii";
+ };
+
+ /*
+ * We only support one XAUI card, so the MDIO muxing
+ * is set by U-Boot, and Linux never touches it.
+ * Therefore, we don't need a virtual MDIO node.
+ * However, the phy address depends on the slot, so
+ * only one of the ethernet-phy nodes below will be
+ * used.
+ */
+ hydra_mdio_xgmii: mdio@f1000 {
+ status = "disabled";
+
+ /* XAUI card in slot 1 */
+ phy_xgmii_1: ethernet-phy@4 {
+ reg = <0x4>;
+ };
+
+ /* XAUI card in slot 2 */
+ phy_xgmii_2: ethernet-phy@0 {
+ reg = <0x0>;
+ };
+ };
+ };
};
rio: rapidio@ffe0c0000 {
@@ -176,8 +300,66 @@
};
board-control@3,0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
compatible = "fsl,p3041ds-fpga", "fsl,fpga-ngpixis";
reg = <3 0 0x30>;
+ ranges = <0 3 0 0x30>;
+
+ mdio-mux-emi1 {
+ compatible = "mdio-mux-mmioreg", "mdio-mux";
+ mdio-parent-bus = <&mdio0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <9 1>; // BRDCFG1
+ mux-mask = <0x78>; // EMI1
+
+ /*
+ * Virtual MDIO for the two on-board RGMII
+ * ports. The reg property is already correct.
+ */
+ hydra_mdio_rgmii: rgmii-mdio@8 {
+ status = "disabled";
+ reg = <8>; /* EMI1_EN | 0 */
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ phy_rgmii_0: ethernet-phy@0 {
+ reg = <0x0>;
+ };
+ phy_rgmii_1: ethernet-phy@1 {
+ reg = <0x1>;
+ };
+ };
+ /*
+ * Virtual MDIO for the four-port SGMII card.
+ * The reg property will be fixed-up
+ * by U-Boot based on the slot that
+ * the SGMII card is in.
+ *
+ * Note: we do not support DTSEC5 connected to
+ * SGMII, so this is the only SGMII node.
+ */
+ hydra_mdio_sgmii: sgmii-mdio@28 {
+ reg = <0x28>; /* EMI1_EN | 0x20 */
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+
+ phy_sgmii_1c: ethernet-phy@1c {
+ reg = <0x1c>;
+ };
+ phy_sgmii_1d: ethernet-phy@1d {
+ reg = <0x1d>;
+ };
+ phy_sgmii_1e: ethernet-phy@1e {
+ reg = <0x1e>;
+ };
+ phy_sgmii_1f: ethernet-phy@1f {
+ reg = <0x1f>;
+ };
+ };
+ };
};
};
@@ -240,6 +422,36 @@
0 0x00010000>;
};
};
+
+ fsl,dpaa {
+ compatible = "fsl,p3041-dpaa", "fsl,dpaa";
+
+ ethernet@0 {
+ compatible = "fsl,p3041-dpa-ethernet", "fsl,dpa-ethernet";
+ fsl,fman-mac = <&enet0>;
+ };
+ ethernet@1 {
+ compatible = "fsl,p3041-dpa-ethernet", "fsl,dpa-ethernet";
+ fsl,fman-mac = <&enet1>;
+ };
+ ethernet@2 {
+ compatible = "fsl,p3041-dpa-ethernet", "fsl,dpa-ethernet";
+ fsl,fman-mac = <&enet2>;
+ status = "disabled";
+ };
+ ethernet@3 {
+ compatible = "fsl,p3041-dpa-ethernet", "fsl,dpa-ethernet";
+ fsl,fman-mac = <&enet3>;
+ };
+ ethernet@4 {
+ compatible = "fsl,p3041-dpa-ethernet", "fsl,dpa-ethernet";
+ fsl,fman-mac = <&enet4>;
+ };
+ ethernet@5 {
+ compatible = "fsl,p3041-dpa-ethernet", "fsl,dpa-ethernet";
+ fsl,fman-mac = <&enet5>;
+ };
+ };
};
/include/ "fsl/p3041si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/p4080ds.dts b/arch/powerpc/boot/dts/p4080ds.dts
index 839c0bd..e7dd754 100644
--- a/arch/powerpc/boot/dts/p4080ds.dts
+++ b/arch/powerpc/boot/dts/p4080ds.dts
@@ -1,7 +1,7 @@
/*
* P4080DS Device Tree Source
*
- * Copyright 2009-2011 Freescale Semiconductor Inc.
+ * Copyright 2009-2012 Freescale Semiconductor Inc.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
@@ -41,6 +41,30 @@
#size-cells = <2>;
interrupt-parent = <&mpic>;
+ aliases {
+ ethernet0 = &enet0;
+ ethernet1 = &enet1;
+ ethernet2 = &enet2;
+ ethernet3 = &enet3;
+ ethernet4 = &enet4;
+ ethernet5 = &enet5;
+ ethernet6 = &enet6;
+ ethernet7 = &enet7;
+ ethernet8 = &enet8;
+ ethernet9 = &enet9;
+ phy_rgmii = &phyrgmii;
+ phy5_slot3 = &phy5slot3;
+ phy6_slot3 = &phy6slot3;
+ phy7_slot3 = &phy7slot3;
+ phy8_slot3 = &phy8slot3;
+ emi1_slot3 = &p4080mdio2;
+ emi1_slot4 = &p4080mdio1;
+ emi1_slot5 = &p4080mdio3;
+ emi1_rgmii = &p4080mdio0;
+ emi2_slot4 = &p4080xmdio1;
+ emi2_slot5 = &p4080xmdio3;
+ };
+
memory {
device_type = "memory";
};
@@ -118,6 +142,125 @@
dr_mode = "host";
phy_type = "ulpi";
};
+
+ fman0: fman@400000 {
+ enet0: ethernet@e0000 {
+ tbi-handle = <&tbi0>;
+ phy-handle = <&phy0>;
+ phy-connection-type = "sgmii";
+ };
+
+ mdio0: mdio@e1120 {
+ tbi0: tbi-phy@8 {
+ reg = <0x8>;
+ device_type = "tbi-phy";
+ };
+ };
+
+ enet1: ethernet@e2000 {
+ tbi-handle = <&tbi1>;
+ phy-handle = <&phy1>;
+ phy-connection-type = "sgmii";
+ };
+
+ mdio@e3120 {
+ tbi1: tbi-phy@8 {
+ reg = <8>;
+ device_type = "tbi-phy";
+ };
+ };
+
+ enet2: ethernet@e4000 {
+ tbi-handle = <&tbi2>;
+ phy-handle = <&phy2>;
+ phy-connection-type = "sgmii";
+ };
+
+ mdio@e5120 {
+ tbi2: tbi-phy@8 {
+ reg = <8>;
+ device_type = "tbi-phy";
+ };
+ };
+
+ enet3: ethernet@e6000 {
+ tbi-handle = <&tbi3>;
+ phy-handle = <&phy3>;
+ phy-connection-type = "sgmii";
+ };
+
+ mdio@e7120 {
+ tbi3: tbi-phy@8 {
+ reg = <8>;
+ device_type = "tbi-phy";
+ };
+ };
+ enet4: ethernet@f0000 {
+ phy-handle = <&phy10>;
+ phy-connection-type = "xgmii";
+ };
+
+ xmdio0: mdio@f1000 {
+ };
+ };
+
+ fman1: fman@500000 {
+ enet5: ethernet@e0000 {
+ tbi-handle = <&tbi5>;
+ phy-handle = <&phy5>;
+ phy-connection-type = "sgmii";
+ };
+ mdio@e1120 {
+ tbi5: tbi-phy@8 {
+ reg = <8>;
+ device_type = "tbi-phy";
+ };
+ };
+
+ enet6: ethernet@e2000 {
+ tbi-handle = <&tbi6>;
+ phy-handle = <&phy6>;
+ phy-connection-type = "sgmii";
+ };
+
+ mdio@e3120 {
+ tbi6: tbi-phy@8 {
+ reg = <8>;
+ device_type = "tbi-phy";
+ };
+ };
+
+ enet7: ethernet@e4000 {
+ tbi-handle = <&tbi7>;
+ phy-handle = <&phy7>;
+ phy-connection-type = "sgmii";
+ };
+
+ mdio@e5120 {
+ tbi7: tbi-phy@8 {
+ reg = <8>;
+ device_type = "tbi-phy";
+ };
+ };
+
+ enet8: ethernet@e6000 {
+ tbi-handle = <&tbi8>;
+ phy-handle = <&phy8>;
+ phy-connection-type = "sgmii";
+ };
+
+ mdio@e7120 {
+ tbi8: tbi-phy@8 {
+ reg = <8>;
+ device_type = "tbi-phy";
+ };
+ };
+
+ enet9: ethernet@f0000 {
+ phy-handle = <&phy11>;
+ phy-connection-type = "xgmii";
+ };
+ };
};
rio: rapidio@ffe0c0000 {
@@ -194,6 +337,152 @@
};
};
+ mdio-mux-emi1 {
+ compatible = "mdio-mux-gpio";
+ gpios = <&gpio0 0 0>, <&gpio0 1 0>;
+ mdio-parent-bus = <&mdio0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ p4080mdio0: mdio@0 {
+ reg = <0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ phyrgmii: ethernet-phy@0 {
+ reg = <0x0>;
+ };
+ };
+
+ p4080mdio1: mdio@1 {
+ reg = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ phy5: ethernet-phy@1c {
+ reg = <0x1c>;
+ };
+ phy6: ethernet-phy@1d {
+ reg = <0x1d>;
+ };
+ phy7: ethernet-phy@1e {
+ reg = <0x1e>;
+ };
+ phy8: ethernet-phy@1f {
+ reg = <0x1f>;
+ };
+ };
+
+ p4080mdio2: mdio@2 {
+ reg = <2>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+
+ phy5slot3: ethernet-phy@1c {
+ reg = <0x1c>;
+ };
+ phy6slot3: ethernet-phy@1d {
+ reg = <0x1d>;
+ };
+ phy7slot3: ethernet-phy@1e {
+ reg = <0x1e>;
+ };
+ phy8slot3: ethernet-phy@1f {
+ reg = <0x1f>;
+ };
+ };
+
+ p4080mdio3: mdio@3 {
+ reg = <3>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ phy0: ethernet-phy@1c {
+ reg = <0x1c>;
+ };
+ phy1: ethernet-phy@1d {
+ reg = <0x1d>;
+ };
+ phy2: ethernet-phy@1e {
+ reg = <0x1e>;
+ };
+ phy3: ethernet-phy@1f {
+ reg = <0x1f>;
+ };
+ };
+ };
+ mdio-mux-emi2 {
+ compatible = "mdio-mux-gpio";
+ gpios = <&gpio0 2 0>, <&gpio0 3 0>;
+ mdio-parent-bus = <&xmdio0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ p4080xmdio1: mdio@1 {
+ reg = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ phy11: ethernet-phy@0 {
+ reg = <0x0>;
+ };
+ };
+
+ p4080xmdio3: mdio@3 {
+ reg = <3>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ phy10: ethernet-phy@4 {
+ reg = <0x4>;
+ };
+ };
+ };
+ fsl,dpaa {
+ compatible = "fsl,p4080-dpaa", "fsl,dpaa";
+
+ ethernet@0 {
+ compatible = "fsl,p4080-dpa-ethernet", "fsl,dpa-ethernet";
+ fsl,fman-mac = <&enet0>;
+ };
+ ethernet@1 {
+ compatible = "fsl,p4080-dpa-ethernet", "fsl,dpa-ethernet";
+ fsl,fman-mac = <&enet1>;
+ };
+ ethernet@2 {
+ compatible = "fsl,p4080-dpa-ethernet", "fsl,dpa-ethernet";
+ fsl,fman-mac = <&enet2>;
+ };
+ ethernet@3 {
+ compatible = "fsl,p4080-dpa-ethernet", "fsl,dpa-ethernet";
+ fsl,fman-mac = <&enet3>;
+ };
+ ethernet@4 {
+ compatible = "fsl,p4080-dpa-ethernet", "fsl,dpa-ethernet";
+ fsl,fman-mac = <&enet4>;
+ };
+ ethernet@5 {
+ compatible = "fsl,p4080-dpa-ethernet", "fsl,dpa-ethernet";
+ fsl,fman-mac = <&enet5>;
+ };
+ ethernet@6 {
+ compatible = "fsl,p4080-dpa-ethernet", "fsl,dpa-ethernet";
+ fsl,fman-mac = <&enet6>;
+ };
+ ethernet@7 {
+ compatible = "fsl,p4080-dpa-ethernet", "fsl,dpa-ethernet";
+ fsl,fman-mac = <&enet7>;
+ };
+ ethernet@8 {
+ compatible = "fsl,p4080-dpa-ethernet", "fsl,dpa-ethernet";
+ fsl,fman-mac = <&enet8>;
+ };
+ ethernet@9 {
+ compatible = "fsl,p4080-dpa-ethernet", "fsl,dpa-ethernet";
+ fsl,fman-mac = <&enet9>;
+ };
+ };
};
/include/ "fsl/p4080si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/p5020ds.dts b/arch/powerpc/boot/dts/p5020ds.dts
index 334ae9c..384461d 100644
--- a/arch/powerpc/boot/dts/p5020ds.dts
+++ b/arch/powerpc/boot/dts/p5020ds.dts
@@ -1,7 +1,7 @@
/*
* P5020DS Device Tree Source
*
- * Copyright 2010-2011 Freescale Semiconductor Inc.
+ * Copyright 2010-2012 Freescale Semiconductor Inc.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
@@ -41,6 +41,26 @@
#size-cells = <2>;
interrupt-parent = <&mpic>;
+ aliases {
+ ethernet0 = &enet0;
+ ethernet1 = &enet1;
+ ethernet2 = &enet2;
+ ethernet3 = &enet3;
+ ethernet4 = &enet4;
+ ethernet5 = &enet5;
+ phy_rgmii_0 = &phy_rgmii_0;
+ phy_rgmii_1 = &phy_rgmii_1;
+ phy_sgmii_1c = &phy_sgmii_1c;
+ phy_sgmii_1d = &phy_sgmii_1d;
+ phy_sgmii_1e = &phy_sgmii_1e;
+ phy_sgmii_1f = &phy_sgmii_1f;
+ phy_xgmii_1 = &phy_xgmii_1;
+ phy_xgmii_2 = &phy_xgmii_2;
+ emi1_rgmii = &hydra_mdio_rgmii;
+ emi1_sgmii = &hydra_mdio_sgmii;
+ emi2_xgmii = &hydra_mdio_xgmii;
+ };
+
memory {
device_type = "memory";
};
@@ -111,6 +131,110 @@
reg = <0x4c>;
};
};
+
+ fman0: fman@400000 {
+ enet0: ethernet@e0000 {
+ tbi-handle = <&tbi0>;
+ phy-handle = <&phy_sgmii_1c>;
+ phy-connection-type = "sgmii";
+ };
+
+ mdio0: mdio@e1120 {
+ tbi0: tbi-phy@8 {
+ reg = <0x8>;
+ device_type = "tbi-phy";
+ };
+ };
+
+ enet1: ethernet@e2000 {
+ tbi-handle = <&tbi1>;
+ phy-handle = <&phy_sgmii_1d>;
+ phy-connection-type = "sgmii";
+ };
+
+ mdio@e3120 {
+ tbi1: tbi-phy@8 {
+ reg = <8>;
+ device_type = "tbi-phy";
+ };
+ };
+
+ enet2: ethernet@e4000 {
+ tbi-handle = <&tbi2>;
+ phy-handle = <&phy_sgmii_1e>;
+ phy-connection-type = "sgmii";
+ };
+
+ mdio@e5120 {
+ tbi2: tbi-phy@8 {
+ reg = <8>;
+ device_type = "tbi-phy";
+ };
+ };
+
+ enet3: ethernet@e6000 {
+ tbi-handle = <&tbi3>;
+ phy-handle = <&phy_sgmii_1f>;
+ phy-connection-type = "sgmii";
+ };
+
+ mdio@e7120 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,fman-tbi";
+ reg = <0xe7120 0xee0>;
+ interrupts = <100 1 0 0>;
+
+ tbi3: tbi-phy@8 {
+ reg = <8>;
+ device_type = "tbi-phy";
+ };
+ };
+
+ enet4: ethernet@e8000 {
+ tbi-handle = <&tbi4>;
+ phy-handle = <&phy_rgmii_1>;
+ phy-connection-type = "rgmii";
+ };
+
+ mdio@e9120 {
+ tbi4: tbi-phy@8 {
+ reg = <8>;
+ device_type = "tbi-phy";
+ };
+ };
+
+ enet5: ethernet@f0000 {
+ /*
+ * phy-handle will be updated by U-Boot to
+ * reflect the actual slot the XAUI card is in.
+ */
+ phy-handle = <&phy_xgmii_1>;
+ phy-connection-type = "xgmii";
+ };
+
+ /*
+ * We only support one XAUI card, so the MDIO muxing
+ * is set by U-Boot, and Linux never touches it.
+ * Therefore, we don't need a virtual MDIO node.
+ * However, the phy address depends on the slot, so
+ * only one of the ethernet-phy nodes below will be
+ * used.
+ */
+ hydra_mdio_xgmii: mdio@f1000 {
+ status = "disabled";
+
+ /* XAUI card in slot 1 */
+ phy_xgmii_1: ethernet-phy@4 {
+ reg = <0x4>;
+ };
+
+ /* XAUI card in slot 2 */
+ phy_xgmii_2: ethernet-phy@0 {
+ reg = <0x0>;
+ };
+ };
+ };
};
rio: rapidio@ffe0c0000 {
@@ -176,8 +300,66 @@
};
board-control@3,0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
compatible = "fsl,p5020ds-fpga", "fsl,fpga-ngpixis";
reg = <3 0 0x30>;
+ ranges = <0 3 0 0x30>;
+
+ mdio-mux-emi1 {
+ compatible = "mdio-mux-mmioreg", "mdio-mux";
+ mdio-parent-bus = <&mdio0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <9 1>; // BRDCFG1
+ mux-mask = <0x78>; // EMI1
+
+ /*
+ * Virtual MDIO for the two on-board RGMII
+ * ports. The reg property is already correct.
+ */
+ hydra_mdio_rgmii: rgmii-mdio@8 {
+ status = "disabled";
+ reg = <8>; /* EMI1_EN | 0 */
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ phy_rgmii_0: ethernet-phy@0 {
+ reg = <0x0>;
+ };
+ phy_rgmii_1: ethernet-phy@1 {
+ reg = <0x1>;
+ };
+ };
+ /*
+ * Virtual MDIO for the four-port SGMII card.
+ * The reg property will be fixed-up
+ * by U-Boot based on the slot that
+ * the SGMII card is in.
+ *
+ * Note: we do not support DTSEC5 connected to
+ * SGMII, so this is the only SGMII node.
+ */
+ hydra_mdio_sgmii: sgmii-mdio@28 {
+ reg = <0x28>; /* EMI1_EN | 0x20 */
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+
+ phy_sgmii_1c: ethernet-phy@1c {
+ reg = <0x1c>;
+ };
+ phy_sgmii_1d: ethernet-phy@1d {
+ reg = <0x1d>;
+ };
+ phy_sgmii_1e: ethernet-phy@1e {
+ reg = <0x1e>;
+ };
+ phy_sgmii_1f: ethernet-phy@1f {
+ reg = <0x1f>;
+ };
+ };
+ };
};
};
@@ -240,6 +422,36 @@
0 0x00010000>;
};
};
+
+ fsl,dpaa {
+ compatible = "fsl,p5020-dpaa", "fsl,dpaa";
+
+ ethernet@0 {
+ compatible = "fsl,p5020-dpa-ethernet", "fsl,dpa-ethernet";
+ fsl,fman-mac = <&enet0>;
+ };
+ ethernet@1 {
+ compatible = "fsl,p5020-dpa-ethernet", "fsl,dpa-ethernet";
+ fsl,fman-mac = <&enet1>;
+ };
+ ethernet@2 {
+ compatible = "fsl,p5020-dpa-ethernet", "fsl,dpa-ethernet";
+ fsl,fman-mac = <&enet2>;
+ status = "disabled";
+ };
+ ethernet@3 {
+ compatible = "fsl,p5020-dpa-ethernet", "fsl,dpa-ethernet";
+ fsl,fman-mac = <&enet3>;
+ };
+ ethernet@4 {
+ compatible = "fsl,p5020-dpa-ethernet", "fsl,dpa-ethernet";
+ fsl,fman-mac = <&enet4>;
+ };
+ ethernet@5 {
+ compatible = "fsl,p5020-dpa-ethernet", "fsl,dpa-ethernet";
+ fsl,fman-mac = <&enet5>;
+ };
+ };
};
/include/ "fsl/p5020si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/p5040ds.dts b/arch/powerpc/boot/dts/p5040ds.dts
index 6f40520..55b33b6 100644
--- a/arch/powerpc/boot/dts/p5040ds.dts
+++ b/arch/powerpc/boot/dts/p5040ds.dts
@@ -41,6 +41,49 @@
#size-cells = <2>;
interrupt-parent = <&mpic>;
+ aliases {
+ ethernet0 = &fm1dtsec1;
+ ethernet1 = &fm1dtsec2;
+ ethernet2 = &fm1dtsec3;
+ ethernet3 = &fm1dtsec4;
+ ethernet4 = &fm1dtsec5;
+ ethernet5 = &fm1tgec;
+ ethernet6 = &fm2dtsec1;
+ ethernet7 = &fm2dtsec2;
+ ethernet8 = &fm2dtsec3;
+ ethernet9 = &fm2dtsec4;
+ ethernet10 = &fm2dtsec5;
+ ethernet11 = &fm2tgec;
+
+ phy_sgmii_slot2_1c = &phy_sgmii_slot2_1c;
+ phy_sgmii_slot2_1d = &phy_sgmii_slot2_1d;
+ phy_sgmii_slot2_1e = &phy_sgmii_slot2_1e;
+ phy_sgmii_slot2_1f = &phy_sgmii_slot2_1f;
+
+ phy_sgmii_slot3_1c = &phy_sgmii_slot3_1c;
+ phy_sgmii_slot3_1d = &phy_sgmii_slot3_1d;
+ phy_sgmii_slot3_1e = &phy_sgmii_slot3_1e;
+ phy_sgmii_slot3_1f = &phy_sgmii_slot3_1f;
+
+ phy_sgmii_slot5_1c = &phy_sgmii_slot5_1c;
+ phy_sgmii_slot5_1d = &phy_sgmii_slot5_1d;
+ phy_sgmii_slot5_1e = &phy_sgmii_slot5_1e;
+ phy_sgmii_slot5_1f = &phy_sgmii_slot5_1f;
+
+ phy_sgmii_slot6_1c = &phy_sgmii_slot6_1c;
+ phy_sgmii_slot6_1d = &phy_sgmii_slot6_1d;
+ phy_sgmii_slot6_1e = &phy_sgmii_slot6_1e;
+ phy_sgmii_slot6_1f = &phy_sgmii_slot6_1f;
+
+ hydra_rg = &hydra_rg;
+ hydra_sg_slot2 = &hydra_sg_slot2;
+ hydra_sg_slot3 = &hydra_sg_slot3;
+ hydra_sg_slot5 = &hydra_sg_slot5;
+ hydra_sg_slot6 = &hydra_sg_slot6;
+ hydra_xg_slot1 = &hydra_xg_slot1;
+ hydra_xg_slot2 = &hydra_xg_slot2;
+ };
+
memory {
device_type = "memory";
};
@@ -70,14 +113,17 @@
partition@u-boot {
label = "u-boot";
reg = <0x00000000 0x00100000>;
+ read-only;
};
partition@kernel {
label = "kernel";
reg = <0x00100000 0x00500000>;
+ read-only;
};
partition@dtb {
label = "dtb";
reg = <0x00600000 0x00100000>;
+ read-only;
};
partition@fs {
label = "file system";
@@ -108,6 +154,148 @@
reg = <0x4c>;
};
};
+
+ fman0: fman@400000 {
+ fm1dtsec1: ethernet@e0000 {
+ tbi-handle = <&tbi0>;
+ phy-connection-type = "sgmii";
+ };
+
+ mdio0: mdio@e1120 {
+ tbi0: tbi-phy@8 {
+ reg = <0x8>;
+ device_type = "tbi-phy";
+ };
+ };
+
+ fm1dtsec2: ethernet@e2000 {
+ tbi-handle = <&tbi1>;
+ phy-connection-type = "sgmii";
+ };
+
+ mdio@e3120 {
+ tbi1: tbi-phy@8 {
+ reg = <8>;
+ device_type = "tbi-phy";
+ };
+ };
+
+ fm1dtsec3: ethernet@e4000 {
+ tbi-handle = <&tbi2>;
+ phy-connection-type = "sgmii";
+ };
+
+ mdio@e5120 {
+ tbi2: tbi-phy@8 {
+ reg = <8>;
+ device_type = "tbi-phy";
+ };
+ };
+
+ fm1dtsec4: ethernet@e6000 {
+ tbi-handle = <&tbi3>;
+ phy-connection-type = "sgmii";
+ };
+
+ mdio@e7120 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ tbi3: tbi-phy@8 {
+ reg = <8>;
+ device_type = "tbi-phy";
+ };
+ };
+
+ fm1dtsec5: ethernet@e8000 {
+ tbi-handle = <&tbi4>;
+ phy-handle = <&phy_rgmii_0>;
+ phy-connection-type = "rgmii";
+ };
+
+ mdio@e9120 {
+ tbi4: tbi-phy@8 {
+ reg = <8>;
+ device_type = "tbi-phy";
+ };
+ };
+
+ fm1tgec: ethernet@f0000 {
+ phy-handle = <&phy_xgmii_slot_2>;
+ phy-connection-type = "xgmii";
+ };
+
+ xmdio0: mdio@f1000 {
+ };
+
+ };
+
+ fman1: fman@500000 {
+ fm2dtsec1: ethernet@e0000 {
+ tbi-handle = <&tbi5>;
+ phy-connection-type = "sgmii";
+ };
+
+ mdio@e1120 {
+ tbi5: tbi-phy@8 {
+ reg = <8>;
+ device_type = "tbi-phy";
+ };
+ };
+
+ fm2dtsec2: ethernet@e2000 {
+ tbi-handle = <&tbi6>;
+ phy-connection-type = "sgmii";
+ };
+
+ mdio@e3120 {
+ tbi6: tbi-phy@8 {
+ reg = <8>;
+ device_type = "tbi-phy";
+ };
+ };
+
+ fm2dtsec3: ethernet@e4000 {
+ tbi-handle = <&tbi7>;
+ phy-connection-type = "sgmii";
+ };
+
+ mdio@e5120 {
+ tbi7: tbi-phy@8 {
+ reg = <8>;
+ device_type = "tbi-phy";
+ };
+ };
+
+ fm2dtsec4: ethernet@e6000 {
+ tbi-handle = <&tbi8>;
+ phy-connection-type = "sgmii";
+ };
+
+ mdio@e7120 {
+ tbi8: tbi-phy@8 {
+ reg = <8>;
+ device_type = "tbi-phy";
+ };
+ };
+
+ fm2dtsec5: ethernet@e8000 {
+ tbi-handle = <&tbi9>;
+ phy-handle = <&phy_rgmii_1>;
+ phy-connection-type = "rgmii";
+ };
+
+ mdio@e9120 {
+ tbi9: tbi-phy@8 {
+ reg = <8>;
+ device_type = "tbi-phy";
+ };
+ };
+
+ fm2tgec: ethernet@f0000 {
+ phy-handle = <&phy_xgmii_slot_1>;
+ phy-connection-type = "xgmii";
+ };
+ };
};
lbc: localbus@ffe124000 {
@@ -132,6 +320,7 @@
partition@0 {
label = "NAND U-Boot Image";
reg = <0x0 0x02000000>;
+ read-only;
};
partition@2000000 {
@@ -161,8 +350,148 @@
};
board-control@3,0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
compatible = "fsl,p5040ds-fpga", "fsl,fpga-ngpixis";
- reg = <3 0 0x40>;
+ reg = <3 0 0x30>;
+ ranges = <0 3 0 0x30>;
+
+ mdio-mux-emi1 {
+ compatible = "mdio-mux-mmioreg", "mdio-mux";
+ mdio-parent-bus = <&mdio0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <9 1>; // BRDCFG1
+ mux-mask = <0x78>; // EMI1
+
+ /*
+ * Virtual MDIO for the two on-board RGMII
+ * ports. The reg property is already correct.
+ */
+ hydra_rg: rgmii-mdio@8 {
+ status = "disabled";
+ reg = <8>; /* EMI1_EN | 0 */
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ phy_rgmii_0: ethernet-phy@0 {
+ reg = <0x0>;
+ };
+ phy_rgmii_1: ethernet-phy@1 {
+ reg = <0x1>;
+ };
+ };
+ /*
+ * Virtual MDIO for the four-port SGMII cards.
+ */
+ hydra_sg_slot2: sgmii-mdio@28 {
+ reg = <0x28>; /* EMI1_EN | 0x20 */
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+
+ phy_sgmii_slot2_1c: ethernet-phy@1c {
+ reg = <0x1c>;
+ };
+ phy_sgmii_slot2_1d: ethernet-phy@1d {
+ reg = <0x1d>;
+ };
+ phy_sgmii_slot2_1e: ethernet-phy@1e {
+ reg = <0x1e>;
+ };
+ phy_sgmii_slot2_1f: ethernet-phy@1f {
+ reg = <0x1f>;
+ };
+ };
+ hydra_sg_slot3: sgmii-mdio@68 {
+ reg = <0x68>; /* EMI1_EN | 0x60 */
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+
+ phy_sgmii_slot3_1c: ethernet-phy@1c {
+ reg = <0x1c>;
+ };
+ phy_sgmii_slot3_1d: ethernet-phy@1d {
+ reg = <0x1d>;
+ };
+ phy_sgmii_slot3_1e: ethernet-phy@1e {
+ reg = <0x1e>;
+ };
+ phy_sgmii_slot3_1f: ethernet-phy@1f {
+ reg = <0x1f>;
+ };
+ };
+ hydra_sg_slot5: sgmii-mdio@38 {
+ reg = <0x38>; /* EMI1_EN | 0x30 */
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+
+ phy_sgmii_slot5_1c: ethernet-phy@1c {
+ reg = <0x1c>;
+ };
+ phy_sgmii_slot5_1d: ethernet-phy@1d {
+ reg = <0x1d>;
+ };
+ phy_sgmii_slot5_1e: ethernet-phy@1e {
+ reg = <0x1e>;
+ };
+ phy_sgmii_slot5_1f: ethernet-phy@1f {
+ reg = <0x1f>;
+ };
+ };
+ hydra_sg_slot6: sgmii-mdio@48 {
+ reg = <0x48>; /* EMI1_EN | 0x40 */
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+
+ phy_sgmii_slot6_1c: ethernet-phy@1c {
+ reg = <0x1c>;
+ };
+ phy_sgmii_slot6_1d: ethernet-phy@1d {
+ reg = <0x1d>;
+ };
+ phy_sgmii_slot6_1e: ethernet-phy@1e {
+ reg = <0x1e>;
+ };
+ phy_sgmii_slot6_1f: ethernet-phy@1f {
+ reg = <0x1f>;
+ };
+ };
+ };
+ mdio-mux-emi2 {
+ compatible = "mdio-mux-mmioreg", "mdio-mux";
+ mdio-parent-bus = <&xmdio0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <9 1>; // BRDCFG1
+ mux-mask = <0x06>; // EMI2
+
+ /* FM2 10GEC1 is always on slot 1 */
+ hydra_xg_slot1: hydra-xg-slot1@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+ status = "disabled";
+
+ phy_xgmii_slot_1: ethernet-phy@0 {
+ reg = <4>;
+ };
+ };
+
+ /* FM1 10GEC1 is always on slot 2 */
+ hydra_xg_slot2: hydra-xg-slot2@2 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <2>;
+
+ phy_xgmii_slot_2: ethernet-phy@4 {
+ reg = <0>;
+ };
+ };
+ };
};
};
@@ -210,6 +539,61 @@
0 0x00010000>;
};
};
+
+ fsl,dpaa {
+ compatible = "fsl,p5040-dpaa", "fsl,dpaa";
+
+ ethernet@0 {
+ compatible = "fsl,p5040-dpa-ethernet", "fsl,dpa-ethernet";
+ fsl,fman-mac = <&fm1dtsec1>;
+ status = "disabled";
+ };
+ ethernet@1 {
+ compatible = "fsl,p5040-dpa-ethernet", "fsl,dpa-ethernet";
+ fsl,fman-mac = <&fm1dtsec2>;
+ };
+ ethernet@2 {
+ compatible = "fsl,p5040-dpa-ethernet", "fsl,dpa-ethernet";
+ fsl,fman-mac = <&fm1dtsec3>;
+ };
+ ethernet@3 {
+ compatible = "fsl,p5040-dpa-ethernet", "fsl,dpa-ethernet";
+ fsl,fman-mac = <&fm1dtsec4>;
+ };
+ ethernet@4 {
+ compatible = "fsl,p5040-dpa-ethernet", "fsl,dpa-ethernet";
+ fsl,fman-mac = <&fm1dtsec5>;
+ };
+ ethernet@5 {
+ compatible = "fsl,p5040-dpa-ethernet", "fsl,dpa-ethernet";
+ fsl,fman-mac = <&fm1tgec>;
+ };
+ ethernet@6 {
+ compatible = "fsl,p5040-dpa-ethernet", "fsl,dpa-ethernet";
+ fsl,fman-mac = <&fm2dtsec1>;
+ status = "disabled";
+ };
+ ethernet@7 {
+ compatible = "fsl,p5040-dpa-ethernet", "fsl,dpa-ethernet";
+ fsl,fman-mac = <&fm2dtsec2>;
+ };
+ ethernet@8 {
+ compatible = "fsl,p5040-dpa-ethernet", "fsl,dpa-ethernet";
+ fsl,fman-mac = <&fm2dtsec3>;
+ };
+ ethernet@9 {
+ compatible = "fsl,p5040-dpa-ethernet", "fsl,dpa-ethernet";
+ fsl,fman-mac = <&fm2dtsec4>;
+ };
+ ethernet@10 {
+ compatible = "fsl,p5040-dpa-ethernet", "fsl,dpa-ethernet";
+ fsl,fman-mac = <&fm2dtsec5>;
+ };
+ ethernet@11 {
+ compatible = "fsl,p5040-dpa-ethernet", "fsl,dpa-ethernet";
+ fsl,fman-mac = <&fm2tgec>;
+ };
+ };
};
/include/ "fsl/p5040si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/t4240qds.dts b/arch/powerpc/boot/dts/t4240qds.dts
index a4f1bb2..1e6abdf 100644
--- a/arch/powerpc/boot/dts/t4240qds.dts
+++ b/arch/powerpc/boot/dts/t4240qds.dts
@@ -20,7 +20,7 @@
* Foundation, either version 2 of that License or (at your option) any
* later version.
*
- * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor "AS IS" AND ANY
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
@@ -41,6 +41,36 @@
#size-cells = <2>;
interrupt-parent = <&mpic>;
+ aliases {
+ phy_rgmii1 = &phyrgmii1;
+ phy_rgmii2 = &phyrgmii2;
+ phy_sgmii3 = &phy3;
+ phy_sgmii4 = &phy4;
+ phy_sgmii11 = &phy11;
+ phy_sgmii12 = &phy12;
+ sgmii_phy11 = &sgmiiphy11;
+ sgmii_phy12 = &sgmiiphy12;
+ sgmii_phy13 = &sgmiiphy13;
+ sgmii_phy14 = &sgmiiphy14;
+ sgmii_phy21 = &sgmiiphy21;
+ sgmii_phy22 = &sgmiiphy22;
+ sgmii_phy23 = &sgmiiphy23;
+ sgmii_phy24 = &sgmiiphy24;
+ sgmii_phy31 = &sgmiiphy31;
+ sgmii_phy32 = &sgmiiphy32;
+ sgmii_phy33 = &sgmiiphy33;
+ sgmii_phy34 = &sgmiiphy34;
+ sgmii_phy41 = &sgmiiphy41;
+ sgmii_phy42 = &sgmiiphy42;
+ sgmii_phy43 = &sgmiiphy43;
+ sgmii_phy44 = &sgmiiphy44;
+ emi1_rgmii = &t4240mdio0;
+ emi1_slot1 = &t4240mdio1;
+ emi1_slot2 = &t4240mdio2;
+ emi1_slot3 = &t4240mdio3;
+ emi1_slot4 = &t4240mdio4;
+ };
+
ifc: localbus@ffe124000 {
reg = <0xf 0xfe124000 0 0x2000>;
ranges = <0 0 0xf 0xe8000000 0x08000000
@@ -91,8 +121,165 @@
};
board-control@3,0 {
- compatible = "fsl,t4240qds-fpga", "fsl,fpga-qixis";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "fsl,tetra-fpga", "fsl,fpga-qixis";
reg = <3 0 0x300>;
+ ranges = <0 3 0 0x300>;
+
+ mdio-mux-emi1 {
+ compatible = "mdio-mux-mmioreg", "mdio-mux";
+ mdio-parent-bus = <&mdio0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x54 1>; // BRDCFG1
+ mux-mask = <0xe0>; // EMI1
+
+ /* Onboard PHYs */
+ t4240mdio0: mdio@0 {
+ reg = <0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ phyrgmii1: ethernet-phy@1 { /* FM2.5 */
+ reg = <0x1>;
+ };
+ phyrgmii2: ethernet-phy@2 { /* FM1.5 */
+ reg = <0x2>;
+ };
+ };
+
+ /* Slot 1 */
+ t4240mdio1: mdio@20 {
+ reg = <0x20>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+
+ phy1: ethernet-phy@0 {
+ reg = <0x0>;
+ };
+ phy2: ethernet-phy@1 {
+ reg = <0x1>;
+ };
+ phy3: ethernet-phy@2 {
+ reg = <0x2>;
+ };
+ phy4: ethernet-phy@3 {
+ reg = <0x3>;
+ };
+ sgmiiphy11: ethernet-phy@1c {
+ reg = <0x1c>;
+ };
+ sgmiiphy12: ethernet-phy@1d {
+ reg = <0x1d>;
+ };
+ sgmiiphy13: ethernet-phy@1e {
+ reg = <0x1e>;
+ };
+ sgmiiphy14: ethernet-phy@1f {
+ reg = <0x1f>;
+ };
+ };
+
+ /* Slot 2 */
+ t4240mdio2: mdio@40 {
+ reg = <0x40>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+
+ phy5: ethernet-phy@4 {
+ reg = <0x4>;
+ };
+ phy6: ethernet-phy@5 {
+ reg = <0x5>;
+ };
+ phy7: ethernet-phy@6 {
+ reg = <0x6>;
+ };
+ phy8: ethernet-phy@7 {
+ reg = <0x7>;
+ };
+ sgmiiphy21: ethernet-phy@1c {
+ reg = <0x1c>;
+ };
+ sgmiiphy22: ethernet-phy@1d {
+ reg = <0x1d>;
+ };
+ sgmiiphy23: ethernet-phy@1e {
+ reg = <0x1e>;
+ };
+ sgmiiphy24: ethernet-phy@1f {
+ reg = <0x1f>;
+ };
+ };
+
+ /* Slot 3 */
+ t4240mdio3: mdio@60 {
+ reg = <0x60>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+
+ phy9: ethernet-phy@8 {
+ reg = <0x8>;
+ };
+ phy10: ethernet-phy@9 {
+ reg = <0x9>;
+ };
+ phy11: ethernet-phy@a {
+ reg = <0xa>;
+ };
+ phy12: ethernet-phy@b {
+ reg = <0xb>;
+ };
+ sgmiiphy31: ethernet-phy@1c {
+ reg = <0x1c>;
+ };
+ sgmiiphy32: ethernet-phy@1d {
+ reg = <0x1d>;
+ };
+ sgmiiphy33: ethernet-phy@1e {
+ reg = <0x1e>;
+ };
+ sgmiiphy34: ethernet-phy@1f {
+ reg = <0x1f>;
+ };
+ };
+
+ t4240mdio4: mdio@80 {
+ reg = <0x80>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+
+ phy13: ethernet-phy@c {
+ reg = <0xc>;
+ };
+ phy14: ethernet-phy@d {
+ reg = <0xd>;
+ };
+ phy15: ethernet-phy@e {
+ reg = <0xe>;
+ };
+ phy16: ethernet-phy@f {
+ reg = <0xf>;
+ };
+ sgmiiphy41: ethernet-phy@1c {
+ reg = <0x1c>;
+ };
+ sgmiiphy42: ethernet-phy@1d {
+ reg = <0x1d>;
+ };
+ sgmiiphy43: ethernet-phy@1e {
+ reg = <0x1e>;
+ };
+ sgmiiphy44: ethernet-phy@1f {
+ reg = <0x1f>;
+ };
+ };
+ };
};
};
@@ -112,6 +299,10 @@
ranges = <0x0 0xf 0xf6000000 0x2000000>;
};
+ lportals: lac-portals@ff8000000 {
+ ranges = <0x0 0xf 0xf8000000 0x20000>;
+ };
+
soc: soc@ffe000000 {
ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
reg = <0xf 0xfe000000 0 0x00001000>;
@@ -156,6 +347,152 @@
interrupts = <0x1 0x1 0 0>;
};
};
+
+ fman0: fman@400000 {
+ enet0: ethernet@e0000 {
+ phy-handle = <&phy5>;
+ phy-connection-type = "sgmii";
+ };
+
+ enet1: ethernet@e2000 {
+ phy-handle = <&phy6>;
+ phy-connection-type = "sgmii";
+ };
+
+ enet2: ethernet@e4000 {
+ phy-handle = <&phy7>;
+ phy-connection-type = "sgmii";
+ };
+
+ enet3: ethernet@e6000 {
+ phy-handle = <&phy8>;
+ phy-connection-type = "sgmii";
+ };
+
+ enet4: ethernet@e8000 {
+ phy-handle = <&phyrgmii2>;
+ phy-connection-type = "rgmii";
+ };
+
+ enet5: ethernet@ea000 {
+ phy-handle = <&phy2>;
+ phy-connection-type = "sgmii";
+ };
+
+ enet6: ethernet@f0000 { /* FM1@TSEC9/FM1@TGEC1 */
+ phy-handle = <&xauiphy1>;
+ phy-connection-type = "xgmii";
+ };
+
+ enet7: ethernet@f2000 { /* FM1@TSEC10/FM1@TGEC2 */
+ phy-handle = <&xauiphy2>;
+ phy-connection-type = "xgmii";
+ };
+
+ mdio@fc000 {
+ status = "disabled";
+ };
+
+ mdio@fd000 {
+ status = "disabled";
+ };
+
+ fman0_oh2 {
+ status = "disabled";
+ };
+ fman0_oh3 {
+ status = "disabled";
+ };
+ fman0_oh4 {
+ status = "disabled";
+ };
+ fman0_oh5 {
+ status = "disabled";
+ };
+ fman0_oh6 {
+ status = "disabled";
+ };
+ };
+
+ fman1: fman@500000 {
+ enet8: ethernet@e0000 {
+ phy-handle = <&phy13>;
+ phy-connection-type = "sgmii";
+ };
+
+ enet9: ethernet@e2000 {
+ phy-handle = <&phy14>;
+ phy-connection-type = "sgmii";
+ };
+
+ enet10: ethernet@e4000 {
+ phy-handle = <&phy15>;
+ phy-connection-type = "sgmii";
+ };
+
+ enet11: ethernet@e6000 {
+ phy-handle = <&phy16>;
+ phy-connection-type = "sgmii";
+ };
+
+ enet12: ethernet@e8000 {
+ phy-handle = <&phyrgmii1>;
+ phy-connection-type = "rgmii";
+ };
+
+ enet13: ethernet@ea000 {
+ phy-handle = <&phy10>;
+ phy-connection-type = "sgmii";
+ };
+
+ enet14: ethernet@f0000 { /* FM2@TSEC9/FM2@TGEC1 */
+ phy-handle = <&xauiphy3>;
+ phy-connection-type = "xgmii";
+ };
+
+ enet15: ethernet@f2000 { /* FM2@TSEC10/FM2@TGEC2 */
+ phy-handle = <&xauiphy4>;
+ phy-connection-type = "xgmii";
+ };
+
+ mdio0: mdio@fc000 {
+ };
+
+ xmdio0: mdio@fd000 {
+ xauiphy1: ethernet-phy@0 {
+ compatible = "ethernet-phy-ieee802.3-c45";
+ reg = <0x0>;
+ };
+
+ xauiphy2: ethernet-phy@1 {
+ compatible = "ethernet-phy-ieee802.3-c45";
+ reg = <0x1>;
+ };
+
+ xauiphy3: ethernet-phy@2 {
+ compatible = "ethernet-phy-ieee802.3-c45";
+ reg = <0x2>;
+ };
+
+ xauiphy4: ethernet-phy@3 {
+ compatible = "ethernet-phy-ieee802.3-c45";
+ reg = <0x3>;
+ };
+ };
+
+ fman1_oh3 {
+ status = "disabled";
+ };
+ fman1_oh4 {
+ status = "disabled";
+ };
+ fman1_oh5 {
+ status = "disabled";
+ };
+ fman1_oh6 {
+ status = "disabled";
+ };
+ };
};
pci0: pcie@ffe240000 {
@@ -227,6 +564,74 @@
ranges = <0 0 0xc 0x30000000 0 0x10000000>;
};
};
+
+ fsl,dpaa {
+ compatible = "fsl,t4240-dpaa", "fsl,dpaa";
+ ethernet@0 {
+ compatible = "fsl,t4240-dpa-ethernet", "fsl,dpa-ethernet";
+ fsl,fman-mac = <&enet0>;
+ };
+ ethernet@1 {
+ compatible = "fsl,t4240-dpa-ethernet", "fsl,dpa-ethernet";
+ fsl,fman-mac = <&enet1>;
+ };
+ ethernet@2 {
+ compatible = "fsl,t4240-dpa-ethernet", "fsl,dpa-ethernet";
+ fsl,fman-mac = <&enet2>;
+ };
+ ethernet@3 {
+ compatible = "fsl,t4240-dpa-ethernet", "fsl,dpa-ethernet";
+ fsl,fman-mac = <&enet3>;
+ };
+ ethernet@4 {
+ compatible = "fsl,t4240-dpa-ethernet", "fsl,dpa-ethernet";
+ fsl,fman-mac = <&enet4>;
+ };
+ ethernet@5 {
+ compatible = "fsl,t4240-dpa-ethernet", "fsl,dpa-ethernet";
+ fsl,fman-mac = <&enet5>;
+ };
+ ethernet@6 {
+ compatible = "fsl,t4240-dpa-ethernet", "fsl,dpa-ethernet";
+ fsl,fman-mac = <&enet6>;
+ };
+ ethernet@7 {
+ compatible = "fsl,t4240-dpa-ethernet", "fsl,dpa-ethernet";
+ fsl,fman-mac = <&enet7>;
+ };
+ ethernet@8 {
+ compatible = "fsl,t4240-dpa-ethernet", "fsl,dpa-ethernet";
+ fsl,fman-mac = <&enet8>;
+ };
+ ethernet@9 {
+ compatible = "fsl,t4240-dpa-ethernet", "fsl,dpa-ethernet";
+ fsl,fman-mac = <&enet9>;
+ };
+ ethernet@10 {
+ compatible = "fsl,t4240-dpa-ethernet", "fsl,dpa-ethernet";
+ fsl,fman-mac = <&enet10>;
+ };
+ ethernet@11 {
+ compatible = "fsl,t4240-dpa-ethernet", "fsl,dpa-ethernet";
+ fsl,fman-mac = <&enet11>;
+ };
+ ethernet@12 {
+ compatible = "fsl,t4240-dpa-ethernet", "fsl,dpa-ethernet";
+ fsl,fman-mac = <&enet12>;
+ };
+ ethernet@13 {
+ compatible = "fsl,t4240-dpa-ethernet", "fsl,dpa-ethernet";
+ fsl,fman-mac = <&enet13>;
+ };
+ ethernet@14 {
+ compatible = "fsl,t4240-dpa-ethernet", "fsl,dpa-ethernet";
+ fsl,fman-mac = <&enet14>;
+ };
+ ethernet@15 {
+ compatible = "fsl,t4240-dpa-ethernet", "fsl,dpa-ethernet";
+ fsl,fman-mac = <&enet15>;
+ };
+ };
};
/include/ "fsl/t4240si-post.dtsi"