diff options
Diffstat (limited to 'drivers/staging/et131x/et1310_mac.c')
| -rw-r--r-- | drivers/staging/et131x/et1310_mac.c | 358 |
1 files changed, 140 insertions, 218 deletions
diff --git a/drivers/staging/et131x/et1310_mac.c b/drivers/staging/et131x/et1310_mac.c index 1924968..f81e1cb 100644 --- a/drivers/staging/et131x/et1310_mac.c +++ b/drivers/staging/et131x/et1310_mac.c @@ -2,7 +2,7 @@ * Agere Systems Inc. * 10/100/1000 Base-T Ethernet Driver for the ET1301 and ET131x series MACs * - * Copyright © 2005 Agere Systems Inc. + * Copyright © 2005 Agere Systems Inc. * All rights reserved. * http://www.agere.com * @@ -19,7 +19,7 @@ * software indicates your acceptance of these terms and conditions. If you do * not agree with these terms and conditions, do not use the software. * - * Copyright © 2005 Agere Systems Inc. + * Copyright © 2005 Agere Systems Inc. * All rights reserved. * * Redistribution and use in source or binary forms, with or without @@ -40,7 +40,7 @@ * * Disclaimer * - * THIS SOFTWARE IS PROVIDED “AS IS” AND ANY EXPRESS OR IMPLIED WARRANTIES, + * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, * INCLUDING, BUT NOT LIMITED TO, INFRINGEMENT AND THE IMPLIED WARRANTIES OF * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. ANY * USE, MODIFICATION OR DISTRIBUTION OF THIS SOFTWARE IS SOLELY AT THE USERS OWN @@ -56,7 +56,6 @@ */ #include "et131x_version.h" -#include "et131x_debug.h" #include "et131x_defs.h" #include <linux/init.h> @@ -73,9 +72,10 @@ #include <linux/interrupt.h> #include <linux/in.h> #include <linux/delay.h> -#include <asm/io.h> +#include <linux/io.h> +#include <linux/bitops.h> +#include <linux/pci.h> #include <asm/system.h> -#include <asm/bitops.h> #include <linux/netdevice.h> #include <linux/etherdevice.h> @@ -92,36 +92,29 @@ #include "et131x_adapter.h" #include "et131x_initpci.h" -/* Data for debugging facilities */ -#ifdef CONFIG_ET131X_DEBUG -extern dbg_info_t *et131x_dbginfo; -#endif /* CONFIG_ET131X_DEBUG */ - /** * ConfigMacRegs1 - Initialize the first part of MAC regs * @pAdpater: pointer to our adapter structure */ -void ConfigMACRegs1(struct et131x_adapter *pAdapter) +void ConfigMACRegs1(struct et131x_adapter *etdev) { - struct _MAC_t __iomem *pMac = &pAdapter->CSRAddress->mac; + struct _MAC_t __iomem *pMac = &etdev->regs->mac; MAC_STATION_ADDR1_t station1; MAC_STATION_ADDR2_t station2; MAC_IPG_t ipg; MAC_HFDP_t hfdp; MII_MGMT_CFG_t mii_mgmt_cfg; - DBG_ENTER(et131x_dbginfo); - /* First we need to reset everything. Write to MAC configuration * register 1 to perform reset. */ writel(0xC00F0000, &pMac->cfg1.value); /* Next lets configure the MAC Inter-packet gap register */ - ipg.bits.non_B2B_ipg_1 = 0x38; // 58d - ipg.bits.non_B2B_ipg_2 = 0x58; // 88d - ipg.bits.min_ifg_enforce = 0x50; // 80d - ipg.bits.B2B_ipg = 0x60; // 96d + ipg.bits.non_B2B_ipg_1 = 0x38; /* 58d */ + ipg.bits.non_B2B_ipg_2 = 0x58; /* 88d */ + ipg.bits.min_ifg_enforce = 0x50; /* 80d */ + ipg.bits.B2B_ipg = 0x60; /* 96d */ writel(ipg.value, &pMac->ipg.value); /* Next lets configure the MAC Half Duplex register */ @@ -131,13 +124,13 @@ void ConfigMACRegs1(struct et131x_adapter *pAdapter) hfdp.bits.no_backoff = 0x0; hfdp.bits.excess_defer = 0x1; hfdp.bits.rexmit_max = 0xF; - hfdp.bits.coll_window = 0x37; // 55d + hfdp.bits.coll_window = 0x37; /* 55d */ writel(hfdp.value, &pMac->hfdp.value); /* Next lets configure the MAC Interface Control register */ writel(0, &pMac->if_ctrl.value); - /* Let's move on to setting up the mii managment configuration */ + /* Let's move on to setting up the mii management configuration */ mii_mgmt_cfg.bits.reset_mii_mgmt = 0; mii_mgmt_cfg.bits.scan_auto_incremt = 0; mii_mgmt_cfg.bits.preamble_suppress = 0; @@ -151,12 +144,12 @@ void ConfigMACRegs1(struct et131x_adapter *pAdapter) * station address is used for generating and checking pause control * packets. */ - station2.bits.Octet1 = pAdapter->CurrentAddress[0]; - station2.bits.Octet2 = pAdapter->CurrentAddress[1]; - station1.bits.Octet3 = pAdapter->CurrentAddress[2]; - station1.bits.Octet4 = pAdapter->CurrentAddress[3]; - station1.bits.Octet5 = pAdapter->CurrentAddress[4]; - station1.bits.Octet6 = pAdapter->CurrentAddress[5]; + station2.bits.Octet1 = etdev->CurrentAddress[0]; + station2.bits.Octet2 = etdev->CurrentAddress[1]; + station1.bits.Octet3 = etdev->CurrentAddress[2]; + station1.bits.Octet4 = etdev->CurrentAddress[3]; + station1.bits.Octet5 = etdev->CurrentAddress[4]; + station1.bits.Octet6 = etdev->CurrentAddress[5]; writel(station1.value, &pMac->station_addr_1.value); writel(station2.value, &pMac->station_addr_2.value); @@ -167,35 +160,31 @@ void ConfigMACRegs1(struct et131x_adapter *pAdapter) * Packets larger than (RegistryJumboPacket) that do not contain a * VLAN ID will be dropped by the Rx function. */ - writel(pAdapter->RegistryJumboPacket + 4, &pMac->max_fm_len.value); + writel(etdev->RegistryJumboPacket + 4, &pMac->max_fm_len.value); /* clear out MAC config reset */ writel(0, &pMac->cfg1.value); - - DBG_LEAVE(et131x_dbginfo); } /** * ConfigMacRegs2 - Initialize the second part of MAC regs * @pAdpater: pointer to our adapter structure */ -void ConfigMACRegs2(struct et131x_adapter *pAdapter) +void ConfigMACRegs2(struct et131x_adapter *etdev) { int32_t delay = 0; - struct _MAC_t __iomem *pMac = &pAdapter->CSRAddress->mac; + struct _MAC_t __iomem *pMac = &etdev->regs->mac; MAC_CFG1_t cfg1; MAC_CFG2_t cfg2; MAC_IF_CTRL_t ifctrl; TXMAC_CTL_t ctl; - DBG_ENTER(et131x_dbginfo); - - ctl.value = readl(&pAdapter->CSRAddress->txmac.ctl.value); + ctl.value = readl(&etdev->regs->txmac.ctl.value); cfg1.value = readl(&pMac->cfg1.value); cfg2.value = readl(&pMac->cfg2.value); ifctrl.value = readl(&pMac->if_ctrl.value); - if (pAdapter->uiLinkSpeed == TRUEPHY_SPEED_1000MBPS) { + if (etdev->linkspeed == TRUEPHY_SPEED_1000MBPS) { cfg2.bits.if_mode = 0x2; ifctrl.bits.phy_mode = 0x0; } else { @@ -210,8 +199,8 @@ void ConfigMACRegs2(struct et131x_adapter *pAdapter) /* Set up flow control */ cfg1.bits.tx_flow = 0x1; - if ((pAdapter->FlowControl == RxOnly) || - (pAdapter->FlowControl == Both)) { + if ((etdev->FlowControl == RxOnly) || + (etdev->FlowControl == Both)) { cfg1.bits.rx_flow = 0x1; } else { cfg1.bits.rx_flow = 0x0; @@ -232,7 +221,7 @@ void ConfigMACRegs2(struct et131x_adapter *pAdapter) */ cfg2.bits.len_check = 0x1; - if (pAdapter->RegistryPhyLoopbk == false) { + if (etdev->RegistryPhyLoopbk == false) { cfg2.bits.pad_crc = 0x1; cfg2.bits.crc_enable = 0x1; } else { @@ -241,8 +230,8 @@ void ConfigMACRegs2(struct et131x_adapter *pAdapter) } /* 1 - full duplex, 0 - half-duplex */ - cfg2.bits.full_duplex = pAdapter->uiDuplexMode; - ifctrl.bits.ghd_mode = !pAdapter->uiDuplexMode; + cfg2.bits.full_duplex = etdev->duplex_mode; + ifctrl.bits.ghd_mode = !etdev->duplex_mode; writel(ifctrl.value, &pMac->if_ctrl.value); writel(cfg2.value, &pMac->cfg2.value); @@ -251,48 +240,34 @@ void ConfigMACRegs2(struct et131x_adapter *pAdapter) udelay(10); delay++; cfg1.value = readl(&pMac->cfg1.value); - } while ((!cfg1.bits.syncd_rx_en || - !cfg1.bits.syncd_tx_en) && - delay < 100); + } while ((!cfg1.bits.syncd_rx_en || !cfg1.bits.syncd_tx_en) && + delay < 100); if (delay == 100) { - DBG_ERROR(et131x_dbginfo, - "Syncd bits did not respond correctly cfg1 word 0x%08x\n", - cfg1.value); + dev_warn(&etdev->pdev->dev, + "Syncd bits did not respond correctly cfg1 word 0x%08x\n", + cfg1.value); } - DBG_TRACE(et131x_dbginfo, - "Speed %d, Dup %d, CFG1 0x%08x, CFG2 0x%08x, if_ctrl 0x%08x\n", - pAdapter->uiLinkSpeed, pAdapter->uiDuplexMode, - readl(&pMac->cfg1.value), readl(&pMac->cfg2.value), - readl(&pMac->if_ctrl.value)); - /* Enable TXMAC */ ctl.bits.txmac_en = 0x1; ctl.bits.fc_disable = 0x1; - writel(ctl.value, &pAdapter->CSRAddress->txmac.ctl.value); + writel(ctl.value, &etdev->regs->txmac.ctl.value); /* Ready to start the RXDMA/TXDMA engine */ - if (!MP_TEST_FLAG(pAdapter, fMP_ADAPTER_LOWER_POWER)) { - et131x_rx_dma_enable(pAdapter); - et131x_tx_dma_enable(pAdapter); - } else { - DBG_WARNING(et131x_dbginfo, - "Didn't enable Rx/Tx due to low-power mode\n"); + if (etdev->Flags & fMP_ADAPTER_LOWER_POWER) { + et131x_rx_dma_enable(etdev); + et131x_tx_dma_enable(etdev); } - - DBG_LEAVE(et131x_dbginfo); } -void ConfigRxMacRegs(struct et131x_adapter *pAdapter) +void ConfigRxMacRegs(struct et131x_adapter *etdev) { - struct _RXMAC_t __iomem *pRxMac = &pAdapter->CSRAddress->rxmac; + struct _RXMAC_t __iomem *pRxMac = &etdev->regs->rxmac; RXMAC_WOL_SA_LO_t sa_lo; RXMAC_WOL_SA_HI_t sa_hi; RXMAC_PF_CTRL_t pf_ctrl = { 0 }; - DBG_ENTER(et131x_dbginfo); - /* Disable the MAC while it is being configured (also disable WOL) */ writel(0x8, &pRxMac->ctrl.value); @@ -331,22 +306,22 @@ void ConfigRxMacRegs(struct et131x_adapter *pAdapter) writel(0, &pRxMac->mask4_word3); /* Lets setup the WOL Source Address */ - sa_lo.bits.sa3 = pAdapter->CurrentAddress[2]; - sa_lo.bits.sa4 = pAdapter->CurrentAddress[3]; - sa_lo.bits.sa5 = pAdapter->CurrentAddress[4]; - sa_lo.bits.sa6 = pAdapter->CurrentAddress[5]; + sa_lo.bits.sa3 = etdev->CurrentAddress[2]; + sa_lo.bits.sa4 = etdev->CurrentAddress[3]; + sa_lo.bits.sa5 = etdev->CurrentAddress[4]; + sa_lo.bits.sa6 = etdev->CurrentAddress[5]; writel(sa_lo.value, &pRxMac->sa_lo.value); - sa_hi.bits.sa1 = pAdapter->CurrentAddress[0]; - sa_hi.bits.sa2 = pAdapter->CurrentAddress[1]; + sa_hi.bits.sa1 = etdev->CurrentAddress[0]; + sa_hi.bits.sa2 = etdev->CurrentAddress[1]; writel(sa_hi.value, &pRxMac->sa_hi.value); /* Disable all Packet Filtering */ writel(0, &pRxMac->pf_ctrl.value); /* Let's initialize the Unicast Packet filtering address */ - if (pAdapter->PacketFilter & ET131X_PACKET_TYPE_DIRECTED) { - SetupDeviceForUnicast(pAdapter); + if (etdev->PacketFilter & ET131X_PACKET_TYPE_DIRECTED) { + SetupDeviceForUnicast(etdev); pf_ctrl.bits.filter_uni_en = 1; } else { writel(0, &pRxMac->uni_pf_addr1.value); @@ -355,18 +330,18 @@ void ConfigRxMacRegs(struct et131x_adapter *pAdapter) } /* Let's initialize the Multicast hash */ - if (pAdapter->PacketFilter & ET131X_PACKET_TYPE_ALL_MULTICAST) { + if (etdev->PacketFilter & ET131X_PACKET_TYPE_ALL_MULTICAST) { pf_ctrl.bits.filter_multi_en = 0; } else { pf_ctrl.bits.filter_multi_en = 1; - SetupDeviceForMulticast(pAdapter); + SetupDeviceForMulticast(etdev); } /* Runt packet filtering. Didn't work in version A silicon. */ pf_ctrl.bits.min_pkt_size = NIC_MIN_PACKET_SIZE + 4; pf_ctrl.bits.filter_frag_en = 1; - if (pAdapter->RegistryJumboPacket > 8192) { + if (etdev->RegistryJumboPacket > 8192) { RXMAC_MCIF_CTRL_MAX_SEG_t mcif_ctrl_max_seg; /* In order to transmit jumbo packets greater than 8k, the @@ -409,11 +384,10 @@ void ConfigRxMacRegs(struct et131x_adapter *pAdapter) * bit 16: Receive frame truncated. * bit 17: Drop packet enable */ - if (pAdapter->uiLinkSpeed == TRUEPHY_SPEED_100MBPS) { + if (etdev->linkspeed == TRUEPHY_SPEED_100MBPS) writel(0x30038, &pRxMac->mif_ctrl.value); - } else { + else writel(0x30030, &pRxMac->mif_ctrl.value); - } /* Finally we initialize RxMac to be enabled & WOL disabled. Packet * filter is always enabled since it is where the runt packets are @@ -423,38 +397,30 @@ void ConfigRxMacRegs(struct et131x_adapter *pAdapter) */ writel(pf_ctrl.value, &pRxMac->pf_ctrl.value); writel(0x9, &pRxMac->ctrl.value); - - DBG_LEAVE(et131x_dbginfo); } -void ConfigTxMacRegs(struct et131x_adapter *pAdapter) +void ConfigTxMacRegs(struct et131x_adapter *etdev) { - struct _TXMAC_t __iomem *pTxMac = &pAdapter->CSRAddress->txmac; + struct _TXMAC_t __iomem *pTxMac = &etdev->regs->txmac; TXMAC_CF_PARAM_t Local; - DBG_ENTER(et131x_dbginfo); - /* We need to update the Control Frame Parameters * cfpt - control frame pause timer set to 64 (0x40) * cfep - control frame extended pause timer set to 0x0 */ - if (pAdapter->FlowControl == None) { + if (etdev->FlowControl == None) { writel(0, &pTxMac->cf_param.value); } else { Local.bits.cfpt = 0x40; Local.bits.cfep = 0x0; writel(Local.value, &pTxMac->cf_param.value); } - - DBG_LEAVE(et131x_dbginfo); } -void ConfigMacStatRegs(struct et131x_adapter *pAdapter) +void ConfigMacStatRegs(struct et131x_adapter *etdev) { struct _MAC_STAT_t __iomem *pDevMacStat = - &pAdapter->CSRAddress->macStat; - - DBG_ENTER(et131x_dbginfo); + &etdev->regs->macStat; /* Next we need to initialize all the MAC_STAT registers to zero on * the device. @@ -536,56 +502,52 @@ void ConfigMacStatRegs(struct et131x_adapter *pAdapter) writel(Carry2M.value, &pDevMacStat->Carry2M.value); } - - DBG_LEAVE(et131x_dbginfo); } -void ConfigFlowControl(struct et131x_adapter * pAdapter) +void ConfigFlowControl(struct et131x_adapter *etdev) { - if (pAdapter->uiDuplexMode == 0) { - pAdapter->FlowControl = None; + if (etdev->duplex_mode == 0) { + etdev->FlowControl = None; } else { char RemotePause, RemoteAsyncPause; - ET1310_PhyAccessMiBit(pAdapter, + ET1310_PhyAccessMiBit(etdev, TRUEPHY_BIT_READ, 5, 10, &RemotePause); - ET1310_PhyAccessMiBit(pAdapter, + ET1310_PhyAccessMiBit(etdev, TRUEPHY_BIT_READ, 5, 11, &RemoteAsyncPause); if ((RemotePause == TRUEPHY_BIT_SET) && (RemoteAsyncPause == TRUEPHY_BIT_SET)) { - pAdapter->FlowControl = pAdapter->RegistryFlowControl; + etdev->FlowControl = etdev->RegistryFlowControl; } else if ((RemotePause == TRUEPHY_BIT_SET) && (RemoteAsyncPause == TRUEPHY_BIT_CLEAR)) { - if (pAdapter->RegistryFlowControl == Both) { - pAdapter->FlowControl = Both; - } else { - pAdapter->FlowControl = None; - } + if (etdev->RegistryFlowControl == Both) + etdev->FlowControl = Both; + else + etdev->FlowControl = None; } else if ((RemotePause == TRUEPHY_BIT_CLEAR) && (RemoteAsyncPause == TRUEPHY_BIT_CLEAR)) { - pAdapter->FlowControl = None; + etdev->FlowControl = None; } else {/* if (RemotePause == TRUEPHY_CLEAR_BIT && RemoteAsyncPause == TRUEPHY_SET_BIT) */ - if (pAdapter->RegistryFlowControl == Both) { - pAdapter->FlowControl = RxOnly; - } else { - pAdapter->FlowControl = None; - } + if (etdev->RegistryFlowControl == Both) + etdev->FlowControl = RxOnly; + else + etdev->FlowControl = None; } } } /** * UpdateMacStatHostCounters - Update the local copy of the statistics - * @pAdapter: pointer to the adapter structure + * @etdev: pointer to the adapter structure */ -void UpdateMacStatHostCounters(struct et131x_adapter *pAdapter) +void UpdateMacStatHostCounters(struct et131x_adapter *etdev) { - struct _ce_stats_t *stats = &pAdapter->Stats; + struct _ce_stats_t *stats = &etdev->Stats; struct _MAC_STAT_t __iomem *pDevMacStat = - &pAdapter->CSRAddress->macStat; + &etdev->regs->macStat; stats->collisions += readl(&pDevMacStat->TNcl); stats->first_collision += readl(&pDevMacStat->TScl); @@ -607,27 +569,25 @@ void UpdateMacStatHostCounters(struct et131x_adapter *pAdapter) /** * HandleMacStatInterrupt - * @pAdapter: pointer to the adapter structure + * @etdev: pointer to the adapter structure * * One of the MACSTAT counters has wrapped. Update the local copy of * the statistics held in the adapter structure, checking the "wrap" * bit for each counter. */ -void HandleMacStatInterrupt(struct et131x_adapter *pAdapter) +void HandleMacStatInterrupt(struct et131x_adapter *etdev) { MAC_STAT_REG_1_t Carry1; MAC_STAT_REG_2_t Carry2; - DBG_ENTER(et131x_dbginfo); - /* Read the interrupt bits from the register(s). These are Clear On * Write. */ - Carry1.value = readl(&pAdapter->CSRAddress->macStat.Carry1.value); - Carry2.value = readl(&pAdapter->CSRAddress->macStat.Carry2.value); + Carry1.value = readl(&etdev->regs->macStat.Carry1.value); + Carry2.value = readl(&etdev->regs->macStat.Carry2.value); - writel(Carry1.value, &pAdapter->CSRAddress->macStat.Carry1.value); - writel(Carry2.value, &pAdapter->CSRAddress->macStat.Carry2.value); + writel(Carry1.value, &etdev->regs->macStat.Carry1.value); + writel(Carry2.value, &etdev->regs->macStat.Carry2.value); /* We need to do update the host copy of all the MAC_STAT counters. * For each counter, check it's overflow bit. If the overflow bit is @@ -635,88 +595,56 @@ void HandleMacStatInterrupt(struct et131x_adapter *pAdapter) * revolution of the counter. This routine is called when the counter * block indicates that one of the counters has wrapped. */ - if (Carry1.bits.rfcs) { - pAdapter->Stats.code_violations += COUNTER_WRAP_16_BIT; - } - if (Carry1.bits.raln) { - pAdapter->Stats.alignment_err += COUNTER_WRAP_12_BIT; - } - if (Carry1.bits.rflr) { - pAdapter->Stats.length_err += COUNTER_WRAP_16_BIT; - } - if (Carry1.bits.rfrg) { - pAdapter->Stats.other_errors += COUNTER_WRAP_16_BIT; - } - if (Carry1.bits.rcde) { - pAdapter->Stats.crc_err += COUNTER_WRAP_16_BIT; - } - if (Carry1.bits.rovr) { - pAdapter->Stats.rx_ov_flow += COUNTER_WRAP_16_BIT; - } - if (Carry1.bits.rdrp) { - pAdapter->Stats.norcvbuf += COUNTER_WRAP_16_BIT; - } - if (Carry2.bits.tovr) { - pAdapter->Stats.max_pkt_error += COUNTER_WRAP_12_BIT; - } - if (Carry2.bits.tund) { - pAdapter->Stats.tx_uflo += COUNTER_WRAP_12_BIT; - } - if (Carry2.bits.tscl) { - pAdapter->Stats.first_collision += COUNTER_WRAP_12_BIT; - } - if (Carry2.bits.tdfr) { - pAdapter->Stats.tx_deferred += COUNTER_WRAP_12_BIT; - } - if (Carry2.bits.tmcl) { - pAdapter->Stats.excessive_collisions += COUNTER_WRAP_12_BIT; - } - if (Carry2.bits.tlcl) { - pAdapter->Stats.late_collisions += COUNTER_WRAP_12_BIT; - } - if (Carry2.bits.tncl) { - pAdapter->Stats.collisions += COUNTER_WRAP_12_BIT; - } - - DBG_LEAVE(et131x_dbginfo); + if (Carry1.bits.rfcs) + etdev->Stats.code_violations += COUNTER_WRAP_16_BIT; + if (Carry1.bits.raln) + etdev->Stats.alignment_err += COUNTER_WRAP_12_BIT; + if (Carry1.bits.rflr) + etdev->Stats.length_err += COUNTER_WRAP_16_BIT; + if (Carry1.bits.rfrg) + etdev->Stats.other_errors += COUNTER_WRAP_16_BIT; + if (Carry1.bits.rcde) + etdev->Stats.crc_err += COUNTER_WRAP_16_BIT; + if (Carry1.bits.rovr) + etdev->Stats.rx_ov_flow += COUNTER_WRAP_16_BIT; + if (Carry1.bits.rdrp) + etdev->Stats.norcvbuf += COUNTER_WRAP_16_BIT; + if (Carry2.bits.tovr) + etdev->Stats.max_pkt_error += COUNTER_WRAP_12_BIT; + if (Carry2.bits.tund) + etdev->Stats.tx_uflo += COUNTER_WRAP_12_BIT; + if (Carry2.bits.tscl) + etdev->Stats.first_collision += COUNTER_WRAP_12_BIT; + if (Carry2.bits.tdfr) + etdev->Stats.tx_deferred += COUNTER_WRAP_12_BIT; + if (Carry2.bits.tmcl) + etdev->Stats.excessive_collisions += COUNTER_WRAP_12_BIT; + if (Carry2.bits.tlcl) + etdev->Stats.late_collisions += COUNTER_WRAP_12_BIT; + if (Carry2.bits.tncl) + etdev->Stats.collisions += COUNTER_WRAP_12_BIT; } -void SetupDeviceForMulticast(struct et131x_adapter *pAdapter) +void SetupDeviceForMulticast(struct et131x_adapter *etdev) { - struct _RXMAC_t __iomem *rxmac = &pAdapter->CSRAddress->rxmac; + struct _RXMAC_t __iomem *rxmac = &etdev->regs->rxmac; uint32_t nIndex; uint32_t result; uint32_t hash1 = 0; uint32_t hash2 = 0; uint32_t hash3 = 0; uint32_t hash4 = 0; - PM_CSR_t pm_csr; - - DBG_ENTER(et131x_dbginfo); + u32 pm_csr; /* If ET131X_PACKET_TYPE_MULTICAST is specified, then we provision * the multi-cast LIST. If it is NOT specified, (and "ALL" is not * specified) then we should pass NO multi-cast addresses to the * driver. */ - if (pAdapter->PacketFilter & ET131X_PACKET_TYPE_MULTICAST) { - DBG_VERBOSE(et131x_dbginfo, - "MULTICAST flag is set, MCCount: %d\n", - pAdapter->MCAddressCount); - + if (etdev->PacketFilter & ET131X_PACKET_TYPE_MULTICAST) { /* Loop through our multicast array and set up the device */ - for (nIndex = 0; nIndex < pAdapter->MCAddressCount; nIndex++) { - DBG_VERBOSE(et131x_dbginfo, - "MCList[%d]: %02x:%02x:%02x:%02x:%02x:%02x\n", - nIndex, - pAdapter->MCList[nIndex][0], - pAdapter->MCList[nIndex][1], - pAdapter->MCList[nIndex][2], - pAdapter->MCList[nIndex][3], - pAdapter->MCList[nIndex][4], - pAdapter->MCList[nIndex][5]); - - result = ether_crc(6, pAdapter->MCList[nIndex]); + for (nIndex = 0; nIndex < etdev->MCAddressCount; nIndex++) { + result = ether_crc(6, etdev->MCList[nIndex]); result = (result & 0x3F800000) >> 23; @@ -736,26 +664,22 @@ void SetupDeviceForMulticast(struct et131x_adapter *pAdapter) } /* Write out the new hash to the device */ - pm_csr.value = readl(&pAdapter->CSRAddress->global.pm_csr.value); - if (pm_csr.bits.pm_phy_sw_coma == 0) { + pm_csr = readl(&etdev->regs->global.pm_csr); + if ((pm_csr & ET_PM_PHY_SW_COMA) == 0) { writel(hash1, &rxmac->multi_hash1); writel(hash2, &rxmac->multi_hash2); writel(hash3, &rxmac->multi_hash3); writel(hash4, &rxmac->multi_hash4); } - - DBG_LEAVE(et131x_dbginfo); } -void SetupDeviceForUnicast(struct et131x_adapter *pAdapter) +void SetupDeviceForUnicast(struct et131x_adapter *etdev) { - struct _RXMAC_t __iomem *rxmac = &pAdapter->CSRAddress->rxmac; + struct _RXMAC_t __iomem *rxmac = &etdev->regs->rxmac; RXMAC_UNI_PF_ADDR1_t uni_pf1; RXMAC_UNI_PF_ADDR2_t uni_pf2; RXMAC_UNI_PF_ADDR3_t uni_pf3; - PM_CSR_t pm_csr; - - DBG_ENTER(et131x_dbginfo); + u32 pm_csr; /* Set up unicast packet filter reg 3 to be the first two octets of * the MAC address for both address @@ -766,27 +690,25 @@ void SetupDeviceForUnicast(struct et131x_adapter *pAdapter) * Set up unicast packet filter reg 3 to be the octets 2 - 5 of the * MAC address for first address */ - uni_pf3.bits.addr1_1 = pAdapter->CurrentAddress[0]; - uni_pf3.bits.addr1_2 = pAdapter->CurrentAddress[1]; - uni_pf3.bits.addr2_1 = pAdapter->CurrentAddress[0]; - uni_pf3.bits.addr2_2 = pAdapter->CurrentAddress[1]; - - uni_pf2.bits.addr2_3 = pAdapter->CurrentAddress[2]; - uni_pf2.bits.addr2_4 = pAdapter->CurrentAddress[3]; - uni_pf2.bits.addr2_5 = pAdapter->CurrentAddress[4]; - uni_pf2.bits.addr2_6 = pAdapter->CurrentAddress[5]; - - uni_pf1.bits.addr1_3 = pAdapter->CurrentAddress[2]; - uni_pf1.bits.addr1_4 = pAdapter->CurrentAddress[3]; - uni_pf1.bits.addr1_5 = pAdapter->CurrentAddress[4]; - uni_pf1.bits.addr1_6 = pAdapter->CurrentAddress[5]; - - pm_csr.value = readl(&pAdapter->CSRAddress->global.pm_csr.value); - if (pm_csr.bits.pm_phy_sw_coma == 0) { + uni_pf3.bits.addr1_1 = etdev->CurrentAddress[0]; + uni_pf3.bits.addr1_2 = etdev->CurrentAddress[1]; + uni_pf3.bits.addr2_1 = etdev->CurrentAddress[0]; + uni_pf3.bits.addr2_2 = etdev->CurrentAddress[1]; + + uni_pf2.bits.addr2_3 = etdev->CurrentAddress[2]; + uni_pf2.bits.addr2_4 = etdev->CurrentAddress[3]; + uni_pf2.bits.addr2_5 = etdev->CurrentAddress[4]; + uni_pf2.bits.addr2_6 = etdev->CurrentAddress[5]; + + uni_pf1.bits.addr1_3 = etdev->CurrentAddress[2]; + uni_pf1.bits.addr1_4 = etdev->CurrentAddress[3]; + uni_pf1.bits.addr1_5 = etdev->CurrentAddress[4]; + uni_pf1.bits.addr1_6 = etdev->CurrentAddress[5]; + + pm_csr = readl(&etdev->regs->global.pm_csr); + if ((pm_csr & ET_PM_PHY_SW_COMA) == 0) { writel(uni_pf1.value, &rxmac->uni_pf_addr1.value); writel(uni_pf2.value, &rxmac->uni_pf_addr2.value); writel(uni_pf3.value, &rxmac->uni_pf_addr3.value); } - - DBG_LEAVE(et131x_dbginfo); } |