summaryrefslogtreecommitdiff
path: root/arch/arm/plat-mxc/include/mach/iomux-mx51.h
AgeCommit message (Collapse)Author
2012-10-15ARM: imx: move iomux drivers and headers into mach-imxShawn Guo
The board files in mach-imx are the only users of iomux drivers and headers. Move them into mach-imx from plat-mxc. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Arnd Bergmann <arnd@arndb.de>
2012-07-09ARM: i.MX51 iomux: added missing pin definitionsAlexander Shiyan
This patch adds missing definitions for DISP, GPT and CCM pads. These pins are not used by kernel, but may be helpful for custom boards. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2012-05-02ARM: i.MX51 iomux: add missed definitions for SION-bit and mode for some padsAlexander Shiyan
Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2011-08-17ARM: i.MX51: clean up iomux-mx51.hTroy Kisky
Delete about 700 used only once symbols. I used the following script to clean up the file, iomux-mx51.h. cp iomux-mx51.h iomux-mx51.h.cpy sed -n iomux-mx51.h.cpy \ -e 's/#define[ \x09]\+\(_MX5[0-9a-zA-Z_]*\)[ \x09]\+\(.\+\)/s@\1@\2@g/p' >t.tmp sed iomux-mx51.h.cpy \ -e '/define[ \x09]\+_MX5/d' \ -f t.tmp \ -e 's/,[ \x09]*\([^,]\+\)/, \1/g' \ -e 's/, 0)[ \x09]*|[ \x09]*MUX_PAD_CTRL(/, /' \ -e 's/(IOMUX_PAD(\(.*\)))/IOMUX_PAD(\1)/' \ -e 's/0x\([0-9a-fA-F]\{2\}\)[ \x09]*,/0x0\1,/' \ -e 's/0x0\([0-9a-fA-F]\{3\}\)[ \x09]*,/0x\1,/' \ -e '/#include <mach\/iomux-v3.h/ a#define __NA_\x090x000\n' \ -e 's/0x[0]\{1,3\},/__NA_,/' \ -e 's/#define[ \x09]\+\(MX5[0-9a-zA-Z_]*\)[ \x09]\+\(IOMUX_PAD.\+\)/#define \1\x09\2/' \ -e 's/\(#define MX5[^\x09]\{5,12\}\)\x09\(IOMUX_PAD.\+\)/\1\x09\x09\x09\x09\2/' \ -e 's/\(#define MX5[^\x09]\{13,20\}\)\x09\(IOMUX_PAD.\+\)/\1\x09\x09\x09\2/' \ -e 's/\(#define MX5[^\x09]\{21,28\}\)\x09\(IOMUX_PAD.\+\)/\1\x09\x09\2/' \ -e 's/\(#define MX5[^\x09]\{29,36\}\)\x09\(IOMUX_PAD.\+\)/\1\x09\2/' \ -e 's/\(#define MX5[^\x09]\{45,\}\)\x09\(IOMUX_PAD.\+\)/\1\x09\\\n\x09\x09\x09\x09\x09\x09\2/' \ -e 's/, IOMUX_CONFIG_SION,/, 0 | IOMUX_CONFIG_SION,/' \ -e 's/\((0x[0-9a-fA-F]*, 0x[0-9a-fA-F]*, \)0x0\([0-9a-fA-F]\{2\},\)/\10x\2/' >iomux-mx51.h Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2011-03-10mx51 enchance the sd/mmc HW timing compatibility on mx51 boards.Richard Zhu
Some cards have the CRC errors in read on mx51 BBG board. Configure the eSDHC pad configurations to level up the compatibility to fix this issue. Signed-off-by: Richard Zhu <Hong-Xing.Zhu@freescale.com> Tested-by: Shawn Guo <shawn.guo@freescale.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2011-02-11i.MX51 iomux: Fixes MX51_PAD_UART2_TXD__UART2_TXD & ↵Julien Boibessot
MX51_PAD_USBH1_DATA2__UART2_TXD declarations Fixes 2 small regressions of recent iomux changes: - current MX51_PAD_UART2_TXD__UART2_TXD declaration overwrites IOMUXC_UART2_IPP_UART_RXD_MUX_SELECT_INPUT register (0x09ec) and prevent UART2 Rx from working properly. (Tested on my custom i.MX51 board where UART2 is used as console) - current MX51_PAD_USBH1_DATA2__UART2_TXD declaration also has the same problem. (Not tested) Signed-off-by: Julien Boibessot <julien.boibessot@armadeus.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2010-12-15ARM i.MX51: Full iomux supportSascha Hauer
This iomux file has been constructed from the Freescale pinmux tool. It contains all pins from the tool, but the datasheet lists some configurations not present in the tool, these are not yet added. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2010-11-24imx51: fix gpio_4_24 and gpio_4_25 pad configurationArnaud Patard (Rtp)
s/NO_PAD_CTRL/MX51_GPIO_PAD_CTRL/ Signed-off-by: Arnaud Patard <arnaud.patard@rtp-net.org> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2010-11-24imx51: add gpio mode for csi1 {h,v}syncArnaud Patard (Rtp)
Add definitions for configuring CSI1_{H,V}SYNC as GPIO Signed-off-by: Arnaud Patard <arnaud.patard@rtp-net.org> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2010-11-24imx51: enhance iomux configuration for esdhc supportArnaud Patard (Rtp)
- add definition to configure pads as ESDHC{1,2} WP and CD Signed-off-by: Arnaud Patard <arnaud.patard@rtp-net.org> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2010-11-24imx51: fix iomux configurationArnaud Patard (Rtp)
- ALT0 is used to set GPIO mode of GPIO_1_{2,3,4,5,6,7,8,9} but it's ALT1 for GPIO_1_{0,1}. Signed-off-by: Arnaud Patard <arnaud.patard@rtp-net.org> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2010-10-26ARM: imx: Add gpio-keys to plat-mxcDinh Nguyen
Add imx_add_gpio_keys function to add gpio-keys in plat-mxc Signed-off-by: Dinh Nguyen <Dinh.Nguyen@freescale.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2010-10-19iomux-mx51: fix GPIO_1_xx 's IOMUX configurationEric Bénard
this patch really configure the GPIO in GPIO mode. Signed-off-by: Eric Bénard <eric@eukrea.com>
2010-10-19iomux-mx51: fix SD1 and SD2's iomux configurationEric Bénard
Based on original patch from: Richard Zhu <r65037@freescale.com> Signed-off-by: Eric Bénard <eric@eukrea.com>
2010-10-11ARM: iomux-mx51: Add AUD5 pinmux definitionsSascha Hauer
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2010-10-01ARM: mx5/iomux-mx51: Fix input path of some pins in gpio modeSascha Hauer
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2010-10-01ARM: mx5/iomux-mx51: Add aud3 primary function definesSascha Hauer
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2010-10-01ARM: mx5/iomux-mx51: Add SPI controller padsSascha Hauer
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2010-10-01ARM: mx5/iomux-mx51: add iomux definitions for eCSPI2 on the imx51_3ds boardJason Wang
On the imx51_3ds board, eCSPI2 is connected to a SPI NOR flash, now add iomux definitions for those used pins. Signed-off-by: Jason Wang <jason77.wang@gmail.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2010-09-27ARM: mx5/mx51_babbage: Add FEC supportFabio Estevam
Tested it by booting a rootfs via NFS. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
2010-07-26iomux-mx51: add 4 pin definitionsEric Bénard
Signed-off-by: Eric Bénard <eric@eukrea.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2010-07-26mx51/iomux: add UART and GPIO pad definitions for imx51_3ds boardJason Wang
Add UART2 CTS/RTS and UART3 RXD/TXD pad definitons for imx51_3ds board, add GPIO_1_6 definiton because this pin is used as a CPLD parent irq request pin on imx51_3ds board. Signed-off-by: Jason Wang <jason77.wang@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2010-07-26mx51/iomux: Fix mux mode and input path for two padsJason Wang
For pad EIM_D27 to work in UART3_RTS mode, the input path should be 3 instead of 0; for pad USBH1_STP to work in GPIO_1_27 mode, the mux value should be 2 instead of 8. Signed-off-by: Jason Wang <jason77.wang@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2010-07-26[PATCH] mxc: Fix pad names for imx51Amit Kucheria
The pads capable of being used as GPIOs had their pad-name and mode-name switched. Also, fix the following: - Whitespace fixes - Replace IOMUX_CONFIG_ALTn with 'n' Signed-off-by: Amit Kucheria <amit.kucheria@canonical.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2010-07-26mx5: Add i2c to Freescale MX51 Babbage HWDinh Nguyen
This patch adds I2C functionality to the Freescale MX51 Babbage HW. The patch adds device structures, i2c board slave device defines, IOMUX pin defines, and clocks. Signed-off-by: Dinh Nguyen <Dinh.Nguyen@freescale.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2010-05-18mx5: bring usb phy out of reset on freescale mx51 babbage hwDinh Nguyen
This patch de-asserts the reset line that is connected to the USB ULPI PHY on USB Host1. This patch should be included with the original USB host enablement set of patches of mx51 babbage hw, but was accidentily left out. Signed-off-by: Dinh Nguyen <Dinh.Nguyen@freescale.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2010-05-03mxc: Update GPIO for USB support on Freescale MX51 Babbage HWDinh Nguyen
This patch is part of enabling USB for Freescale MX51 Babbage HW. This patch updates the iomux pins for USB, and gpio line for reset the USB hub on the MX51 Babbage HW. This patch applies to 2.6.34-rc6. Signed-off-by: Dinh Nguyen <Dinh.Nguyen@freescale.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2010-02-09mxc: Core support for Freescale i.MX5 seriesAmit Kucheria
Add basic clock support, cpu identification, I/O mapping, interrupt controller, serial port and ethernet. Signed-off-by: Amit Kucheria <amit.kucheria@canonical.com>