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2015-11-20arm: dts: ls1021a: Add dma-coherent property to usb3 nodeRajesh Bhagat
This sets dma ops as coherent for usb 3.0 platform device Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com> Signed-off-by: Rajesh Bhagat <rajesh.bhagat@freescale.com>
2015-09-23QorIQ/TMU: add TMU node to device tree for LS1021AJia Hongtao
The Thermal Monitoring Unit node for LS1021A. Signed-off-by: Jia Hongtao <hongtao.jia@freescale.com>
2015-07-14arm: ls1021a: mask interrupts before entering deep sleepChenhui Zhao
Before entering deep sleep, interrupts should be masked. Or, unexpected interrupts may block the process of deep sleep. So, mask interrupts by the following steps: 1. Mask interrupts to RCPM 2. Disable the GIC This will make deep sleep more stable. Signed-off-by: Chenhui Zhao <chenhui.zhao@freescale.com> Change-Id: I601062f8406324a308ef44491fed7cf479eaeba9 Reviewed-on: http://git.am.freescale.net:8181/39602 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
2015-07-10arm: dts: ls1021a: Add transfer mode property in DSPI2 nodeHaikun Wang
DSPI new driver can select transfer mode(tcfq/eoq) to work. The property will be read from dtsi node. Add the property tcfq-mode for LS1021a. Signed-off-by: Haikun Wang <haikun.wang@freescale.com> Change-Id: I09efa9277364b79d075a1de94bd04111e2434576 Reviewed-on: http://git.am.freescale.net:8181/39515 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
2015-07-10arm: dts: ls1021atwr: Enable DSPI2 dts nodeHaikun Wang
Erratum A-008022 has been fixed on LS1021A Rev2.0. So we can use DSPI2 now, this patch enable DSPI2 in dts for LS1021ATWR. Signed-off-by: Haikun Wang <haikun.wang@freescale.com> Change-Id: I00c76415c155a290eecbde8b37e6148b11ed2c07 Reviewed-on: http://git.am.freescale.net:8181/39514 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
2015-07-09arm: ls1021a: change the order of setting PMC interrupt registersChenhui Zhao
In deep sleep process, set interrupt status and polarity registers before enabling PMC interrupts. It is more stable, especially on ls1021a-twr board. Signed-off-by: Chenhui Zhao <chenhui.zhao@freescale.com> Change-Id: I8305e25a76f0bcc636b58178495165c915ac3c1a Reviewed-on: http://git.am.freescale.net:8181/39478 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
2015-07-03arm/dts: Add node for ina220 on LS1021ATWR-RevYuan Yao
Signed-off-by: Yuan Yao <yao.yuan@freescale.com> Change-Id: Iae6ec5f13ae85e26c2bf50efe55e81d91eba3d8d Reviewed-on: http://git.am.freescale.net:8181/39246 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
2015-07-03arm/defconfig: Add Atheros AT803X PHYs supportYuan Yao
Signed-off-by: Yuan Yao <yao.yuan@freescale.com> Change-Id: Iaba32fdf49bddbd7ee9b8f0f77847f7399c08a3f Reviewed-on: http://git.am.freescale.net:8181/39245 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
2015-06-16arm/dts: Add nodes for flexcan devices present on LS1021A-Rev2 SoCBhupesh Sharma
This patch adds the device nodes for flexcan controller(s) present on LS1021A-Rev2 SoC. Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com> Signed-off-by: Sakar Arora <Sakar.Arora@freescale.com> Change-Id: Ia301d4db49d337e37def2e6667b6e4e1586fd8fc Reviewed-on: http://git.am.freescale.net:8181/38096 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
2015-06-04arm: ls1021a: enable sleep and deep sleep for rev 2.0 siliconChenhui Zhao
On the rev 2.0 silicon of LS1021A, set the WFIL2EN bit in the SCFG_CLUSTERPMCR register to enable sleep and deep sleep. Signed-off-by: Chenhui Zhao <chenhui.zhao@freescale.com> Change-Id: I0ec6933dc1805749d7e4a815f9049301dfcfb63e Reviewed-on: http://git.am.freescale.net:8181/37396 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
2015-06-03ls1021a: dts: Add eTSEC info for 2nd interrupt groupsClaudiu Manoil
Enable support for the second interrupt group register block and the corresponding Rx/Tx/Err interrupt sources, for each eTSEC node. Fix following non-critical issues and inconsistencies: - eTSEC can support 8 H/W queues, show this in the device tree; - remove "fsl,[r|t]x-bit-map" properties, they are obsoleted; - register block size is 0x1000 (4kB memory page), not 0x8000; - reg property has 2 "address" and resp. 2 "size" cells, not 1; - use register block address as queue-group id for consistency; Signed-off-by: Claudiu Manoil <claudiu.manoil@freescale.com> Change-Id: Iada02221d1f3e06cc019a7b067c9b676c7c0b77d Reviewed-on: http://git.am.freescale.net:8181/37273 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Huan Wang <alison.wang@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
2015-05-29ls102xa: nor: Adjust the partition for NOR flash according to the newAlison Wang
mapping table According to the new mapping table, the partition for NOR flash is adjusted. Signed-off-by: Alison Wang <alison.wang@freescale.com> Change-Id: Id535115a4ac53aeadd4c144425800fc566ab76b8 Reviewed-on: http://git.am.freescale.net:8181/37068 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
2015-05-25arm: ls1021a: add deep sleep support on TWR-LS1021A-PBChenhui Zhao
Add deep sleep support on TWR-LS1021A-PB, which has CPLD on board instead of FPGA. Enable the ftm0 node in .dts to enable wake-on-Flextimer feature. Change-Id: I0b1234cdd80d852140964240234576705764cd89 Signed-off-by: Chenhui Zhao <chenhui.zhao@freescale.com> Reviewed-on: http://git.am.freescale.net:8181/36250 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Dongsheng Wang <dongsheng.wang@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
2015-05-19arm: ls1021a: add platform notifier for dma-coherent requirementAlison Wang
This patch adds platform notifier for dma-coherent requirement. Structure arm_coherent_dma_ops is used instead of arm_dma_ops. Signed-off-by: Alison Wang <alison.wang@freescale.com> Change-Id: I55e755b5ead1cb50ff9ca2e6838588a04e5ea9e7 Reviewed-on: http://git.am.freescale.net:8181/36291 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Claudiu Manoil <claudiu.manoil@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
2015-05-19ls102xa: dts: Remove big-endian-regs property for SAIAlison Wang
As SAI's registers are configured as little-endian mode, big-endian-regs property is not needed. Signed-off-by: Alison Wang <alison.wang@freescale.com> Change-Id: Ibcd07bbdc1a3fa4e738e9e20c977f35405f54d32 Reviewed-on: http://git.am.freescale.net:8181/36160 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
2015-05-19ls102xa: nor: Adjust the partition for NOR flashAlison Wang
As the load address of U-Boot for NOR boot is changed, the partition for NOR flash is adjusted accordingly. Signed-off-by: Alison Wang <alison.wang@freescale.com> Change-Id: Ibf71d76071c78784f651f8e00a7dc65c2cfc5b75 Reviewed-on: http://git.am.freescale.net:8181/36373 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
2015-03-30seccomp,x86,arm,mips,s390: Remove nr parameter from secure_computingBogdan Purcareata
The secure_computing function took a syscall number parameter, but it only paid any attention to that parameter if seccomp mode 1 was enabled. Rather than coming up with a kludge to get the parameter to work in mode 2, just remove the parameter. To avoid churn in arches that don't have seccomp filters (and may not even support syscall_get_nr right now), this leaves the parameter in secure_computing_strict, which is now a real function. For ARM, this is a bit ugly due to the fact that ARM conditionally supports seccomp filters. Fixing that would probably only be a couple of lines of code, but it should be coordinated with the audit maintainers. This will be a slight slowdown on some arches. The right fix is to pass in all of seccomp_data instead of trying to make just the syscall nr part be fast. This is a prerequisite for making two-phase seccomp work cleanly. Cc: Russell King <linux@arm.linux.org.uk> Cc: linux-arm-kernel@lists.infradead.org Cc: Ralf Baechle <ralf@linux-mips.org> Cc: linux-mips@linux-mips.org Cc: Martin Schwidefsky <schwidefsky@de.ibm.com> Cc: Heiko Carstens <heiko.carstens@de.ibm.com> Cc: linux-s390@vger.kernel.org Cc: x86@kernel.org Cc: Kees Cook <keescook@chromium.org> Signed-off-by: Andy Lutomirski <luto@amacapital.net> Signed-off-by: Kees Cook <keescook@chromium.org> (backported from commit a4412fc9486ec85686c6c7929e7e829f62ae377e) Signed-off-by: Bogdan Purcareata <bogdan.purcareata@freescale.com> Change-Id: I4109ed2560d19349927c3e3f7648022ae23db318 Reviewed-on: http://git.am.freescale.net:8181/33029 Reviewed-by: Scott Wood <scottwood@freescale.com> Tested-by: Honghua Yin <Hong-Hua.Yin@freescale.com> Reviewed-by: Honghua Yin <Hong-Hua.Yin@freescale.com>
2015-03-30syscall_get_arch: remove useless function argumentsEric Paris
Every caller of syscall_get_arch() uses current for the task and no implementors of the function need args. So just get rid of both of those things. Admittedly, since these are inline functions we aren't wasting stack space, but it just makes the prototypes better. Signed-off-by: Eric Paris <eparis@redhat.com> Cc: linux-arm-kernel@lists.infradead.org Cc: linux-mips@linux-mips.org Cc: linux390@de.ibm.com Cc: x86@kernel.org Cc: linux-kernel@vger.kernel.org Cc: linux-s390@vger.kernel.org Cc: linux-arch@vger.kernel.org (backported from commit 5e937a9ae9137899c6641d718bd3820861099a09) Signed-off-by: Bogdan Purcareata <bogdan.purcareata@freescale.com> Change-Id: Ifeefd84eeaa99445fdfc49ef782b01957dd67c00 Reviewed-on: http://git.am.freescale.net:8181/33023 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Honghua Yin <Hong-Hua.Yin@freescale.com>
2015-03-30arm:dts:ls1021a : Add configure-gfladj property to USB3 nodeNikhil Badola
Add "configure-gfladj" boolean property to USB3 node. This property is used to determine whether frame length adjustent is required or not Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com> Change-Id: Iab5ad0062acdbc03035d2ca98de071a52074e844 Reviewed-on: http://git.am.freescale.net:8181/33663 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Ramneek Mehresh <ramneek.mehresh@freescale.com> Reviewed-by: Honghua Yin <Hong-Hua.Yin@freescale.com>
2015-03-26arm: KVM: Don't return PSCI_INVAL if waitqueue is inactiveChristoffer Dall
The current KVM implementation of PSCI returns INVALID_PARAMETERS if the waitqueue for the corresponding CPU is not active. This does not seem correct, since KVM should not care what the specific thread is doing, for example, user space may not have called KVM_RUN on this VCPU yet or the thread may be busy looping to user space because it received a signal; this is really up to the user space implementation. Instead we should check specifically that the CPU is marked as being turned off, regardless of the VCPU thread state, and if it is, we shall simply clear the pause flag on the CPU and wake up the thread if it happens to be blocked for us. Further, the implementation seems to be racy when executing multiple VCPU threads. There really isn't a reasonable user space programming scheme to ensure all secondary CPUs have reached kvm_vcpu_first_run_init before turning on the boot CPU. Therefore, set the pause flag on the vcpu at VCPU init time (which can reasonably be expected to be completed for all CPUs by user space before running any VCPUs) and clear both this flag and the feature (in case the feature can somehow get set again in the future) and ping the waitqueue on turning on a VCPU using PSCI. Reported-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org> (cherry picked from commit 478a8237f656d86d25b3e4e4bf3c48f590156294) Conflicts: arch/arm/kvm/psci.c Signed-off-by: Diana Craciun <Diana.Craciun@freescale.com> Change-Id: Ifdb4ff10bd3f02de20ee2302024a7dbedd1ddbf0 Reviewed-on: http://git.am.freescale.net:8181/31349 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Mihai Caraman <mihai.caraman@freescale.com> Reviewed-by: Honghua Yin <Hong-Hua.Yin@freescale.com>
2015-03-19Merge branch 'qoriq-sdk' into LS1-SDKJason Jin
2015-03-09arm: ls1021a: enable WoL by enabling error interrupts of eTSEC1Chenhui Zhao
In deep sleep case, when enabling Wake-on-LAN feature, receiving a magic packet will trigger an error interrupt on eTSEC1. Therefore, enable these interrupts in setting PMC interrupt registers for deep sleep. Signed-off-by: Chenhui Zhao <chenhui.zhao@freescale.com> Change-Id: I3a2ca3e98e261d1c5c2f422203943959b871d7bd Reviewed-on: http://git.am.freescale.net:8181/32216 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Yuantian Tang <yuantian.tang@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
2015-03-05arm: ls1021a: OCRAM1 does not power down in deep sleepChenhui Zhao
In the case of SD boot, system can't wake from deep sleep if OCRAM1 is powered down. Therefore, keep it on when doing deep sleep. Signed-off-by: Chenhui Zhao <chenhui.zhao@freescale.com> Change-Id: Ib5f6b1c46f7c66e83595fc4fbe17789e557adee9 Reviewed-on: http://git.am.freescale.net:8181/31996 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Yuantian Tang <yuantian.tang@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
2015-03-03arm: ls1021a: added SATA supportAlison Wang
Added SATA device node and enabled AHCI config by default. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Change-Id: I288e6bffea28ea31804e20190dfa6b580fa2d7eb Reviewed-on: http://git.am.freescale.net:8181/31841 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Xiaobo Xie <X.Xie@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
2015-02-13Merge branch 'rtmerge'Scott Wood
Signed-off-by: Scott Wood <scottwood@freescale.com> Conflicts: arch/arm/kvm/mmu.c arch/arm/mm/proc-v7-3level.S arch/powerpc/kernel/vdso32/getcpu.S drivers/crypto/caam/error.c drivers/crypto/caam/sg_sw_sec4.h drivers/usb/host/ehci-fsl.c
2015-02-13arm-preempt-lazy-support.patchThomas Gleixner
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2015-02-13arm-enable-highmem-for-rt.patchThomas Gleixner
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2015-02-13arm/highmem: flush tlb on unmapSebastian Andrzej Siewior
The tlb should be flushed on unmap and thus make the mapping entry invalid. This is only done in the non-debug case which does not look right. Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
2015-02-13arm/unwind: use a raw_spin_lockSebastian Andrzej Siewior
Mostly unwind is done with irqs enabled however SLUB may call it with irqs disabled while creating a new SLUB cache. I had system freeze while loading a module which called kmem_cache_create() on init. That means SLUB's __slab_alloc() disabled interrupts and then ->new_slab_objects() ->new_slab() ->setup_object() ->setup_object_debug() ->init_tracking() ->set_track() ->save_stack_trace() ->save_stack_trace_tsk() ->walk_stackframe() ->unwind_frame() ->unwind_find_idx() =>spin_lock_irqsave(&unwind_lock); Cc: stable-rt@vger.kernel.org Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
2015-02-13arm-disable-highmem-on-rt.patchThomas Gleixner
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2015-02-13ARM: Initialize ptl->lock for vector pageFrank Rowand
Without this patch, ARM can not use SPLIT_PTLOCK_CPUS if PREEMPT_RT_FULL=y because vectors_user_mapping() creates a VM_ALWAYSDUMP mapping of the vector page (address 0xffff0000), but no ptl->lock has been allocated for the page. An attempt to coredump that page will result in a kernel NULL pointer dereference when follow_page() attempts to lock the page. The call tree to the NULL pointer dereference is: do_notify_resume() get_signal_to_deliver() do_coredump() elf_core_dump() get_dump_page() __get_user_pages() follow_page() pte_offset_map_lock() <----- a #define ... rt_spin_lock() The underlying problem is exposed by mm-shrink-the-page-frame-to-rt-size.patch. Signed-off-by: Frank Rowand <frank.rowand@am.sony.com> Cc: Frank <Frank_Rowand@sonyusa.com> Cc: Peter Zijlstra <peterz@infradead.org> Link: http://lkml.kernel.org/r/4E87C535.2030907@am.sony.com Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2015-02-13mm: pagefault_disabled()Peter Zijlstra
Wrap the test for pagefault_disabled() into a helper, this allows us to remove the need for current->pagefault_disabled on !-rt kernels. Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl> Link: http://lkml.kernel.org/n/tip-3yy517m8zsi9fpsf14xfaqkw@git.kernel.org
2015-02-13mm: Fixup all fault handlers to check current->pagefault_disableThomas Gleixner
Necessary for decoupling pagefault disable from preempt count. Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2015-02-13ARM: AT91: PIT: Remove irq handler when clock event is unusedBenedikt Spranger
Setup and remove the interrupt handler in clock event mode selection. This avoids calling the (shared) interrupt handler when the device is not used. Signed-off-by: Benedikt Spranger <b.spranger@linutronix.de> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> [bigeasy: redo the patch with NR_IRQS_LEGACY which is probably required since commit 8fe82a55 ("ARM: at91: sparse irq support") which is included since v3.6. Patch based on what Sami Pietikäinen <Sami.Pietikainen@wapice.com> suggested]. Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
2015-02-13preempt-rt: Convert arm boot_lock to rawFrank Rowand
The arm boot_lock is used by the secondary processor startup code. The locking task is the idle thread, which has idle->sched_class == &idle_sched_class. idle_sched_class->enqueue_task == NULL, so if the idle task blocks on the lock, the attempt to wake it when the lock becomes available will fail: try_to_wake_up() ... activate_task() enqueue_task() p->sched_class->enqueue_task(rq, p, flags) Fix by converting boot_lock to a raw spin lock. Signed-off-by: Frank Rowand <frank.rowand@am.sony.com> Link: http://lkml.kernel.org/r/4E77B952.3010606@am.sony.com Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2015-02-13Reset to 3.12.37Scott Wood
2015-02-10arm: ls1021a: utilizing hrtimer based broadcastJingchang Lu
This add utilization on hrtimer based broadcast instead the periodic tick broadcast to provide high resolution clock in SMP. Signed-off-by: Jingchang Lu <jingchang.lu@freescale.com> Change-Id: I391bf06fa4b238ab49bced26e3be8c2b6c677c32 Reviewed-on: http://git.am.freescale.net:8181/30436 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Yangbo Lu <yangbo.lu@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
2015-02-05ls1021aqds: dcu: Add HDMI hardware parameters in ls1021a-qds.dtsJianwei.wang
This patch adds HDMI hardware parameters in ls1021a-qds.dts for DCU on ls1021aqds board Signed-off-by: Jianwei.wang <b52261@freescale.com> Change-Id: Idde265ee04bbf5120483a621347fe5fd5a2a6e4c Reviewed-on: http://git.am.freescale.net:8181/29683 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Huan Wang <alison.wang@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
2015-02-05arm: ls1021a: no need to reset the registers after core resetChenhui Zhao
These registers has been reset in the bootloader after power-up. No need to reset them in kernel. Signed-off-by: Chenhui Zhao <chenhui.zhao@freescale.com> Change-Id: I300f1763bafce3291c371b05d7bce3c363dc760b Reviewed-on: http://git.am.freescale.net:8181/29620 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Zhuoyu Zhang <Zhuoyu.Zhang@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
2015-02-05arm: ls1021a: set wakeup devices dynamically for sleep/deep sleepChenhui Zhao
If a device works as a wakeup source, it will keep working in the peroid of sleep/deep sleep. This patch sets the wakeup devices according to the wakeup attribute of device. Signed-off-by: Chenhui Zhao <chenhui.zhao@freescale.com> Change-Id: If49a8ad282115ac415fb03d0197964c5ae10c86d Reviewed-on: http://git.am.freescale.net:8181/29152 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Dongsheng Wang <dongsheng.wang@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
2015-02-05arm: ls1: add error handling caseZhuoyu Zhang
* Add iomap() error handling case and initialize rcpm_base when system booting up. * Only fill secondary_pre_boot_entry with value of SCRATCHRW1 register when system boot up, do not need to fill it each time doing cpu-hotplug. Signed-off-by: Zhuoyu Zhang <Zhuoyu.Zhang@freescale.com> Change-Id: If672bd18074eea6db75c9273a7656aff983ffd9a Reviewed-on: http://git.am.freescale.net:8181/28866 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Chenhui Zhao <chenhui.zhao@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
2014-12-11arm: dts: ls1021a-twr: remove dspi1 node for cannot be verifiedJingchang Lu
The dspi1 is not availiable on LS1021A-R1.0, thus the node can't be verified. This patch removes the dspi1 node from the TWR board dts for consistent with this limitation. Signed-off-by: Jingchang Lu <jingchang.lu@freescale.com> Change-Id: Ic9178b89c2cc78c3c805e999c8fa24817cbcb06f Reviewed-on: http://git.am.freescale.net:8181/25580 Reviewed-by: Huan Wang <alison.wang@freescale.com> Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Chenhui Zhao <chenhui.zhao@freescale.com> Reviewed-by: Matthew Weigel <Matthew.Weigel@freescale.com>
2014-12-11arm: ls1: only call ls1_pm_iomap() when doing deep sleepChenhui Zhao
ls1_pm_iomap() maps some register spaces for deep sleep, so do not call ls1_pm_iomap() when doing sleep. This patch also fixes a kernel BUG which happens when doing sleep on LS1021ATWR board. Signed-off-by: Chenhui Zhao <chenhui.zhao@freescale.com> Change-Id: I1e06222f6ee2f6c44f763d48d959680838db0551 Reviewed-on: http://git.am.freescale.net:8181/25476 Reviewed-by: Yang Li <LeoLi@freescale.com> Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Matthew Weigel <Matthew.Weigel@freescale.com>
2014-12-11arm: ls1: make the workaround more stableChenhui Zhao
Increase the delay time to 15ms, which is more stable. The delay is added in the commit: commit cd20fed09d426bcc38348e8d1dd32ad828239170 Author: Zhang Zhuoyu <Zhuoyu.Zhang@freescale.com> Date: Wed Nov 19 15:49:53 2014 +0800 arm: ls1: provide a workaround for core soft reset Signed-off-by: Chenhui Zhao <chenhui.zhao@freescale.com> Change-Id: Ic7c57346bedab74d5161c36435373af7bc41fb48 Reviewed-on: http://git.am.freescale.net:8181/25423 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Dongsheng Wang <dongsheng.wang@freescale.com> Reviewed-by: Yang Li <LeoLi@freescale.com> Reviewed-by: Matthew Weigel <Matthew.Weigel@freescale.com>
2014-12-11ls1021a/dts: Add eTSEC1 as wake-up event sourceClaudiu Manoil
According to the H/W reference manual, eTSEC1 (EC1) is a valid wake-up event source. The supported wake-up events are magic packet and user defined packet (eTSEC filer). Change-Id: Ife1a0d1f0afcfa8641c6630cb12c9e40775b9e47 Signed-off-by: Claudiu Manoil <claudiu.manoil@freescale.com> Reviewed-on: http://git.am.freescale.net:8181/24220 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com> Reviewed-by: Richard Schmitt <richard.schmitt@freescale.com>
2014-12-11qspi: ls102xa: Adjust the size of QSPI AMBA Bus memory mapAlison Wang
This patch adjust the size of QSPI AMBA Bus memory map to 64M to avoid the issue that system default vmalloc size is not enough. Signed-off-by: Alison Wang <alison.wang@freescale.com> Change-Id: Ie917be03b0a0479f2c49dc02b9c36cb04ecc87c8 Reviewed-on: http://git.am.freescale.net:8181/24671 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com> Reviewed-by: Richard Schmitt <richard.schmitt@freescale.com>
2014-12-11ls1021a: Turn off DEBUG_SPINLOCK configClaudiu Manoil
This debug option should be off in the release defconfig. Enabling this debug option has significant impact on CPU utilization and overall system performance. i.e.: Networking Tx throughput tests with PKTGEN show a throughput loss of up to 10% when this debug config option is enabled. Change-Id: Ia160a8d99425fabb64051d7549f9d55ff5d420ce Signed-off-by: Claudiu Manoil <claudiu.manoil@freescale.com> Reviewed-on: http://git.am.freescale.net:8181/23857 Reviewed-by: Horia Ioan Geanta Neag <horia.geanta@freescale.com> Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Sandeep Malik <Sandeep.Malik@freescale.com> Reviewed-by: Richard Schmitt <richard.schmitt@freescale.com>
2014-12-11arm: ls1: provide a workaround for core soft resetZhang Zhuoyu
Due to an erratum, after core soft reset, core state machine registers need to force release manually to avoid cache coherence issue. Signed-off-by: Zhang Zhuoyu <Zhuoyu.Zhang@freescale.com> ---- Fix previous known issue http://git.am.freescale.net:8181/21918 Change-Id: I44a7cf8a315bafe7dc413f73d2af2579da246fbb Reviewed-on: http://git.am.freescale.net:8181/23520 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Matthew Weigel <Matthew.Weigel@freescale.com>
2014-12-11arm: ls1: implement ls1 cpu-hotplug by reset coreZhang Zhuoyu
CPU hotplug should always reset core and boots up the same path as a cold boot to be compatible with kexec. Signed-off-by: Zhang Zhuoyu <Zhuoyu.Zhang@freescale.com> ---- Fix previous known issue http://git.am.freescale.net:8181/21918 Patch Sent Upstream http://patchwork.ozlabs.org/patch/393683/ Change-Id: I668b59b4250ef62395a6fd8c22ea64f64af9d106 Reviewed-on: http://git.am.freescale.net:8181/23519 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Yuantian Tang <yuantian.tang@freescale.com> Reviewed-by: Matthew Weigel <Matthew.Weigel@freescale.com>
2014-12-11ls1020: Add crypto node alias in device treeRuchika Gupta
U-boot patches up the device tree crypto node for the era property. crypto node alias was missing in the ls1020 device trees. Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com> Change-Id: I335cc0765a1f66c72d98bab737aab3012448bf18 Reviewed-on: http://git.am.freescale.net:8181/23508 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Horia Ioan Geanta Neag <horia.geanta@freescale.com> Reviewed-by: Matthew Weigel <Matthew.Weigel@freescale.com>
generated by cgit v0.10.2 at 2024-06-08 16:13:47 (GMT)