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A ioport setting was needed when used the QE uart function on TWR-P1025.
Added a conditional definition to avoid missing this setting when the
QE-uart driver was bulit to a module.
Signed-off-by: Xie Xiaobo <X.Xie@freescale.com>
Change-Id: I95b40c760335ce5fa7a27a94287dbef28219b5fa
Reviewed-on: http://git.am.freescale.net:8181/6643
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Yang Li <LeoLi@freescale.com>
Reviewed-by: Thomas Trefny <Tom.Trefny@freescale.com>
Reviewed-on: http://git.am.freescale.net:8181/12045
Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
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Erratum A-008007 states that PVR register value is unreliable for
e5500 cores (Major revision 1.0, Minor revision 2.0) which are
present in T1040 Rev1.0 SoC.
This workaround implementation
-adds a new config option 'CONFIG_FSL_ERRATUM_A_008007' in t1040
specific defconfig files. This config option is used to make
sure that changes does not impact non-T1040 platforms.
-replaces mfspr(x) macro defintion to check if above erratum is
defined and if x is same as SPRN_PVR, then return static value
else call mfspr instruction.
-Similarly replaces mfpvr() calls
TODO:
1.Use some cleaner approach like reading SVR rgeister or parse
device tree to check if T1040 Rev1.0 Si instead of using config option.
2.This patch only replaces current accesses of PVR register but
does not restrict any new code which tries to read this.
A mechanism needs to be implemented to restrict this.
Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Change-Id: Ib5f17dec01ca0d98c5f506b1be23dfe06a541015
Reviewed-on: http://git.am.freescale.net:8181/12350
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
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Add 1588 timer node in file:
arch/powerpc/boot/dts/fsl/bsc9131si-post.dtsi
Signed-off-by: Yangbo Lu <yangbo.lu@freescale.com>
Change-Id: I1dbbcab7ed38d136d3d8bd589adbf5e451db612c
Reviewed-on: http://git.am.freescale.net:8181/12433
Reviewed-by: Xiaobo Xie <X.Xie@freescale.com>
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
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Change-Id: I8acfcfe0da35031c20b55a67626f0fbe13a42246
Signed-off-by: Mandy Lavi <mandy.lavi@freescale.com>
Reviewed-on: http://git.am.freescale.net:8181/12367
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Nir Erez <nir.erez@freescale.com>
Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
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Signed-off-by: Scott Wood <scottwood@freescale.com>
Conflicts:
arch/sparc/Kconfig
drivers/tty/tty_buffer.c
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This fixes below compilation error on SOCs where CONFIG_PHYS_64BIT
is not defined:
arch/powerpc/kvm/e500_mmu_host.c: In function 'kvmppc_e500_shadow_map':
| arch/powerpc/kvm/e500_mmu_host.c:631:20: error: 'PTE_WIMGE_SHIFT' undeclared (first use in this function)
| wimg = (*ptep >> PTE_WIMGE_SHIFT) & MAS2_WIMGE_MASK;
| ^
| arch/powerpc/kvm/e500_mmu_host.c:631:20: note: each undeclared identifier is reported only once for each function it appears in
| make[1]: *** [arch/powerpc/kvm/e500_mmu_host.o] Error 1
Signed-off-by: Bharat Bhushan <Bharat.Bhushan@freescale.com>
Change-Id: Ic49cf6dab73f05b7eed751c2fa6bc6182f178cdc
Reviewed-on: http://git.am.freescale.net:8181/12214
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Stuart Yoder <stuart.yoder@freescale.com>
Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
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Add fsl_set_power_except() for setting powerdown exception when sleep.
The drivers can call this function to set the corresponding bits if
the devices will power down when sleep.
This patch also fixed an issue which is that FMan ports can not work after
wake-up from deep sleep using Wake-on-LAN. Set FMan bit and MAC bits of the
register IPPDEXPCR seperately, instead of setting them together.
Change-Id: I8f632efb8ca54a5d32deb7ee1d42b333fa66d5cd
Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com>
Reviewed-on: http://git.am.freescale.net:8181/12219
Reviewed-by: Yang Li <LeoLi@freescale.com>
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
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According to T1040RM Rev D, 04/2014, T1 has not as many
FM_MAX_NUM_OF_OH_PORTS as the ones in T4240, there are
only 4 Offline/Host Command Ports (O/H n) in T1. So oh5
is not available.
This patch is replacing oh5 with oh2 in T1 dts.
Signed-off-by: Jianhua Xie <jianhua.xie@freescale.com>
Change-Id: I99be60539aad6d9999dd8198fd5b0e98ecef7ca0
Reviewed-on: http://git.am.freescale.net:8181/12242
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Mandy Lavi <Mandy.Lavi@freescale.com>
Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
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Add power sensor chip ina220 nodes in dts to support
power monitor
Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com>
Change-Id: I7973e6c259f7189d077c798ca914bb4bf6d7dd98
Reviewed-on: http://git.am.freescale.net:8181/12206
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Hongtao Jia <hongtao.jia@freescale.com>
Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
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Add power sensor chip ina220 node in dts to support
power monitor
Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com>
Change-Id: I2e250ad72ddc0cf226aabff515b9b0e4e72b3ff6
Reviewed-on: http://git.am.freescale.net:8181/12205
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Hongtao Jia <hongtao.jia@freescale.com>
Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
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Basically, this patch does the following:
1. Move the codes of parsing boot parameters from setup-common.c
to driver. In this way, code reader can know directly that
there are boot parameters that can change the timeout.
2. Make boot parameter 'booke_wdt_period' effective.
currently, when driver is loaded, default timeout is always
being used in stead of booke_wdt_period.
3. Wrap up the watchdog timeout in device struct and clean up
unnecessary codes.
Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com>
Change-Id: I1d605067e39e3805a539f079e86934b38fa7d224
Reviewed-on: http://git.am.freescale.net:8181/12196
Reviewed-by: Yang Li <LeoLi@freescale.com>
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
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By default we enable CONFIG_I2C_MUX and CONFIG_I2C_MUX_PCA954x,
which are needed on T2080QDS, T4240QDS, B4860QDS.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Change-Id: Ic897fb8d0cd2f06fe110d2d73f021fb8a1168aaf
Reviewed-on: http://git.am.freescale.net:8181/12213
Reviewed-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
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Virtualized environments expose a e6500 dual-threaded core
as two single-threaded e6500 cores. Take advantage of this
and get rid of the tlb lock and the trap-causing tlbsx in
the htw miss handler by guarding with CPU_FTR_SMT, as it's
already being done in the bolted tlb1 miss handler.
As results below show, lmbench random memory access
latency test shows an improvement of ~34%.
Memory latencies in nanoseconds - smaller is better
(WARNING - may not be correct, check graphs)
----------------------------------------------------
Host Mhz L1 $ L2 $ Main mem Rand mem
--------- --- ---- ---- -------- --------
smt 1665 1.8020 13.2 83.0 1149.7
nosmt 1665 1.8020 13.2 83.0 758.1
Signed-off-by: Laurentiu Tudor <Laurentiu.Tudor@freescale.com>
Cc: Scott Wood <scottwood@freescale.com>
Change-Id: Ia6c028b8bb9c847d46d32f788a7257527cd6af09
Reviewed-on: http://git.am.freescale.net:8181/12089
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Scott Wood <scottwood@freescale.com>
Reviewed-by: Richard Schmitt <richard.schmitt@freescale.com>
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EP device bar address will lost when EP device in D3 state,
But when system thaw out from hibernation freezen, EP bar address
not be restored in thaw flow.
The pci framework provide arch-specific hooks(pcibios_pm_ops) when
a PCI device is doing a hibernate transition, so register
fsl_pci_thaw_noirq into pcibios_pm_ops to fix this issue, the
fsl_pci_thaw_noirq will call pci_restore_state() to restore EP bar
address.
Signed-off-by: Wang Dongsheng <dongsheng.wang@freescale.com>
Change-Id: I11b68737dd9aafc99f4b7571558529c37e8a648b
Reviewed-on: http://git.am.freescale.net:8181/12031
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Yang Li <LeoLi@freescale.com>
Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
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T4240QDS and T4240RDB have the third DMA engine
controller. So add corresponding DMA node into
dts file.
Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com>
Change-Id: I52a1a7786ce7c8b457d4c1c532a6d50b28c08544
Reviewed-on: http://git.am.freescale.net:8181/12078
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
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Linux supports maximum two 10G per FMAN. t2080qds has
four 10G ports. Removing two 10G from usdpaa device-tree
till this gets fixed.
Signed-off-by: Sandeep Singh <sandeep@freescale.com>
Change-Id: I4c868131f79b6ba43dffea198d73c95425b09ce4
Reviewed-on: http://git.am.freescale.net:8181/12050
Reviewed-by: Vakul Garg <vakul@freescale.com>
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
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Linux supports maximum two 10G per FMAN. t2080rdb has
four 10G ports. Removing two 10G from usdpaa device-tree
till this gets fixed.
Signed-off-by: Sandeep Singh <sandeep@freescale.com>
Change-Id: I490684739bf7dea1978e0eba9be1a213dfb386fe
Reviewed-on: http://git.am.freescale.net:8181/12049
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Vakul Garg <vakul@freescale.com>
Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
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KVM uses same WIM tlb attributes as the corresponding qemu pte.
For this we now search the linux pte for the requested page and
get these cache caching/coherency attributes from pte.
Signed-off-by: Bharat Bhushan <Bharat.Bhushan@freescale.com>
Change-Id: Idfbf48fd839fecaff6996f42ffa8c2ec35c1455d
Reviewed-on: http://git.am.freescale.net:8181/11892
Reviewed-by: Stuart Yoder <stuart.yoder@freescale.com>
Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
Tested-by: Jose Rivera <German.Rivera@freescale.com>
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When using rcw_0x6d_0x2d, the PHY address(combined with MAC2)
of SGMII card in slot3 is 0x1f instead of 0x1d.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Change-Id: Ie9c61b6056e5e29e492a534c034a9cfa41b9a2f0
Reviewed-on: http://git.am.freescale.net:8181/12046
Reviewed-by: Xiaobo Xie <X.Xie@freescale.com>
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
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This patch disables CONFIG_NETFILTER from 913x defconfigs.
This flag is used by Application Specific Fastpath(ASF) but
ASF is not enabled in these configs so no point enabling it
Signed-off-by: Harninder Rai <harninder.rai@freescale.com>
Change-Id: I699da60d33ac89e682aa8528f800aa696ee54326
Reviewed-on: http://git.am.freescale.net:8181/11921
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Naveen Burmi <NaveenBurmi@freescale.com>
Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
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This patch removes lot of deprecated config flags from 913x
defconfigs. Some of them are:
- CONFIG_EXPERIMENTAL
- CONFIG_MTD_CHAR
- CONFIG_ARPD
- CONFIG_MII
Signed-off-by: Harninder Rai <harninder.rai@freescale.com>
Change-Id: I83ca07888d40c30c71f50a839ba27f34eb6acd7b
Reviewed-on: http://git.am.freescale.net:8181/11920
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Naveen Burmi <NaveenBurmi@freescale.com>
Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
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On booke, "struct tlbe_ref" contains host tlb mapping information
(pfn: for guest-pfn to pfn, flags: attribute associated with this mapping)
for a guest tlb entry. So when a guest creates a TLB entry then
"struct tlbe_ref" is set to point to valid "pfn" and set attributes in
"flags" field of the above said structure. When a guest TLB entry is
invalidated then flags field of corresponding "struct tlbe_ref" is
updated to point that this is no more valid, also we selectively clear
some other attribute bits, example: if E500_TLB_BITMAP was set then we clear
E500_TLB_BITMAP, if E500_TLB_TLB0 is set then we clear this.
Ideally we should clear complete "flags" as this entry is invalid and does not
have anything to re-used. The other part of the problem is that when we use
the same entry again then also we do not clear (started doing or-ing etc).
So far it was working because the selectively clearing mentioned above
actually clears "flags" what was set during TLB mapping. But the problem
starts coming when we add more attributes to this then we need to selectively
clear them and which is not needed.
Signed-off-by: Bharat Bhushan <bharat.bhushan@freescale.com>
Reviewed-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
Change-Id: Ie94b2607a1493a96632d72c1752a7a4e9e82cb84
Reviewed-on: http://git.am.freescale.net:8181/11891
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Stuart Yoder <stuart.yoder@freescale.com>
Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
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We need to search linux "pte" to get "pte" attributes for setting TLB in KVM.
This patch defines a lookup_linux_ptep() function which returns pte pointer.
Signed-off-by: Bharat Bhushan <bharat.bhushan@freescale.com>
Reviewed-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
Change-Id: Idaae1def20e8c12dc1245252ddf6d7ccea60c76d
Reviewed-on: http://git.am.freescale.net:8181/11890
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Stuart Yoder <stuart.yoder@freescale.com>
Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
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lookup_linux_pte() is doing more than lookup, updating the pte,
so for clarity it is renamed to lookup_linux_pte_and_update()
Signed-off-by: Bharat Bhushan <bharat.bhushan@freescale.com>
Reviewed-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
Change-Id: I02be9c728fd679b64000205da2605ea89c1d92bc
Reviewed-on: http://git.am.freescale.net:8181/11889
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Stuart Yoder <stuart.yoder@freescale.com>
Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
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Add the missing platform compatible string so that
the kernel can boot under hypervisor.
Signed-off-by: Laurentiu Tudor <Laurentiu.Tudor@freescale.com>
Change-Id: Ifbbf8fff0927b1c9f39ac648d5b1ba2e5b139186
Reviewed-on: http://git.am.freescale.net:8181/11838
Reviewed-by: Diana Madalina Craciun <Diana.Craciun@freescale.com>
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
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[ Upstream commit cb3042d609e30e6144024801c89be3925106752b ]
In arch_cpu_idle() we must enable %pil based interrupts before
potentially invoking the hypervisor cpu yield call.
As per the Hypervisor API documentation for cpu_yield:
Interrupts which are blocked by some mechanism other that
pstate.ie (for example %pil) are not guaranteed to cause
a return from this service.
It seems that only first generation Niagara chips are hit by this
bug. My best guess is that later chips implement this in hardware
and wake up anyways from %pil events, whereas in first generation
chips the yield is implemented completely in hypervisor code and
requires %pil to be enabled in order to wake properly from this
call.
Fixes: 87fa05aeb3a5 ("sparc: Use generic idle loop")
Reported-by: Fabio M. Di Nitto <fabbione@fabbione.net>
Reported-by: Jan Engelhardt <jengelh@inai.de>
Tested-by: Jan Engelhardt <jengelh@inai.de>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Jiri Slaby <jslaby@suse.cz>
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[ Upstream commit 1535bd8adbdedd60a0ee62e28fd5225d66434371 ]
When checking a system call return code for an error,
linux_sparc_syscall was sign-extending the lower 32-bit value and
comparing it to -ERESTART_RESTARTBLOCK. lseek can return valid return
codes whose lower 32-bits alone would indicate a failure (such as 4G-1).
Use the whole 64-bit value to check for errors. Only the 32-bit path
should sign extend the lower 32-bit value.
Signed-off-by: Dave Kleikamp <dave.kleikamp@oracle.com>
Acked-by: Bob Picco <bob.picco@oracle.com>
Acked-by: Allen Pais <allen.pais@oracle.com>
Cc: David S. Miller <davem@davemloft.net>
Cc: sparclinux@vger.kernel.org
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Jiri Slaby <jslaby@suse.cz>
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[ Upstream commit 4f6500fff5f7644a03c46728fd7ef0f62fa6940b ]
In arch/sparc/Kernel/Makefile, we see:
obj-$(CONFIG_SPARC64) += jump_label.o
However, the Kconfig selects HAVE_ARCH_JUMP_LABEL unconditionally
for all SPARC. This in turn leads to the following failure when
doing allmodconfig coverage builds:
kernel/built-in.o: In function `__jump_label_update':
jump_label.c:(.text+0x8560c): undefined reference to `arch_jump_label_transform'
kernel/built-in.o: In function `arch_jump_label_transform_static':
(.text+0x85cf4): undefined reference to `arch_jump_label_transform'
make: *** [vmlinux] Error 1
Change HAVE_ARCH_JUMP_LABEL to be conditional on SPARC64 so that it
matches the Makefile.
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Jiri Slaby <jslaby@suse.cz>
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commit 6f8a1b335fde143b7407036e2368d3cd6eb55674 upstream.
Commit 03bbcb2e7e2 (iommu/vt-d: add quirk for broken interrupt
remapping on 55XX chipsets) properly disables irq remapping on the
5500/5520 chipsets that don't correctly perform that feature.
However, when I wrote it, I followed the errata sheet linked in that
commit too closely, and explicitly tied the activation of the quirk to
revision 0x13 of the chip, under the assumption that earlier revisions
were not in the field. Recently a system was reported to be suffering
from this remap bug and the quirk hadn't triggered, because the
revision id register read at a lower value that 0x13, so the quirk
test failed improperly. Given this, it seems only prudent to adjust
this quirk so that any revision less than 0x13 has the quirk asserted.
[ tglx: Removed the 0x12 comparison of pci id 3405 as this is covered
by the <= 0x13 check already ]
Signed-off-by: Neil Horman <nhorman@tuxdriver.com>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: "H. Peter Anvin" <hpa@zytor.com>
Cc: x86@kernel.org
Link: http://lkml.kernel.org/r/1394649873-14913-1-git-send-email-nhorman@tuxdriver.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Jiri Slaby <jslaby@suse.cz>
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commit ae2163be10ac6090e7aeed72591e2d7fabb1cdda upstream.
Commit beb2dc0a7a84be003ce54e98b95d65cc66e6e536 breaks the MPC8xx which
seems to not support using mfspr SPRN_TBRx instead of mftb/mftbu
despite what is written in the reference manual.
This patch reverts to the use of mftb/mftbu when CONFIG_8xx is
selected.
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Jiri Slaby <jslaby@suse.cz>
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commit ab3e55b119c9653b19ea4edffb86f04db867ac98 upstream.
This bug was detected with the libio-epoll-perl debian package where the
test case IO-Ppoll-compat.t failed.
Signed-off-by: Helge Deller <deller@gmx.de>
CC: stable@kernel.org # 3.0+
Signed-off-by: Jiri Slaby <jslaby@suse.cz>
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commit fb53a1ab88d14848dc292842e35c3bda3a665997 upstream.
The workaround for this Erratum is included in AGESA. But BIOSes
spun only after Jan2014 will have the fix (atleast server
versions of the chip). The erratum affects both embedded and
server platforms and since we cannot say with certainity that
ALL BIOSes on systems out in the field will have the fix, we
should probably insulate ourselves in case BIOS does not do the
right thing or someone is using old BIOSes.
Refer to Revision Guide for AMD F16h models 00h-0fh, document 51810
Rev. 3.04, November2013 for details on the Erratum.
Tested the patch on Fam16h server platform and it works fine.
Signed-off-by: Aravind Gopalakrishnan <Aravind.Gopalakrishnan@amd.com>
Cc: <hmh@hmh.eng.br>
Cc: <Kim.Naru@amd.com>
Cc: <Suravee.Suthikulpanit@amd.com>
Cc: <bp@suse.de>
Cc: <sherry.hurwitz@amd.com>
Link: http://lkml.kernel.org/r/1390515212-1824-1-git-send-email-Aravind.Gopalakrishnan@amd.com
[ Minor edits. ]
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: Jiri Slaby <jslaby@suse.cz>
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commit 3159f372354e8e1f5dee714663d705dd2c7e0759 upstream.
With LPAE enabled, physical address space is larger than 4GB. Allow mapping any
part of it via /dev/mem by using PHYS_MASK to determine valid range.
PHYS_MASK covers 40 bits with LPAE enabled and 32 bits otherwise.
Reported-by: Vassili Karpov <av1474@comtv.ru>
Signed-off-by: Sergey Dyasly <dserrg@gmail.com>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Jiri Slaby <jslaby@suse.cz>
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some restructuring of epapr paravirt init resulted in
ppc_md.power_save being set, and then overwritten to
NULL during machine_init. This patch splits the
initialization of ppc_md.power_save out into a postcore
init call.
Signed-off-by: Stuart Yoder <stuart.yoder@freescale.com>
Change-Id: Id054bb9ab6b451d64835988a6b2ebe6cd54f85c3
Reviewed-on: http://git.am.freescale.net:8181/11766
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Scott Wood <scottwood@freescale.com>
Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
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add qe node in file t1042qds.dts
Signed-off-by: Zhao Qiang <B45475@freescale.com>
Change-Id: Iffcbf31f75646f626addcc3c1c4c3baef97de569
Reviewed-on: http://git.am.freescale.net:8181/11523
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Xiaobo Xie <X.Xie@freescale.com>
Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
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According to convention, 10Gbps SFP+ ports of fman2 should use
eth14 address and eth15 address, and not eth4 address and eth5
address.
Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com>
Change-Id: I8e85db7bdb2c06a3883e3d474e6d306371352ecc
Reviewed-on: http://git.am.freescale.net:8181/11702
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
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Kernel in 32-bit mode can not resume to the command shell after waking
from deep sleep.
Changes:
* change fsl_booke_entry_mapping.S to make it work under deep sleep
context
* fix bugs in sleep.S
Change-Id: Ic5186267ae82d12165029093b49c257bba3a3cc1
Signed-off-by: Chenhui Zhao <chenhui.zhao@freescale.com>
Reviewed-on: http://git.am.freescale.net:8181/11665
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Yang Li <LeoLi@freescale.com>
Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
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T104xqds boards has Micron, N25Q128A11ESF40F type flash.
Update Compatible field in spi node in dts for this.
Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Change-Id: Ib1dadd7549c8348eba55be0c52f7537a37da1347
Reviewed-on: http://git.am.freescale.net:8181/11262
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
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The same hang issue was observed on T4080 as well.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Change-Id: Ie4327353b43444dc3d312765ca5842cf63cf6428
Reviewed-on: http://git.am.freescale.net:8181/11296
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Xiaobo Xie <X.Xie@freescale.com>
Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
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Enable E.PT for vcpus with MMU MAV 2.0 to support Hardware Page Tablewalk
(HTW) in guests.
Signed-off-by: Mihai Caraman <mihai.caraman@freescale.com>
(cherry picked and merged from sdk1.5 commit 815866e615d1452083c7f379391926aa42eddcf0)
Change-Id: Ia73322e2d4eaff2acc62afb6e3b36f27d751dc29
Reviewed-on: http://git.am.freescale.net:8181/11563
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Stuart Yoder <stuart.yoder@freescale.com>
Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
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tlbilx_all emulation requies HW TLB invalidation for entries
added by HTW. Add inval_tlb_on_host() function to do this
invalidation and move inval_ea_on_host() to a common place.
Add dedicated functions for lpid and pid tlb invalidation
refactoring the existing kvmppc_e500_tlbil_all() function.
Signed-off-by: Mihai Caraman <mihai.caraman@freescale.com>
(cherry picked and merged from sdk1.5 commit f9efafeef721d45eb60cdfe45534a788ca55f0bd)
Change-Id: I4231ac6ac60927256d1a99084812bf958ac94f71
Reviewed-on: http://git.am.freescale.net:8181/11562
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Stuart Yoder <stuart.yoder@freescale.com>
Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
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Handle indirect entries (IND) in TLB emulation code. Translation size of IND
entries differ from the size of referred Page Tables (Linux guests now use IND
of 2MB for 4KB PTs) and this require careful tweak of the existing logic.
TLB search emulation requires additional search in HW TLB0 (since these entries
are directly added by HTW) and found entries shoud be presented to the guest with
RPN changed from PFN to GFN. There might be more GFNs pointing to the same PFN so
the only way to get the corresponding GFN is to search it in guest's PTE. If IND
entry for the corresponding PT is not available just invalidate guest's ea and
report a tlbsx miss. This patch only implements the invalidation and let a TODO
note for searching HW TLB0.
Signed-off-by: Mihai Caraman <mihai.caraman@freescale.com>
(cherry picked and merged from sdk1.5 commit fa267bdd889348c8f7f1ebd0f72173ad5c780abc)
Change-Id: Ibb3910c44a5413aa0b2ace0c858f46643c0dfa8d
Reviewed-on: http://git.am.freescale.net:8181/11561
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Stuart Yoder <stuart.yoder@freescale.com>
Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
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Handle LRAT error exception with support for lrat mapping/invalidation
and prepare for emulation.
Signed-off-by: Mihai Caraman <mihai.caraman@freescale.com>
(cherry picked and merged from sdk1.5 commit fd2bba8b66657eb452c152d6cf0b1cd4320df204)
Change-Id: Ifa9a9ce3a9aacab53f6184b2aff00edde1acf47d
Reviewed-on: http://git.am.freescale.net:8181/11560
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Stuart Yoder <stuart.yoder@freescale.com>
Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
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Move book3e_tlb_lock/unlock functions from hugetlbpages to mm to be
used from other kernel places.
Signed-off-by: Mihai Caraman <mihai.caraman@freescale.com>
(cherry picked and merged from sdk1.5 commit c84bbd80aebb40de4fcc7894759dfff8857d405c)
Change-Id: I89239824880e81c8257fe612cad903eebbb5adbe
Reviewed-on: http://git.am.freescale.net:8181/11559
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Stuart Yoder <stuart.yoder@freescale.com>
Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
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LRAT (Logical to Real Address Translation) is shared between hw threads.
Add LRAT next and max entries to tlb_per_core data structure and initialize them.
Signed-off-by: Mihai Caraman <mihai.caraman@freescale.com>
(cherry picked and merged from sdk1.5 commit aa10cefcc1588338b3a80e842bc4db351dcec176)
Change-Id: If229acd9f4ae28fb49ce42132831d720bd436b84
Reviewed-on: http://git.am.freescale.net:8181/11558
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Stuart Yoder <stuart.yoder@freescale.com>
Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
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Add LRAT (Logical to Real Address Translation) error exception handler
to Book3E 64-bit kernel.
Signed-off-by: Mihai Caraman <mihai.caraman@freescale.com>
(cherry picked and merged from sdk1.5 commit 70fdc82f73e5330acd9bb978029004c88a754d4e)
Change-Id: I0cb34c4b9ebec350ddf46e94876c099c9a8b2c7c
Reviewed-on: http://git.am.freescale.net:8181/11557
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Stuart Yoder <stuart.yoder@freescale.com>
Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
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Errata-A-006568. If SOC-rcpm is V1, we need enable cpu first,
T4240rev2 and later Soc has been fixed. But before, this errata is
still needed.
Tested on P4080ds, T1042rdb_pi, T4240qds, B4860qds.
root@p4080ds:/usr/etc# echo 0 > /sys/devices/system/cpu/cpu7/online
Cannot set affinity for irq 467
root@p4080ds:/usr/etc#
root@p4080ds:/usr/etc# echo 1 > /sys/devices/system/cpu/cpu7/online
smp_85xx_kick_cpu: timeout waiting for core 7 to reset
smp: failed starting cpu 7 (rc -2)
Signed-off-by: Wang Dongsheng <dongsheng.wang@freescale.com>
Signed-off-by: Chenhui Zhao <chenhui.zhao@freescale.com>
Reviewed-on: http://git.am.freescale.net:8181/11356
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Yang Li <LeoLi@freescale.com>
Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
Change-Id: Ib300dffe28b2436fe44431286ff707124402204d
Reviewed-on: http://git.am.freescale.net:8181/11648
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If we do nothing in suspend/resume, some platform PCIe ip-block
can't guarantee the link back to L0 state from sleep, then, when
we read the EP device will hang. Only we send pme turnoff message
in pci controller suspend, and send pme exit message in resume, the
link state will be normal.
When we send pme turnoff message in pci controller suspend, the
links will into l2/l3 ready, then, host cannot communicate with
ep device, but pci-driver will call back EP device to save them
state. So we need to change platform_driver->suspend/resume to
syscore->suspend/resume.
So the new suspend/resume implementation, send pme turnoff message
in suspend, and send pme exit message in resume. And add a PME handler,
to response PME & message interrupt.
Change platform_driver->suspend/resume to syscore->suspend/resume.
pci-driver will call back EP device, to save EP state in
pci_pm_suspend_noirq, so we need to keep the link, until
pci_pm_suspend_noirq finish.
Signed-off-by: Wang Dongsheng <dongsheng.wang@freescale.com>
Change-Id: Id82d2e92994e466de1b2a4eb9ecef73c112ec753
Reviewed-on: http://git.am.freescale.net:8181/11538
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Yang Li <LeoLi@freescale.com>
Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
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Add indirect_access_pixis_reset_pcie_slot & direct_access_pixis_reset_pcie_slot
into p1022_ds.c.
When the DIU enable, we through the way of indirect access to read/write pixis
register.
Signed-off-by: Wang Dongsheng <dongsheng.wang@freescale.com>
Change-Id: I7ccc3d7db7f45630ce269c0f680eed726b2efd3a
Reviewed-on: http://git.am.freescale.net:8181/11537
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
Reviewed-by: Yang Li <LeoLi@freescale.com>
Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
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Modify platform driver suspend/resume to syscore suspend/resume.
Because p1022ds need to use localbus when entering the PCIE resume.
Signed-off-by: Wang Dongsheng <dongsheng.wang@freescale.com>
Reviewed-on: http://git.am.freescale.net:8181/6992
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Tiefei Zang <roy.zang@freescale.com>
Reviewed-by: Thomas Trefny <Tom.Trefny@freescale.com>
Change-Id: Ib12831f0c7cd935765ec54f7306b8451212a8ecb
Reviewed-on: http://git.am.freescale.net:8181/11536
Reviewed-by: Yang Li <LeoLi@freescale.com>
Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
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