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path: root/drivers/gpu/drm/nouveau/core/engine/graph/fuc/gpcnve0.fuc
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2013-07-05drm/nvd7/gr: initial supportMaarten Lankhorst
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@canonical.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-07-05drm/nvc0-/gr: generate cs register lists from grctx dataBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-07-05drm/nve0-/gr: some new gpc registers can have multiple copiesBen Skeggs
GK110 exposes more than one, and needs to be dealt with in the ctxsw ucode just like the TPC sets are. Broadcast is at +0xe00. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-07-01drm/gr/nvc0-: merge nvc0/nve0 ucode, and use cpp instead of m4Ben Skeggs
No code changes, proven by envyas producing identical binaries. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-07-01drm/nve4/gr: update initial register/context valuesBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-07-01drm/nvf0/gr: initial register/context setupBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-07-01drm/nve7/gr: update initial register/context valuesBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-07-01drm/nve6/gr: update initial register/context valuesBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-12-23drm/nve0/graph: fix fuc, and enable acceleration on all known chipsetsBen Skeggs
Also adds GK106 to chipsets known by ucode. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-10-03drm/nve0/gr: initial fuc implementation, based on fermi's codeBen Skeggs
Currently identical except the available chipset register lists. This will *not* currently work and is disabled by default because of this. May get merged again later, remains to be seen what further changes will be required. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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