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T104x is based on PowerPC platform, LS1021A is based on ARM platform.
Make T104x and LS1021A use same interface to set/clear EPU registers.
Signed-off-by: Chenhui Zhao <chenhui.zhao@freescale.com>
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Patch Sent Upstream
url: http://lists.infradead.org/pipermail/linux-arm-kernel/2014-October/296410.html
Change-Id: I00fdfc0b15e0f7cdc9ebc9970798d6669d7c22aa
Reviewed-on: http://git.am.freescale.net:8181/21919
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Yang Li <LeoLi@freescale.com>
Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
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T1042 will trigger an Machine Check Exception when clearing the EPU
registers in resume process. The cause is that the sequence of clearing
the EPU registers is critical to make things right, especiallly
for T1042.
Therefore, follow the exact sequence in RM to clear the EPU registers.
Change-Id: Icec8b3fd37b0e122801c19eede81592000abb5f5
Signed-off-by: Chenhui Zhao <chenhui.zhao@freescale.com>
Reviewed-on: http://git.am.freescale.net:8181/12784
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Dongsheng Wang <dongsheng.wang@freescale.com>
Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
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In the last stage of deep sleep, software will trigger a Finite
State Machine (FSM) to control the hardware precedure, such as
board isolation, killing PLLs, removing power, and so on.
When the system is waked up by an interrupt, the FSM controls the
hardware to complete the early resume precedure.
This patch configure the EPU FSM preparing for deep sleep.
Change-Id: I42b196a656324260c1d1cfcf688016c6f8d7ebe8
Signed-off-by: Hongbo Zhang <hongbo.zhang@freescale.com>
Signed-off-by: Chenhui Zhao <chenhui.zhao@freescale.com>
Reviewed-on: http://git.am.freescale.net:8181/10708
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Yang Li <LeoLi@freescale.com>
Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
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