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author | Duc Dang <dhdang@apm.com> | 2016-02-13 03:39:27 (GMT) |
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committer | Jassi Brar <jaswinder.singh@linaro.org> | 2016-02-15 07:50:04 (GMT) |
commit | 9b2396dd1e41657c095d480802020c283ba1a43e (patch) | |
tree | 16a94f5807bf93dc42bb7a766369062db2f232af | |
parent | f700e84f417b98f867c5db0555e6f01724d53cd2 (diff) | |
download | linux-9b2396dd1e41657c095d480802020c283ba1a43e.tar.xz |
Documentation: mailbox: Add APM X-Gene SLIMpro mailbox dts documentation
This adds the APM X-Gene SLIMpro mailbox device tree
node documentation.
Signed-off-by: Feng Kan <fkan@apm.com>
Signed-off-by: Duc Dang <dhdang@apm.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
-rw-r--r-- | Documentation/devicetree/bindings/mailbox/xgene-slimpro-mailbox.txt | 35 |
1 files changed, 35 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/mailbox/xgene-slimpro-mailbox.txt b/Documentation/devicetree/bindings/mailbox/xgene-slimpro-mailbox.txt new file mode 100644 index 0000000..e46451b --- /dev/null +++ b/Documentation/devicetree/bindings/mailbox/xgene-slimpro-mailbox.txt @@ -0,0 +1,35 @@ +The APM X-Gene SLIMpro mailbox is used to communicate messages between +the ARM64 processors and the Cortex M3 (dubbed SLIMpro). It uses a simple +interrupt based door bell mechanism and can exchange simple messages using the +internal registers. + +There are total of 8 interrupts in this mailbox. Each used for an individual +door bell (or mailbox channel). + +Required properties: +- compatible: Should be as "apm,xgene-slimpro-mbox". + +- reg: Contains the mailbox register address range. + +- interrupts: 8 interrupts must be from 0 to 7, interrupt 0 define the + the interrupt for mailbox channel 0 and interrupt 1 for + mailbox channel 1 and so likewise for the reminder. + +- #mbox-cells: only one to specify the mailbox channel number. + +Example: + +Mailbox Node: + mailbox: mailbox@10540000 { + compatible = "apm,xgene-slimpro-mbox"; + reg = <0x0 0x10540000 0x0 0xa000>; + #mbox-cells = <1>; + interrupts = <0x0 0x0 0x4>, + <0x0 0x1 0x4>, + <0x0 0x2 0x4>, + <0x0 0x3 0x4>, + <0x0 0x4 0x4>, + <0x0 0x5 0x4>, + <0x0 0x6 0x4>, + <0x0 0x7 0x4>, + }; |