diff options
| author | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2007-06-14 22:06:49 (GMT) |
|---|---|---|
| committer | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2007-06-14 22:06:49 (GMT) |
| commit | f701737deb59654dd62e15d5dc379f387cf86c6d (patch) | |
| tree | b9073b7d4b43bc3d39c2ba1ddc76a1d0698073de /include | |
| parent | eedab661a51966c454e38c17266a531aa58b4a98 (diff) | |
| parent | 6c1640d52b9b7355cd777c4f08bc930ac96d905b (diff) | |
| download | linux-f701737deb59654dd62e15d5dc379f387cf86c6d.tar.xz | |
Merge master.kernel.org:/home/rmk/linux-2.6-arm
* master.kernel.org:/home/rmk/linux-2.6-arm:
[ARM] 4445/1: ANUBIS: Fix CPLD registers
[ARM] 4444/2: OSIRIS: CPLD suspend fix
[ARM] 4443/1: OSIRIS: Add watchdog device to machine devices
[ARM] 4442/1: OSIRIS: Fix CPLD register definitions
[ARM] VFP: fix section mismatch error
Diffstat (limited to 'include')
| -rw-r--r-- | include/asm-arm/arch-s3c2410/anubis-cpld.h | 4 | ||||
| -rw-r--r-- | include/asm-arm/arch-s3c2410/anubis-map.h | 10 | ||||
| -rw-r--r-- | include/asm-arm/arch-s3c2410/osiris-cpld.h | 19 | ||||
| -rw-r--r-- | include/asm-arm/arch-s3c2410/osiris-map.h | 19 | ||||
| -rw-r--r-- | include/asm-arm/linkage.h | 4 |
5 files changed, 33 insertions, 23 deletions
diff --git a/include/asm-arm/arch-s3c2410/anubis-cpld.h b/include/asm-arm/arch-s3c2410/anubis-cpld.h index dcebf6d..168b93f 100644 --- a/include/asm-arm/arch-s3c2410/anubis-cpld.h +++ b/include/asm-arm/arch-s3c2410/anubis-cpld.h @@ -18,4 +18,8 @@ #define ANUBIS_CTRL1_NANDSEL (0x3) +/* IDREG - revision */ + +#define ANUBIS_IDREG_REVMASK (0x7) + #endif /* __ASM_ARCH_ANUBISCPLD_H */ diff --git a/include/asm-arm/arch-s3c2410/anubis-map.h b/include/asm-arm/arch-s3c2410/anubis-map.h index ab076de..830d114 100644 --- a/include/asm-arm/arch-s3c2410/anubis-map.h +++ b/include/asm-arm/arch-s3c2410/anubis-map.h @@ -27,14 +27,8 @@ #define ANUBIS_VA_CTRL1 ANUBIS_IOADDR(0x00000000) /* 0x01800000 */ #define ANUBIS_PA_CTRL1 (ANUBIS_PA_CPLD) -#define ANUBIS_VA_CTRL2 ANUBIS_IOADDR(0x00100000) /* 0x01900000 */ -#define ANUBIS_PA_CTRL2 (ANUBIS_PA_CPLD) - -#define ANUBIS_VA_CTRL3 ANUBIS_IOADDR(0x00200000) /* 0x01A00000 */ -#define ANUBIS_PA_CTRL3 (ANUBIS_PA_CPLD) - -#define ANUBIS_VA_CTRL4 ANUBIS_IOADDR(0x00300000) /* 0x01B00000 */ -#define ANUBIS_PA_CTRL4 (ANUBIS_PA_CPLD) +#define ANUBIS_VA_IDREG ANUBIS_IOADDR(0x00300000) /* 0x01B00000 */ +#define ANUBIS_PA_IDREG (ANUBIS_PA_CPLD + (3<<23)) #define ANUBIS_IDEPRI ANUBIS_IOADDR(0x01000000) #define ANUBIS_IDEPRIAUX ANUBIS_IOADDR(0x01100000) diff --git a/include/asm-arm/arch-s3c2410/osiris-cpld.h b/include/asm-arm/arch-s3c2410/osiris-cpld.h index 3b64984..229ab23 100644 --- a/include/asm-arm/arch-s3c2410/osiris-cpld.h +++ b/include/asm-arm/arch-s3c2410/osiris-cpld.h @@ -1,6 +1,6 @@ /* linux/include/asm-arm/arch-s3c2410/osiris-cpld.h * - * Copyright (c) 2005 Simtec Electronics + * Copyright 2005 Simtec Electronics * http://www.simtec.co.uk/products/ * Ben Dooks <ben@simtec.co.uk> * @@ -14,12 +14,17 @@ #ifndef __ASM_ARCH_OSIRISCPLD_H #define __ASM_ARCH_OSIRISCPLD_H -/* CTRL1 - NAND WP control */ +/* CTRL0 - NAND WP control */ -#define OSIRIS_CTRL1_NANDSEL (0x3) -#define OSIRIS_CTRL1_BOOT_INT (1<<3) -#define OSIRIS_CTRL1_PCMCIA (1<<4) -#define OSIRIS_CTRL1_PCMCIA_nWAIT (1<<6) -#define OSIRIS_CTRL1_PCMCIA_nIOIS16 (1<<7) +#define OSIRIS_CTRL0_NANDSEL (0x3) +#define OSIRIS_CTRL0_BOOT_INT (1<<3) +#define OSIRIS_CTRL0_PCMCIA (1<<4) +#define OSIRIS_CTRL0_FIX8 (1<<5) +#define OSIRIS_CTRL0_PCMCIA_nWAIT (1<<6) +#define OSIRIS_CTRL0_PCMCIA_nIOIS16 (1<<7) + +#define OSIRIS_CTRL1_FIX8 (1<<0) + +#define OSIRIS_ID_REVMASK (0x7) #endif /* __ASM_ARCH_OSIRISCPLD_H */ diff --git a/include/asm-arm/arch-s3c2410/osiris-map.h b/include/asm-arm/arch-s3c2410/osiris-map.h index a14164d..b5c74d2 100644 --- a/include/asm-arm/arch-s3c2410/osiris-map.h +++ b/include/asm-arm/arch-s3c2410/osiris-map.h @@ -24,16 +24,19 @@ /* we put the CPLD registers next, to get them out of the way */ -#define OSIRIS_VA_CTRL1 OSIRIS_IOADDR(0x00000000) -#define OSIRIS_PA_CTRL1 (OSIRIS_PA_CPLD) +#define OSIRIS_VA_CTRL0 OSIRIS_IOADDR(0x00000000) +#define OSIRIS_PA_CTRL0 (OSIRIS_PA_CPLD) -#define OSIRIS_VA_CTRL2 OSIRIS_IOADDR(0x00100000) -#define OSIRIS_PA_CTRL2 (OSIRIS_PA_CPLD + (1<<23)) +#define OSIRIS_VA_CTRL1 OSIRIS_IOADDR(0x00100000) +#define OSIRIS_PA_CTRL1 (OSIRIS_PA_CPLD + (1<<23)) -#define OSIRIS_VA_CTRL3 OSIRIS_IOADDR(0x00200000) -#define OSIRIS_PA_CTRL3 (OSIRIS_PA_CPLD + (2<<23)) +#define OSIRIS_VA_CTRL2 OSIRIS_IOADDR(0x00200000) +#define OSIRIS_PA_CTRL2 (OSIRIS_PA_CPLD + (2<<23)) -#define OSIRIS_VA_CTRL4 OSIRIS_IOADDR(0x00300000) -#define OSIRIS_PA_CTRL4 (OSIRIS_PA_CPLD + (3<<23)) +#define OSIRIS_VA_CTRL3 OSIRIS_IOADDR(0x00300000) +#define OSIRIS_PA_CTRL3 (OSIRIS_PA_CPLD + (2<<23)) + +#define OSIRIS_VA_IDREG OSIRIS_IOADDR(0x00700000) +#define OSIRIS_PA_IDREG (OSIRIS_PA_CPLD + (7<<23)) #endif /* __ASM_ARCH_OSIRISMAP_H */ diff --git a/include/asm-arm/linkage.h b/include/asm-arm/linkage.h index dbe4b4e..5a25632 100644 --- a/include/asm-arm/linkage.h +++ b/include/asm-arm/linkage.h @@ -4,4 +4,8 @@ #define __ALIGN .align 0 #define __ALIGN_STR ".align 0" +#define ENDPROC(name) \ + .type name, %function; \ + END(name) + #endif |