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NXP/Freescale LSDK linux tree with Scalys patches
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cacheflush.h
Age
Commit message (
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Author
2017-01-09
ARC: mm: arc700: Don't assume 2 colours for aliasing VIPT dcache
Vineet Gupta
2016-03-19
ARC: dma: ioremap: use phys_addr_t consistenctly in code paths
Vineet Gupta
2015-10-28
ARC: mm: PAE40: switch to using phys_addr_t for physical addresses
Vineet Gupta
2015-05-19
ARC: fold ___flush_dcache_page into __flush_dcache_page
Vineet Gupta
2013-06-22
ARC: [mm] Assume pagecache page dirty by default
Vineet Gupta
2013-06-22
ARC: cache detection code bitrot
Vineet Gupta
2013-05-23
ARC: Use enough bits for determining page's cache color
Vineet Gupta
2013-05-23
ARC: Brown paper bag bug in macro for checking cache color
Vineet Gupta
2013-05-09
ARC: [mm] Aliasing VIPT dcache support 4/4
Vineet Gupta
2013-05-09
ARC: [mm] Aliasing VIPT dcache support 3/4
Vineet Gupta
2013-05-09
ARC: [mm] Aliasing VIPT dcache support 2/4
Vineet Gupta
2013-05-09
ARC: [mm] Aliasing VIPT dcache support 1/4
Vineet Gupta
2013-05-07
ARC: [mm] Lazy D-cache flush (non aliasing VIPT)
Vineet Gupta
2013-05-07
ARC: [mm] consolidate icache/dcache sync code
Vineet Gupta
2013-05-07
ARC: [mm] optimise icache flush for user mappings
Vineet Gupta
2013-02-15
ARC: Cache Flush Management
Vineet Gupta