diff options
| author | Rajat Srivastava <rajat.srivastava@nxp.com> | 2018-02-01 11:06:48 (GMT) |
|---|---|---|
| committer | Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> | 2018-02-08 03:05:14 (GMT) |
| commit | edcb0a528be80cb522b57626d7f2ee9ddc4a1073 (patch) | |
| tree | b515a2e21916e4d677080ebcc6eae94e0633861f | |
| parent | c6a9fe0d0f0b259b82a50714c2af6d4c13a585e3 (diff) | |
| download | u-boot-edcb0a528be80cb522b57626d7f2ee9ddc4a1073.tar.xz | |
Kconfig: qspi: Add SPI_ALIGNED_TXFIFO config details
This config makes driver send only 16 bytes aligned data
to TxFIFO while writing on flash.
Signed-off-by: Rajat Srivastava <rajat.srivastava@nxp.com>
| -rw-r--r-- | drivers/spi/Kconfig | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index 88da9a4..69c08c1 100644 --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig @@ -210,6 +210,15 @@ config FSL_QSPI used to access the SPI NOR flash on platforms embedding this Freescale IP core. +config FSL_SPI_ALIGNED_TXFIFO + bool "Write only 16 Bytes aligned data on TxFIFO" + depends on FSL_QSPI + help + For some boards, Freescale controller needs driver to fill TxFIFO + till 16 bytes to trigger data transfer, in case of flash write. + This config enables the Freescale QSPI driver to send 16 bytes + aligned data to TxFIFO while performing flash write operation. + config NDS_AE3XX_SPI bool "Andestech AE3XX SPI driver" help |