| Age | Commit message (Expand) | Author |
|---|---|---|
| 2015-08-17 | ARM: exynos: move SoC sources to mach-exynos | Thomas Abraham |
| 2014-11-17 | Exynos5: ddr3: Choose between single or double channel config | Akshay Saraswat |
| 2014-11-17 | DMC: Exynos5: Enable update mode for DREX controller | Alim Akhtar |
| 2014-06-13 | Exynos5420: DMC: Add software read leveling | Akshay Saraswat |
| 2014-06-13 | DMC: exynos5420: Gate CLKM to when reading PHY_CON13 | Doug Anderson |
| 2014-06-13 | Exynos5420: Remove code for enabling read leveling | Akshay Saraswat |
| 2014-06-13 | Exynos5: DMC: Modify the definition of ddr3_mem_ctrl_init | Akshay Saraswat |
| 2013-12-30 | Exynos5420: Add DDR3 initialization for 5420 | Rajeshwari Birje |
| 2013-07-24 | Add GPL-2.0+ SPDX-License-Identifier to source files | Wolfgang Denk |
| 2013-07-05 | EXYNOS: Move files from board/samsung to arch/arm | Rajeshwari Shinde |
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index : u-boot | |
| NXP/Freescale LSDK U-boot tree with Scalys patches | www-data |
| summaryrefslogtreecommitdiff |