T1040RDB: Fix: Add L2 switch support and device tree bindings

Added port indexes and compatible strings for each port
and for the L2 switch node itself.

Added L2 switch device tree binding.

Signed-off-by: Stefan Sicleru <stefan.sicleru@freescale.com>
Change-Id: I0d1383fbde82698bf6bdbbf275dadd7768bf0f8d
Reviewed-on: http://git.am.freescale.net:8181/10978
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Razvan Stefanescu <razvan.stefanescu@freescale.com>
Reviewed-by: Codrin Constantin Ciubotariu <codrin.ciubotariu@freescale.com>
Reviewed-by: Jose Rivera <German.Rivera@freescale.com>

1 files changed, 99 insertions, 0 deletions

diff --git a/Documentation/devicetree/bindings/powerpc/fsl/l2-switch.txt b/Documentation/devicetree/bindings/powerpc/fsl/l2-switch.txt
new file mode 100644
index 0000000..c192f74
--- /dev/null
+++ b/Documentation/devicetree/bindings/powerpc/fsl/l2-switch.txt
@@ -0,0 +1,99 @@
+T1040 L2switch Device Tree Binding
+Copyright (C) 2013 Freescale Semiconductor Inc.
+
+CONTENTS
+  - Overview
+  - L2switch Node
+  - Port Node
+
+=====================================================================
+Overview
+
+DESCRIPTION
+
+    T1040 integrates a Gigabit Ethernet switch core with eight 10/100/1000 Mbps
+    Ethernet ports and two 10/100/1000/2500 Mbps ports.
+
+=====================================================================
+L2switch Node
+
+Description
+
+    This node specifies the address range of l2switch configuration registers
+    and interrupts.  It also contains a set of child nodes defining the
+    Ethernet ports.
+
+PROPERTIES
+
+   - compatible
+      Usage: required
+      Value type: <string>
+      Definition: Must include "vitesse-9953"
+
+   - reg
+      Usage: required
+      Value type: <prop-encoded-array>
+      Definition: Standard property which specifies the physical address and
+      length of the l2switch configuration registers.
+
+   - interrupts
+      Usage: required
+      Value type: <prop_encoded-array>
+      Definition:  Standard property, specifies the interrupts generated by
+           this device.
+           The value of the interrupts property consists of one interrupt
+           specifier.  The format of the specifier is defined by the binding
+           document describing the node's interrupt parent.
+
+=====================================================================
+Port Node
+
+Description
+
+    This node specifies the status and connection type of each of the Ethernet
+    ports.
+
+PROPERTIES
+
+   - compatible
+     Usage: required
+     Value type: <string>
+     Definition: Must include "vitesse-9953-port"
+
+   - port-index
+     Usage: required
+     Value type: <u32>
+     Definition: Specifies the port index.  Values 0, 1 are used by the two
+             internal 10/100/1000/2500 Mbps ports, values 2-9 are used by the
+             eight external 10/100/1000 Mbps ports.
+
+   - phy-connection-type
+     Usage: required
+     Value type: <string>
+     Definition: Specifies the controller/PHY interface type.
+
+   - status
+     Usage: optional
+     Value type: <string>
+     Definition: Standard property.
+             Indicates the operational status of the port.  "disabled" is used
+             to indicate that the port is not usable (for example because the
+             QSGMII link to the PHYs is not available with current RCW).
+
+   - fixed-link
+     Usage: optional
+     Value type: <prop_encoded-array>
+     Definition: Specifies link parameters in the absence of a PHY.
+             <a b c d e> where a is emulated phy id - must be unique to among
+             all specified fixed-links, b is duplex - 0 half, 1 full, c is
+             link speed - 10/100/1000/2500, d is pause - 0 no pause, 1 pause,
+             e is asym_pause - 0 no asym_pause, 1 asym_pause.
+
+  - phy-handle
+     Usage: optional
+     Value type: <phandle>
+     Definition: The phandle for the PHY connected to this l2switch port.
+
+
+    Note: All other standard properties (see the ePAPR) are allowed but are
+    optional.